Wykres commitów

976 Commity (eb984b7f0c4781682af8aac41343987ce42cdb85)

Autor SHA1 Wiadomość Data
IanSB eb984b7f0c Fix issue with screen captures when OSD enabled 2020-01-11 23:58:40 +00:00
IanSB 61e656a0ae Fix menu corruption when changing overscan in mode 7. Also add border colour in setup modes 2020-01-11 15:16:54 +00:00
David Banks f94e3e634f Pi Firmware: Increase MAX_CPLD_FILENAMES from 20 to 24
Change-Id: I2bfcefb5a9e556f3f6ff93f46396171afc554371
2020-01-10 17:20:24 +00:00
David Banks 4d76fce804 Pi Firmware: Implement hidden parameter attribute
Change-Id: I842c5e5a656baa82f8c3bb9530038116d2ccd248
2020-01-10 17:18:46 +00:00
David Banks 676d206207 Pi Firmware: Compensate for fixed delay in YUV CPLD versions < 8
Change-Id: Ia1f86869a4e36142c11631d4811ffe26e868fed0
2020-01-10 16:57:02 +00:00
David Banks c5bdfbe058 YUV Profiles: Added 16 to HOFFSET to compensate for v8.x CPLD
Change-Id: I04ad6216d73554e701aa3a2d2744da3f87203767
2020-01-10 13:33:23 +00:00
David Banks e95ee77dab vhdl_YUV: Fix sync dection bug when sync out of range (v8.1)
Change-Id: I98fbbb32ced4fdded40c14ef8f741de6f0a415bd
2020-01-10 13:20:39 +00:00
David Banks 7ab3e15574 vhdl_YUV: Extend offset to 7 bits and eliminate fixed delay (v8.0)
Change-Id: I84e26f1b968cb035c3371ca25812fb0d9bc54c4b
2020-01-09 18:59:18 +00:00
IanSB 3109879451 Tweak mode 7 screencap 2020-01-09 17:01:31 +00:00
IanSB ccd4463640 Improve screencap scaling aspect ratios 2020-01-09 15:10:30 +00:00
IanSB b7b9353279 Fix spectrum palette regression 2020-01-09 02:53:35 +00:00
IanSB 45e2a7f4e4 Fix sync not detected issue 2020-01-09 02:52:25 +00:00
IanSB 3e2b499a6b Move sync type to geometry and add auto and non-interlaced options 2020-01-09 02:28:03 +00:00
IanSB dc95388023 Update profiles 2020-01-09 02:27:11 +00:00
David Banks 55920b8020 Profiles: Renamed Superboard Profiles
Change-Id: Ic0ff328952e26caa250ff4af3c4fd8d918f8a816
2020-01-07 15:40:42 +00:00
David Banks 284ac12080 Profiles: Added Superboard_II_RevB_x2
Change-Id: Ic959c5cd4c226c8149bdc2512433edcb37fa10c8
2020-01-07 15:39:17 +00:00
David Banks 6b971e605e Profiles: Added Superboard_II_RevB
Change-Id: Ida4744ca177320b51e1ee980f24b486694607bc2
2020-01-07 15:07:39 +00:00
IanSB 822a7f848c Add up/down screencap to info menus 2020-01-06 23:06:10 +00:00
IanSB 12b6d88f64 Add Auto clamp type option 2020-01-06 22:52:41 +00:00
IanSB ccf9b6db60 Add jedec file for 7.5 2020-01-06 22:49:54 +00:00
David Banks c07369eb59 vhdl_YUV: Express clamp_counter more efficiently (v7.5)
Change-Id: Idcdc151f034d41a1faff993fd3f94ed26ebfa184
2020-01-06 18:26:19 +00:00
David Banks 89e5d3f60e vhdl_YUV: Make each clamping interval identical (128 clocks) (v7.4)
Change-Id: I96c8dfdedbd6e395cb3867ba3885ba6bcfecc842
2020-01-06 15:48:25 +00:00
David Banks 64e8a3eec6 vhdl_YUV: Pipeline the sample signals to reduce the product terms (v7.3)
Change-Id: Icca14d8fd84bdf3fcca689bf8bad7c86774f6471
2020-01-06 15:22:53 +00:00
IanSB d5ef695e3f YUV CPLD v7.2 with further increased clamping times. 2020-01-05 22:29:08 +00:00
IanSB 2df33b5d85 YUV CPLD v7.1 with improved clamping times 2020-01-05 21:14:15 +00:00
IanSB 15d1a71e0c Update profiles 2020-01-05 21:13:28 +00:00
IanSB 8888e50720 Add missing xsvf file 2020-01-05 19:40:07 +00:00
IanSB ab8405534c Update Atom 50Hz TTL profiles 2020-01-05 19:24:48 +00:00
IanSB a82715b5c2 Use single folder for v1 & v2 profiles 2020-01-05 02:47:08 +00:00
IanSB 5c347e4ce3 Update profiles 2020-01-05 02:46:17 +00:00
IanSB 8d5bbe782f Fix save profile bug that sometimes stopped changes from being saved 2020-01-05 00:20:44 +00:00
IanSB 6ca4b41c8e Update profiles 2020-01-04 21:04:44 +00:00
IanSB aad0ca7d50 Hide pixel sampling except for v1 & v2 cplds 2020-01-04 16:57:42 +00:00
IanSB 17482470d9 Update profiles 2020-01-04 16:49:39 +00:00
IanSB 3b2a66af70 Changes to support V1 and V2 profiles 2020-01-04 15:30:53 +00:00
IanSB 88fb0aa8c1 Update V1 & V2 profiles 2020-01-04 15:30:22 +00:00
IanSB f774bbe083 fix comment 2020-01-04 06:08:11 +00:00
IanSB ffe22cf09c Add support for YUV cpld v7.0 with adjustable clamp and add confirmation to cpld update 2020-01-04 05:37:32 +00:00
IanSB 758b48b016 Update profiles 2020-01-04 05:34:22 +00:00
IanSB dd14dbbca5 YUV CPLD V7.0 with adjustable clamp 2020-01-04 05:05:16 +00:00
IanSB dc13e0f9ee Add user definable palettes 2020-01-03 17:34:42 +00:00
IanSB dafe6a820e Update Profiles 2020-01-03 17:34:11 +00:00
David Banks d45d2e5d3e vhdl_YUV: Revert to original clamp timing (v6.1)
Change-Id: Ica50543ed4acbc4d23ba45cdb5d8011791bb6b39
2019-12-31 15:31:55 +00:00
David Banks 408dad4c07 Pi Firmware: add support for YUV CPLD 6.x
Change-Id: Id10c8701896bddcb5a8c53b52b9f5acc0686df45
2019-12-31 11:38:37 +00:00
David Banks c0b58c0b53 vhdl_YUV: Add sync edge and delay to scan chain (v6.0)
Change-Id: I0ad28f87ed9e8b852851b01f026dfba1b2cd9a36
2019-12-31 11:38:37 +00:00
David Banks 637aaad1cb vhdl_YUV: rework design: 63 -> 57 macro cells (v5.A)
Change-Id: Idbcdaf7363d0f705a024d91571c102b34b7b9b5c
2019-12-31 11:38:37 +00:00
David Banks 554bdcca5b vhdl_YUV: rework design: 71 -> 63 macro cells (v5.9)
Change-Id: Ia063eb4da2c3d20220a2e986922caec84686175f
2019-12-31 11:38:37 +00:00
IanSB 5e67a0d621 Improve Spectrum palette 2019-12-31 04:52:53 +00:00
IanSB c771d258e7 Fix issue with equivalence table on original Atom board 2019-12-31 03:41:48 +00:00
IanSB df6b161fb5 Refactor 6847 palette generation and add palette equivalence table 2019-12-31 03:01:43 +00:00