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1 049 Commity
17 Gałęzie
93 Tagi
20 MiB
Wykres commitów

29 Commity (8ebe6708e17ef6e0a55396db48784ed11148904e)

Autor SHA1 Wiadomość Data
David Banks e95ee77dab vhdl_YUV: Fix sync dection bug when sync out of range (v8.1) 
Change-Id: I98fbbb32ced4fdded40c14ef8f741de6f0a415bd
 2020-01-10 13:20:39 +00:00
David Banks 7ab3e15574 vhdl_YUV: Extend offset to 7 bits and eliminate fixed delay (v8.0) 
Change-Id: I84e26f1b968cb035c3371ca25812fb0d9bc54c4b
 2020-01-09 18:59:18 +00:00
IanSB ccf9b6db60 Add jedec file for 7.5 2020-01-06 22:49:54 +00:00
David Banks c07369eb59 vhdl_YUV: Express clamp_counter more efficiently (v7.5) 
Change-Id: Idcdc151f034d41a1faff993fd3f94ed26ebfa184
 2020-01-06 18:26:19 +00:00
David Banks 89e5d3f60e vhdl_YUV: Make each clamping interval identical (128 clocks) (v7.4) 
Change-Id: I96c8dfdedbd6e395cb3867ba3885ba6bcfecc842
 2020-01-06 15:48:25 +00:00
David Banks 64e8a3eec6 vhdl_YUV: Pipeline the sample signals to reduce the product terms (v7.3) 
Change-Id: Icca14d8fd84bdf3fcca689bf8bad7c86774f6471
 2020-01-06 15:22:53 +00:00
IanSB d5ef695e3f YUV CPLD v7.2 with further increased clamping times. 2020-01-05 22:29:08 +00:00
IanSB 2df33b5d85 YUV CPLD v7.1 with improved clamping times 2020-01-05 21:14:15 +00:00
IanSB 8888e50720 Add missing xsvf file 2020-01-05 19:40:07 +00:00
IanSB f774bbe083 fix comment 2020-01-04 06:08:11 +00:00
IanSB 758b48b016 Update profiles 2020-01-04 05:34:22 +00:00
IanSB dd14dbbca5 YUV CPLD V7.0 with adjustable clamp 2020-01-04 05:05:16 +00:00
David Banks d45d2e5d3e vhdl_YUV: Revert to original clamp timing (v6.1) 
Change-Id: Ica50543ed4acbc4d23ba45cdb5d8011791bb6b39
 2019-12-31 15:31:55 +00:00
David Banks c0b58c0b53 vhdl_YUV: Add sync edge and delay to scan chain (v6.0) 
Change-Id: I0ad28f87ed9e8b852851b01f026dfba1b2cd9a36
 2019-12-31 11:38:37 +00:00
David Banks 637aaad1cb vhdl_YUV: rework design: 63 -> 57 macro cells (v5.A) 
Change-Id: Idbcdaf7363d0f705a024d91571c102b34b7b9b5c
 2019-12-31 11:38:37 +00:00
David Banks 554bdcca5b vhdl_YUV: rework design: 71 -> 63 macro cells (v5.9) 
Change-Id: Ia063eb4da2c3d20220a2e986922caec84686175f
 2019-12-31 11:38:37 +00:00
David Banks d70b2272d4 vhdl_YUV: fix hang when sync threshold too low (v5.8) 
Change-Id: Icf2cf283d45981e5f3ad9a04a88a56ce18eda003
 2019-12-30 17:52:26 +00:00
David Banks 7a2071cc00 vhdl_YUV: use the (faster) leading edge of HS as the reference (v57) 
Change-Id: I83dd05741ff2f26469f655a3d53923f99917ccce
 2019-12-30 12:08:15 +00:00
David Banks 867dc3126d vhdl_YUV: deglitch HS (v5.6) 
Change-Id: I60aebd1bec12a2423c415b3f72059136d363e81b
 2019-12-30 09:55:52 +00:00
David Banks 06b6060e39 vhdl_YUV: fix recent bug in filtering (v5.2) 
Change-Id: Ia955e87bcbcd219913bdbed6adf9b234afe9521f
 2019-12-28 18:24:42 +00:00
David Banks f0d0e0dbf6 vhdl_YUV: added FS detection (v5.1) 
Change-Id: Ib951b4c967b725cbe7b4414e8ec73bd3405188b4
 2019-12-28 17:11:50 +00:00
David Banks 404b1afeef vhdl_YUV: Add altnative line R inversion (v5.0) 
Change-Id: I230b5c63b37d5e74c736dd24eb24dc7fdede2d0b
 2019-12-28 14:08:04 +00:00
David Banks b984565bdd vhdl_YUV: Reduce macrocell usage (v4.1) 
Change-Id: I71bf4d5f3eba5b2db4e539680768b92ab53519d8
 2019-12-28 14:00:25 +00:00
David Banks 4357388a1f vhdl_YUV: make chroma subsampling controllable (v4.0) 
Change-Id: Id09171473abeb149b0f849d893b89004cae303bb
 2019-12-28 13:58:21 +00:00
David Banks 850703474c VHDL: formatting only, remove tabs 
Change-Id: I3123b5ab7751c95953b5b5dd889c50c120324b95
 2019-12-22 15:30:38 +00:00
IanSB 7d60e6acdb Update YUV cpld to v3.3 with inversions removed 2019-12-18 23:06:58 +00:00
IanSB cb0e74c44e Update YUV CPLD to v3.2 2019-12-18 16:28:01 +00:00
IanSB 08cbd13df0 YUV CPLD updated to V3.1 for combined RGB/YUV board 2019-12-16 22:45:20 +00:00
David Banks b7ba4a2da0 Remove space from directory name 
Change-Id: Ia8c60f571a3e7c82951ab447ef8205588f5e11cb
 2019-12-05 13:47:11 +00:00