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21 631 Commity
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1172 Commity (9c7046375fa3618bcbd7f65f0996453f46c5bd23)

Autor SHA1 Wiadomość Data
Song Ruo Jing 9c7046375f gpio: Fix ESP32S3 GPIO48 does not support hold function bug 
GPIO_HOLD_MASK array was missing the last item
 2022-09-05 03:47:43 +00:00
Roland Dobai e6fda46a02 Merge branch 's3_sysview_irq_names_v4.4' into 'release/v4.4' 
Fix ESP32-S3 interrupt names used by SystemView (v4.4)

See merge request espressif/esp-idf!19676
 2022-08-25 18:53:04 +08:00
Erhan Kurubas 0784fd086a esp32s3: fix interrupt names used by SystemView 2022-08-19 14:42:45 +02:00
Erhan Kurubas 5245c53d7a replace CAN with TWAI in the esp_isr_names table 2022-08-19 14:39:37 +02:00
Song Ruo Jing b2f4fc022a rtc_clk: Fix wrong RC_FAST and RC_SLOW clock frequency values on ESP32C3 and ESP32S3 2022-08-19 12:21:11 +08:00
Sudeep Mohanty 6dcb5bd1d3 rtci2c: Corrected the register base addr reference for RTC I2C on esp32s3 
This commit corrects the register base address reference for RTC I2C on
esp32s3.
 2022-08-15 14:50:14 +02:00
wuzhenghui 9b7bed2243 Clean IRAM and DRAM address space conversion macros 2022-08-09 20:33:26 +08:00
wuzhenghui 62ac5364e0 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-08-09 20:27:38 +08:00
Jiang Jiang Jian 9f9021a221 Merge branch 'bugfix/multiple_adc_bugfix_v4.4' into 'release/v4.4' 
adc: fix multiple bugs (v4.4)

See merge request espressif/esp-idf!19142
 2022-08-04 14:42:53 +08:00
Armando cb62457f6d adc: fix esp32 continuous mode sampling freq issue 2022-07-20 16:43:38 +08:00
Armando ad8862fa19 adc: fix esp32s2 continuous mode converted bytes issue 
When working in continuous mode, hardware will continuously trigger
ADC to do conversions. On esp32s2, 2 bytes will be generated per
conversion. Prior to this commit, driver assumes 4 bytes per conversion
(on s2). This commit fixed this issue.
 2022-07-20 16:43:38 +08:00
Armando ce465c0574 adc: fix esp32s3 continuous mode output bits issue 
Prior to this change, esp32s3 ADC continuous mode output resolution is 13 bits.
This commit correct the `adc_digi_output_data_t` on esp32s3. Correct
output bits should be 12 bits. Corresponding definition in `soc_caps.h`
is also updated.
 2022-07-20 15:01:57 +08:00
Cao Sen Miao daceb3516d temperature sensor: Add support on ESP32-S3, 
Closes https://github.com/espressif/esp-idf/issues/8086
 2022-07-13 17:22:59 +08:00
Jiang Jiang Jian b3e8d0f7bf Merge branch 'bugfix/tinyusb_prs_v4.4' into 'release/v4.4' 
Fix tinyusb_driver_install (dangling pointer) and ESP32S3 USB external PHY pinout (backport v4.4)

See merge request espressif/esp-idf!18978
 2022-07-12 10:31:14 +08:00
lsita 88361bddf2 USB external PHY pinout set as in Reference Manual Figure 29-3. 
(cherry picked from commit 9ceff23c6d)
 2022-07-11 17:26:45 +08:00
Jiang Jiang Jian b9a1020fcf Merge branch 'bugfix/reset_ble_hw_on_inititalization_v4.4' into 'release/v4.4' 
[Bluetooth] Reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3(release/v4.4)

See merge request espressif/esp-idf!18964
 2022-07-11 16:28:53 +08:00
wangmengyang eb15c547f2 fix licence copyright for header file syscon_reg.h on ESP32C3 and ESP32S3 2022-07-11 11:09:06 +08:00
wangmengyang 4d5aa82cea component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3 
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and MAC bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
 2022-07-11 11:06:11 +08:00
Marius Vikhammer 90e58c3721 docs: fix all doxygen warnings 
Doxygen warnings would previously not result in a failed pipeline.
Fixed this as well as all current warnings.
 2022-07-05 11:14:40 +08:00
Jiang Jiang Jian b9e018aa53 Merge branch 'bugfix/ledc_auto_clk_refactor_v4.4' into 'release/v4.4' 
LEDC: improved support for ESP32-C3 and refactored divisor calculation (v4.4)

See merge request espressif/esp-idf!17101
 2022-07-01 10:52:00 +08:00
Jiang Jiang Jian 1bd2e3f9df Merge branch 'feature/s3_ulp_support_v4.4' into 'release/v4.4' 
ulp: Added ULP support for  esp32s3 (v4.4)

See merge request espressif/esp-idf!18621
 2022-07-01 10:51:18 +08:00
KonstantinKondrashov dcc706280d reset_reasons: EFUSE_RST is treated as POWERON_RST 
ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
 2022-06-22 16:39:02 +08:00
Sudeep Mohanty b72f987c5c ulp: Added ULP RISC-V support for esp32s3 
This commit adds support for ULP RISC-V for esp32s3.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
 2022-06-22 13:33:14 +08:00
morris 1ba0bf31b6 rmt: fix error in rmt register file 
Closes https://github.com/espressif/esp-idf/issues/9100
 2022-06-14 22:10:00 +08:00
Jiang Jiang Jian efdca9431c Merge branch 'bugfix/c3_efuse_fail_bits_v4.4' into 'release/v4.4' 
soc: Fix efuse fail bits (v4.4)

See merge request espressif/esp-idf!18417
 2022-06-09 10:53:31 +08:00
Jiang Jiang Jian 7905f0d3f8 Merge branch 'feature/adds_efuses_to_table_v4.4' into 'release/v4.4' 
efuse: Adds ERR_RST_ENABLE efuse for C3 (v4.4)

See merge request espressif/esp-idf!18419
 2022-06-09 10:53:16 +08:00
Michael (XIAO Xufeng) f86be6141b Merge branch 'bugfix/i2c_timeout_issue_v4.4' into 'release/v4.4' 
I2C: patch for solving watchdog timeout issue(backport v4.4)

See merge request espressif/esp-idf!18130
 2022-06-08 14:12:37 +08:00
KonstantinKondrashov 1979c68e82 efuse: Adds ERR_RST_ENABLE efuse for C3 and S3 
Closes https://github.com/espressif/esp-idf/issues/8357
 2022-06-07 22:06:45 +08:00
KonstantinKondrashov 02fe424e48 soc: Fix description of efuse fail bits 2022-06-07 21:42:33 +08:00
Michael (XIAO Xufeng) c61db5e9c9 soc_caps: add SOC_PM_SUPPORT_RTC_PERIPH_PD 
Partially pick 6336f8191e
 2022-06-06 00:17:39 +08:00
chaijie 2a1002b4a4 modify voltage param to fit all mode of S3 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng) a2e1b6756e esp32s3: fixed dangerous power parameters in sleep modes 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng) f46bd50884 pm: putting dbias and pd_cur code into same function 2022-06-05 02:33:51 +08:00
Michael (XIAO Xufeng) 254870c3c4 rtc: fixed 8MD256 can't be used as RTC slow src on ESP32 
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
 2022-06-05 02:33:50 +08:00
morris c0dcebc41c Merge branch 'feat/esp32s3_support_gpio_deepsleep_wakeup_v4.4' into 'release/v4.4' 
example/deep_sleep: add example of EXT0 and using internal pullups (v4.4)

See merge request espressif/esp-idf!18119
 2022-06-01 19:56:17 +08:00
Jiang Jiang Jian fc30369909 Merge branch 'bugfix/update_efuse_name_v4.4' into 'release/v4.4' 
efuse: update efuse name (backport v4.4)

See merge request espressif/esp-idf!18195
 2022-05-30 11:15:16 +08:00
Wu Zheng Hui 2e4784611d efuse: update efuse name (backport v4.4) 2022-05-30 11:15:16 +08:00
morris 0340c2f2bc Merge branch 'bugfix/keep_rtc8m_in_lightsleep_v4.4' into 'release/v4.4' 
pm: fixed RTC8M domain power down issue when used as RTC source (v4.4)

See merge request espressif/esp-idf!18075
 2022-05-30 09:54:39 +08:00
laokaiyao 9b0f7b657b i2s: fixed write timeout while setting the clock (v4.4) 2022-05-24 10:14:44 +08:00
chaijie d222adbeeb solve memory error bug when in lightsleep mode 2022-05-18 17:43:13 +08:00
Cao Sen Miao 04f7c342f0 I2C: patch for solving watchdog timeout issue 2022-05-17 16:36:40 +08:00
Michael (XIAO Xufeng) 4efab0d0ff soc/esp32s3: merge gpio caps into soc_caps.h 2022-05-16 22:01:11 +08:00
Michael (XIAO Xufeng) e119d6cb06 pm: add powerdown for int_8m on ESP32-H2 
Also move the xtal fpu logic to sleep_modes.c
 2022-05-16 00:59:36 +08:00
Michael (XIAO Xufeng) 17b9cc6b4a pm: fixed RTC8M domain power issues 
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
 2022-05-12 15:57:09 +08:00
morris 3e7448d0f3 i80_lcd: support I2S1 LCD mode for esp32 2022-04-19 13:01:13 +00:00
Jiang Jiang Jian f0e894e540 Merge branch 'bugfix/remove_c_series_chips_unsupported_efuse_field_backport_v4.4' into 'release/v4.4' 
efuse: free esp32c3/esp32h2 unused efuse field (backport v4.4)

See merge request espressif/esp-idf!17292
 2022-03-02 18:36:13 +08:00
morris 5f56bbd2d0 Merge branch 'bugfix/rtcio_increase_size_v4.4' into 'release/v4.4' 
sleep: fixed ext1 cannot wakeup via RTCIO >= 18 issue (v4.4)

See merge request espressif/esp-idf!17201
 2022-03-02 16:53:05 +08:00
songruojing 2ef6b8845b uart: fixed reset logic on ESP32-S3 2022-03-02 02:42:46 +08:00
songruojing bdd7610e66 uart: fixed incorrect channel number on ESP32S2, S3 and C3 2022-03-02 02:42:06 +08:00
wuzhenghui c6aa1cf732 remove esp32c3 unsupported efuse field 2022-02-28 17:26:28 +08:00