systimer was stopped because the option SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN is set by default 1, it blocks counting.
For Unicore should be:
SYSTIMER_TIMER_UNIT1_CORE0_STALL_EN 1
SYSTIMER_TIMER_UNIT1_CORE1_STALL_EN 0
* ##__VA_ARGS__ is replaced by __VA_OPT__(,)
and __VA_ARGS if C++20 is used.
* Affected header files are: esp_log.h,
portmacro.h and esp_check.h
* Closes https://github.com/espressif/esp-idf/pull/6692
portGET_ARGUMENT_COUNT uses a GCC extension ##__VA_ARGS__. It forces
the user to compile the code with GNU extensions enabled instead of ISO
language standard. The suggested change is to replace ##__VA_ARGS__ with
__VA_OPT__(,) __VA_ARGS__ which is supported by the current version of
GCC used in ESP-IDF for both C and C++ ISO standards.
This fix would enable ESP-IDF users to compile their code with ISO C++20
standard in future releases.
Signed-off-by: Jakob Hasse <jakob.hasse@espressif.com>
Since dd849ffc, _rodata_start label has been moved to a different
linker output section from where the TLS templates (.tdata, .tbss)
are located. Since link-time addresses of thread-local variables are
calculated relative to the section start address, this resulted in
incorrect calculation of THREADPTR/$tp registers.
Fix by introducing new linker label, _flash_rodata_start, which points
to the .flash.rodata output section where TLS variables are located,
and use it when calculating THREADPTR/$tp.
Also remove the hardcoded rodata section alignment for Xtensa targets.
Alignment of rodata can be affected by the user application, which is
the issue dd849ffc was fixing. To accommodate any possible alignment,
save it in a linker label (_flash_rodata_align) and then use when
calculating THREADPTR. Note that this is not required on RISC-V, since
this target doesn't use TPOFF.
Fixes issue with DPORT init task, this task uses minimum stack size and may not be
enough if stack smashing detection is set to Overall mode.
Also reworks the way we calculate minimum stack to allow for adding multiple
contributing factors.
Closes https://github.com/espressif/esp-idf/issues/6403
Unless the option for "assert and keep running" is enabled.
This means that silent asserts now work for FreeRTOS, and disabling asserts
now also disables them in FreeRTOS without needing a separate config change.
Related to https://github.com/espressif/esp-idf/issues/6306
NOP instructions have been added in order to prevent the code
from executing code it shouldn't execute. This is due to a delay
between the moment an interrupt is requested and the moment it
is fired. It only happens on RISC-V SoC.
Enable shared stack watchpoint for overflow detection
Enable unit tests:
* "test printf using shared buffer stack" for C3
* "Test vTaskDelayUntil" for S2
* "UART can do poll()" for C3
rtos_int_exit would store RA at an offset of 4 byte from the SP,
where the offset should be 0.
This caused rtos_int_exit to overwrite variables in bss.
The riscv vectors.S in riscv component contains the trap vector, which is responsible to
defer interrupts and examine if a task context switch is needed, this change cleans up
this code by hiding all freertos details behind on two functions rtos_it_enter/exit and
their implementations are placed in freertos riscv port files.
KonstantinKondrashov