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16 058 Commity
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146 Tagi
378 MiB
Wykres commitów

780 Commity (19d2e4cca16c80515f0cc2971e9a9e83bbe848ce)

Autor SHA1 Wiadomość Data
Angus Gratton 5938b9a892 Merge branch 'feature/support_esp32c3_master_cmake_reset_reason' into 'master' 
esp32c3: Add UTs for reset_reason

Closes IDF-2091

See merge request espressif/esp-idf!11546
 2021-01-18 07:12:21 +08:00
Konstantin Kondrashov d23c7690f2 esp32c3: Add UTs for reset_reason 2021-01-18 07:12:21 +08:00
ninh 27aa6c289f components/pm: Add slp gpio configure workaround 2021-01-15 15:34:45 +08:00
Marius Vikhammer 0713e93b8f TWAI: bringup for S3 and C3 2021-01-14 20:30:31 +08:00
morris e6d23a35ec gdma: dynamic alloc DMA channels 2021-01-13 10:52:27 +08:00
Chen Jian Xing 5b44295cb9 esp_wifi: fix esp32c3 code issues 
1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
 2021-01-10 16:16:28 +08:00
Angus Gratton 5b68cf9de4 Merge branch 'feature/c3_ds' into 'master' 
ESP32-C3 Digital Signature, HAL layer for DS.

Closes IDF-2111

See merge request espressif/esp-idf!10813
 2021-01-07 13:07:28 +08:00
Jiang Jiang Jian c05321424f Merge branch 'bugfix/lightsleep_accuracy_opt' into 'master' 
Lightsleep overhead time accuracy optimization

See merge request espressif/esp-idf!11291
 2021-01-06 14:02:10 +08:00
ninh dc7bdb9857 adjust lightsleep overhead time and cali slowclk 2021-01-06 03:40:28 +00:00
morris 7a71cedf87 interrupt: filter out reserved int number by decoding risc-v JAL instruction 2021-01-05 15:39:46 +08:00
morris 9e7d2c0065 esp32c3: format and clean up interrupt and os port code 2021-01-05 15:39:46 +08:00
Felipe Neves 5d316ac142 interrupt: added INTC FLEXIBLE capabillity to esp32c3 CPU caps 2021-01-05 15:39:46 +08:00
Jakob Hasse e532a29288 [Peripheral/Security] DS peripheral driver 2021-01-05 12:26:59 +08:00
Michael (XIAO Xufeng) 6b5377f11a gpio: fixed GPIO47 not available issue on ESP32s3 2021-01-04 20:21:06 +08:00
Marius Vikhammer 68608f804c esp32c3: Misc fixes needed to build & run 2020-12-31 15:20:05 +11:00
chaijie d505474f78 1. Fix CPU switch to 160M issue; 
2. increase lightsleep voltage to make sure wakeup successfully;
3. add judgement code to whether wait or not when switch CPU frequency.
 2020-12-30 12:32:31 +08:00
Marius Vikhammer eb788deb03 esp_hw_support: merge C3 changes to master 
Merge RTC related C3 changes to master
 2020-12-30 12:20:41 +08:00
Angus Gratton 629b4270b4 Merge branch 'feature/c3_mbedtls_merge' into 'master' 
mbedtls: merge changes from C3 to master

Closes IDF-2544 and IDF-2114

See merge request espressif/esp-idf!11718
 2020-12-29 12:37:08 +08:00
Angus Gratton 1b0442b963 Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master' 
esp_system: make rtc fast memory to heap configuration unified across chips

Closes IDF-2503

See merge request espressif/esp-idf!11693
 2020-12-29 11:41:05 +08:00
Marius Vikhammer 1b6891c5d8 mbedtls: merge changes from C3 2020-12-29 10:56:13 +08:00
Darian Leung 602a747b31 Add USB Host registers and types and LL layer 
This commit adds the register struct, Low Level Layer, and
protocol types for USB Host
 2020-12-24 19:43:42 +08:00
Angus Gratton c3ba995f2c Merge branch 'ci/ccomp_performance_tests' into 'master' 
unit_test: Refactor all performance tests that rely on cache compensated timer

See merge request espressif/esp-idf!11709
 2020-12-24 13:44:52 +08:00
Mahavir Jain 880a63b2e9 esp_system: make rtc fast memory to heap configuration unified across chips 
Closes IDF-2503
 2020-12-24 09:46:35 +05:30
Angus Gratton ed737becde soc: Move esp32c3 soc_memory_layout.c to soc component 
Was incorrectly placed in esp_hw_support
 2020-12-24 13:40:01 +11:00
Angus Gratton b7f4c46a82 soc: Update esp32c3 soc headers 
From internal commit 6d894813
 2020-12-24 10:47:34 +11:00
Angus Gratton 6d6510c39b soc: Move esp32c3 soc_memory_layout.c to soc component 
Was incorrectly placed in esp_hw_support
 2020-12-23 11:49:16 +11:00
Angus Gratton 705d797b41 Merge branch 'feature/esp32c3_drivers' into 'master' 
driver: Add esp32c3

Closes IDF-2363

See merge request espressif/esp-idf!11650
 2020-12-23 08:43:31 +08:00
Armando 2d37bfa126 driver: Add adc_digi single conversion mode 
- add lock for single read and continuous read APIs
- update onetime read start singal delay for hardware limitation[*]
- move adc_caps to soc_caps.h
- update license dates

[*] There is a hardware limitation. If the APB clock frequency is high, the
step of this reg signal: ``onetime_start`` may not be captured by the
ADC digital controller (when its clock frequency is too slow). A rough
estimate for this step should be at least 3 ADC digital controller
clock cycle.
 2020-12-23 09:53:24 +11:00
Angus Gratton fa892eb017 soc: Explain units for rtc_clk_cal() function, fix typo 2020-12-23 09:53:24 +11:00
Cao Sen Miao e338a2e3df rtc: add function to en/disable the rtc clock 2020-12-23 09:53:24 +11:00
Angus Gratton f09b8ae7a4 driver: Add esp32c3 ADC driver 
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
 2020-12-23 09:53:24 +11:00
Angus Gratton 27a9cf861e driver: Add esp32c3 drivers (except ADC/DAC) and update tests 
Some ESP32-C3 drivers are still pending.

Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
 2020-12-23 09:53:24 +11:00
Marius Vikhammer 0a95151a75 unit_test: Refactor all performance tests that rely on cache compensated timer 
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
 2020-12-22 18:56:24 +11:00
boarchuz 06d6146445 fix rtc_gpio_desc_t compilation error 
Closes https://github.com/espressif/esp-idf/pull/6029
Closes https://github.com/espressif/esp-idf/issues/6301
Closes IDFGH-4470
Closes IDFGH-4167
 2020-12-21 13:54:52 +05:30
Cao Sen Miao 0736c91d68 soc: Remove cache constants from soc.h 2020-12-17 15:34:13 +11:00
Marius Vikhammer 457ce080ae AES: refactor and add HAL layer 
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
 2020-12-10 09:04:47 +00:00
Armando d393699ab6 uart: bringup on esp32c3 2020-11-30 15:23:15 +11:00
Angus Gratton b68094199f esp_rom: Add initial ESP32-C3 support 
From internal commit 7761d6e8
 2020-11-30 11:12:56 +11:00
Angus Gratton c29d93986d soc: Add initial ESP32-C3 support 
From internal commit 7761d6e8
 2020-11-30 11:12:56 +11:00
Armando fb8b905539 uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
morris c5fe158929 doc: fix wrong register description regarding to ethernet SMI 2020-11-16 13:30:49 +08:00
Michael (XIAO Xufeng) 14944b181e Merge branch 'fix/soc_caps_spi_dummy_output_esp32' into 'master' 
soc_caps.h: remove spi cap that is defined to 0

See merge request espressif/esp-idf!11203
 2020-11-16 10:39:27 +08:00
Michael (XIAO Xufeng) 099fca515d Merge branch 'bugfix/move_crypto_caps' into 'master' 
SHA/RSA: moved all caps to soc_caps.h

Closes IDF-2300

See merge request espressif/esp-idf!11032
 2020-11-13 11:06:44 +08:00
Angus Gratton 935e4b4d62 Merge branch 'feature/riscv_arch' into 'master' 
Add RISC-V support

Closes IDF-2359

See merge request espressif/esp-idf!11140
 2020-11-13 07:50:31 +08:00
Angus Gratton 420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
 2020-11-13 07:49:11 +11:00
Michael (XIAO Xufeng) caf83b88ba Merge branch 'feature/bringup_i2c_for_s3' into 'master' 
I2C:  Add support for esp32s3 and add source clock allocator

Closes IDF-2011

See merge request espressif/esp-idf!10923
 2020-11-12 22:12:58 +08:00
Cao Sen Miao 6eee601cf6 i2c: Add supports on esp32s3 2020-11-12 11:32:45 +08:00
morris dc227c78e1 rmt: fix wrong signal assign on esp32 2020-11-12 10:31:38 +08:00
Michael (XIAO Xufeng) 5b6c965e99 soc_caps.h: remove spi cap that is defined to 0 
According to the caps rule, for unsupported feature we don't define anything. 

Remove the define 0 that violates this rule.
 2020-11-12 10:29:42 +08:00
Marius Vikhammer 488f46acf5 SHA/RSA: moved all caps to soc_caps.h 2020-11-12 02:15:46 +00:00