kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'feature/c3_mbedtls_merge' into 'master'
mbedtls: merge changes from C3 to master Closes IDF-2544 and IDF-2114 See merge request espressif/esp-idf!11718pull/6365/head
Angus Gratton
commit
629b4270b4
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@ -74,11 +74,13 @@ static inline void aes_hal_dma_init(const lldesc_t *input, const lldesc_t *outpu
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gdma_ll_tx_connect_to_periph(&GDMA, SOC_GDMA_AES_DMA_CHANNEL, GDMA_LL_PERIPH_ID_AES);
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gdma_ll_rx_connect_to_periph(&GDMA, SOC_GDMA_AES_DMA_CHANNEL, GDMA_LL_PERIPH_ID_AES);
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#if SOC_GDMA_SUPPORT_EXTMEM
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/* An L2 FIFO bigger than 40 bytes is need when accessing external ram */
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gdma_ll_tx_extend_fifo_size_to(&GDMA, SOC_GDMA_AES_DMA_CHANNEL, 40);
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gdma_ll_rx_extend_l2_fifo_size_to(&GDMA, SOC_GDMA_AES_DMA_CHANNEL, 40);
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gdma_ll_tx_set_block_size_psram(&GDMA, SOC_GDMA_AES_DMA_CHANNEL, GDMA_OUT_EXT_MEM_BK_SIZE_16B);
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gdma_ll_rx_set_block_size_psram(&GDMA, SOC_GDMA_AES_DMA_CHANNEL, GDMA_OUT_EXT_MEM_BK_SIZE_16B);
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#endif //SOC_GDMA_SUPPORT_EXTMEM
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/* Set descriptors */
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gdma_ll_tx_set_desc_addr(&GDMA, SOC_GDMA_AES_DMA_CHANNEL, (uint32_t)input);
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@ -44,6 +44,15 @@ extern "C" {
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#define GDMA_LL_TRIG_SRC_SHA (7)
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#define GDMA_LL_TRIG_SRC_ADC_DAC (8)
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typedef enum {
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GDMA_LL_PERIPH_ID_SPI2 = 0,
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GDMA_LL_PERIPH_ID_UART = 2,
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GDMA_LL_PERIPH_ID_I2S0 = 3,
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GDMA_LL_PERIPH_ID_AES = 6,
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GDMA_LL_PERIPH_ID_SHA = 7,
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GDMA_LL_PERIPH_ID_ADC_DAC = 8,
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} gdma_ll_periph_id_t;
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///////////////////////////////////// Common /////////////////////////////////////////
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/**
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* @brief Enable DMA channel M2M mode (TX channel n forward data to RX channel n), disabled by default
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@ -247,7 +256,7 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
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/**
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* @brief Connect DMA RX channel to a given peripheral
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*/
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static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, uint32_t periph_id)
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static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_ll_periph_id_t periph_id)
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{
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dev->channel[channel].in.in_peri_sel.sel = periph_id;
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}
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@ -405,7 +414,7 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
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/**
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* @brief Connect DMA TX channel to a given peripheral
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*/
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static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, uint32_t periph_id)
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static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_ll_periph_id_t periph_id)
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{
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dev->channel[channel].out.out_peri_sel.sel = periph_id;
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}
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@ -1,3 +1,17 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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// AES-CBC hardware throughput (accounts for worst-case performance with PSRAM workaround)
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@ -11,6 +25,8 @@
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 19000
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 190000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 33000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 360000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 90000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 870000
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@ -0,0 +1,70 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 14.4
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// SHA256 hardware throughput at 160 MHz, threshold set lower than worst case
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#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC 90
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// esp_sha() time to process 32KB of input data from RAM
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#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB 560
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 19000
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 210000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 45000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 670000
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
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#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B 53400
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB (701*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B 27400
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B 53600
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE 44300
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B 24400
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B 64900
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B (309*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB (1697*1000)
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE 76600
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#endif
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// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
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#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
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#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140
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@ -1,3 +1,17 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 43.0
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@ -12,6 +26,8 @@
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 13500
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 130000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 36000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 400000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 62000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 800000
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@ -1,3 +1,17 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 14.4
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@ -10,6 +24,8 @@
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 18000
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#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 210000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 45000
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#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 670000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 80000
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#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 1500000
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@ -0,0 +1,230 @@
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/**
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* \brief Multi-precision integer library, ESP32 C3 hardware accelerated parts
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*
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* based on mbedTLS implementation
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*
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* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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* Additions Copyright (C) 2016-2020, Espressif Systems (Shanghai) PTE Ltd
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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#include <string.h>
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#include <sys/param.h>
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#include "soc/hwcrypto_periph.h"
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#include "driver/periph_ctrl.h"
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#include "mbedtls/bignum.h"
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#include "bignum_impl.h"
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#include "soc/system_reg.h"
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#include "soc/periph_defs.h"
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#include "esp_crypto_lock.h"
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size_t esp_mpi_hardware_words(size_t words)
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{
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return words;
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}
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void esp_mpi_enable_hardware_hw_op( void )
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{
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esp_crypto_mpi_lock_acquire();
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/* Enable RSA hardware */
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periph_module_enable(PERIPH_RSA_MODULE);
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REG_CLR_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD);
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while (REG_READ(RSA_QUERY_CLEAN_REG) != 1) {
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}
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// Note: from enabling RSA clock to here takes about 1.3us
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}
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void esp_mpi_disable_hardware_hw_op( void )
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{
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REG_SET_BIT(SYSTEM_RSA_PD_CTRL_REG, SYSTEM_RSA_MEM_PD);
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/* Disable RSA hardware */
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periph_module_disable(PERIPH_RSA_MODULE);
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esp_crypto_mpi_lock_release();
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}
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/* Copy mbedTLS MPI bignum 'mpi' to hardware memory block at 'mem_base'.
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If num_words is higher than the number of words in the bignum then
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these additional words will be zeroed in the memory buffer.
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*/
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static inline void mpi_to_mem_block(uint32_t mem_base, const mbedtls_mpi *mpi, size_t num_words)
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{
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uint32_t *pbase = (uint32_t *)mem_base;
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uint32_t copy_words = MIN(num_words, mpi->n);
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/* Copy MPI data to memory block registers */
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for (int i = 0; i < copy_words; i++) {
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pbase[i] = mpi->p[i];
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}
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/* Zero any remaining memory block data */
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for (int i = copy_words; i < num_words; i++) {
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pbase[i] = 0;
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}
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}
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/* Read mbedTLS MPI bignum back from hardware memory block.
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Reads num_words words from block.
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*/
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static inline void mem_block_to_mpi(mbedtls_mpi *x, uint32_t mem_base, int num_words)
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{
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/* Copy data from memory block registers */
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const size_t REG_WIDTH = sizeof(uint32_t);
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for (size_t i = 0; i < num_words; i++) {
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x->p[i] = REG_READ(mem_base + (i * REG_WIDTH));
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}
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/* Zero any remaining limbs in the bignum, if the buffer is bigger
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than num_words */
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for (size_t i = num_words; i < x->n; i++) {
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x->p[i] = 0;
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}
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}
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/* Begin an RSA operation. op_reg specifies which 'START' register
|
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to write to.
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*/
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static inline void start_op(uint32_t op_reg)
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{
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/* Clear interrupt status */
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REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
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/* Note: above REG_WRITE includes a memw, so we know any writes
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to the memory blocks are also complete. */
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REG_WRITE(op_reg, 1);
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}
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/* Wait for an RSA operation to complete.
|
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*/
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static inline void wait_op_complete(void)
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{
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while (REG_READ(RSA_QUERY_INTERRUPT_REG) != 1)
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{ }
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/* clear the interrupt */
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REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
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}
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/* Read result from last MPI operation */
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void esp_mpi_read_result_hw_op(mbedtls_mpi *Z, size_t z_words)
|
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{
|
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wait_op_complete();
|
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mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words);
|
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}
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|
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/* Z = (X * Y) mod M
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Not an mbedTLS function
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*/
|
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void esp_mpi_mul_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t num_words)
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{
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REG_WRITE(RSA_LENGTH_REG, (num_words - 1));
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/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Rinv, num_words);
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REG_WRITE(RSA_M_DASH_REG, Mprime);
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start_op(RSA_MOD_MULT_START_REG);
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}
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|
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/* Z = (X ^ Y) mod M
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*/
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void esp_mpi_exp_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t num_words)
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{
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size_t y_bits = mbedtls_mpi_bitlen(Y);
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REG_WRITE(RSA_LENGTH_REG, (num_words - 1));
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/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Rinv, num_words);
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REG_WRITE(RSA_M_DASH_REG, Mprime);
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/* Enable acceleration options */
|
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REG_WRITE(RSA_CONSTANT_TIME_REG, 0);
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REG_WRITE(RSA_SEARCH_ENABLE_REG, 1);
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REG_WRITE(RSA_SEARCH_POS_REG, y_bits - 1);
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/* Execute first stage montgomery multiplication */
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start_op(RSA_MODEXP_START_REG);
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||||
|
||||
REG_WRITE(RSA_SEARCH_ENABLE_REG, 0);
|
||||
}
|
||||
|
||||
|
||||
/* Z = X * Y */
|
||||
void esp_mpi_mul_mpi_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
|
||||
{
|
||||
/* Copy X (right-extended) & Y (left-extended) to memory block */
|
||||
mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
|
||||
mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + num_words * 4, Y, num_words);
|
||||
/* NB: as Y is left-extended, we don't zero the bottom words_mult words of Y block.
|
||||
This is OK for now because zeroing is done by hardware when we do esp_mpi_acquire_hardware().
|
||||
*/
|
||||
REG_WRITE(RSA_LENGTH_REG, (num_words * 2 - 1));
|
||||
start_op(RSA_MULT_START_REG);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Special-case of (X * Y), where we use hardware montgomery mod
|
||||
multiplication to calculate result where either A or B are >2048 bits so
|
||||
can't use the standard multiplication method.
|
||||
*
|
||||
*/
|
||||
void esp_mpi_mult_mpi_failover_mod_mult_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
|
||||
{
|
||||
/* M = 2^num_words - 1, so block is entirely FF */
|
||||
for (int i = 0; i < num_words; i++) {
|
||||
REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, UINT32_MAX);
|
||||
}
|
||||
|
||||
/* Mprime = 1 */
|
||||
REG_WRITE(RSA_M_DASH_REG, 1);
|
||||
REG_WRITE(RSA_LENGTH_REG, num_words - 1);
|
||||
|
||||
/* Load X & Y */
|
||||
mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
|
||||
mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
|
||||
|
||||
/* Rinv = 1, write first word */
|
||||
REG_WRITE(RSA_MEM_RB_BLOCK_BASE, 1);
|
||||
|
||||
/* Zero out rest of the Rinv words */
|
||||
for (int i = 1; i < num_words; i++) {
|
||||
REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, 0);
|
||||
}
|
||||
|
||||
start_op(RSA_MOD_MULT_START_REG);
|
||||
}
|
||||
|
|
@ -84,11 +84,17 @@ inline static size_t block_length(esp_sha_type type)
|
|||
case SHA2_224:
|
||||
case SHA2_256:
|
||||
return 64;
|
||||
#if SOC_SHA_SUPPORT_SHA384
|
||||
case SHA2_384:
|
||||
#endif
|
||||
#if SOC_SHA_SUPPORT_SHA512
|
||||
case SHA2_512:
|
||||
#endif
|
||||
#if SOC_SHA_SUPPORT_SHA512_T
|
||||
case SHA2_512224:
|
||||
case SHA2_512256:
|
||||
case SHA2_512T:
|
||||
#endif
|
||||
return 128;
|
||||
default:
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -656,6 +656,98 @@ TEST_CASE("mbedtls CFB128 stream test", "[aes]")
|
|||
print(ct_arr)
|
||||
*/
|
||||
|
||||
/* Test the case where the input and output buffers point to the same location */
|
||||
TEST_CASE("mbedtls CTR, input buf = output buf", "[aes]")
|
||||
{
|
||||
const unsigned SZ = 1000;
|
||||
mbedtls_aes_context ctx;
|
||||
uint8_t nonce[16];
|
||||
uint8_t stream_block[16];
|
||||
size_t nc_off = 0;
|
||||
|
||||
const uint8_t expected_cipher_end[] = {
|
||||
0xd4, 0xdc, 0x4f, 0x8f, 0xfe, 0x86, 0xee, 0xb5,
|
||||
0x14, 0x7f, 0xba, 0x30, 0x25, 0xa6, 0x7f, 0x6c,
|
||||
0xb5, 0x73, 0xaf, 0x90, 0xd7, 0xff, 0x36, 0xba,
|
||||
0x2b, 0x1d, 0xec, 0xb9, 0x38, 0xfa, 0x0d, 0xeb,
|
||||
};
|
||||
|
||||
memcpy(nonce, iv, 16);
|
||||
|
||||
// allocate internal memory
|
||||
uint8_t *buf = heap_caps_malloc(SZ, MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
|
||||
|
||||
TEST_ASSERT_NOT_NULL(buf);
|
||||
|
||||
mbedtls_aes_init(&ctx);
|
||||
mbedtls_aes_setkey_enc(&ctx, key_256, 256);
|
||||
|
||||
memset(buf, 0x3A, SZ);
|
||||
|
||||
// Encrypt
|
||||
mbedtls_aes_crypt_ctr(&ctx, SZ, &nc_off, nonce, stream_block, buf, buf);
|
||||
TEST_ASSERT_EQUAL_HEX8_ARRAY(expected_cipher_end, buf + SZ - 32, 32);
|
||||
|
||||
// Decrypt
|
||||
nc_off = 0;
|
||||
memcpy(nonce, iv, 16);
|
||||
mbedtls_aes_crypt_ctr(&ctx, SZ, &nc_off, nonce, stream_block, buf, buf);
|
||||
|
||||
for (int i = 0; i < SZ; i++) {
|
||||
TEST_ASSERT_EQUAL_HEX8(0x3A, buf[i]);
|
||||
}
|
||||
|
||||
free(buf);
|
||||
}
|
||||
|
||||
TEST_CASE("mbedtls OFB, chained DMA descriptors", "[aes]")
|
||||
{
|
||||
// Max bytes in a single DMA descriptor is 4095
|
||||
const unsigned SZ = 6000;
|
||||
mbedtls_aes_context ctx;
|
||||
uint8_t nonce[16];
|
||||
size_t nc_off = 0;
|
||||
|
||||
const uint8_t expected_cipher_end[] = {
|
||||
0xfe, 0xfa, 0xc9, 0x26, 0xb5, 0xc9, 0xea, 0xb0,
|
||||
0xdd, 0x1e, 0xe7, 0x0e, 0xfa, 0x5b, 0x4b, 0x94,
|
||||
0xaa, 0x5f, 0x60, 0x1e, 0xb2, 0x19, 0x3c, 0x2e,
|
||||
0xf6, 0x73, 0x56, 0x9f, 0xa7, 0xd5, 0xb7, 0x21,
|
||||
};
|
||||
|
||||
memcpy(nonce, iv, 16);
|
||||
|
||||
// allocate internal memory
|
||||
uint8_t *chipertext = heap_caps_malloc(SZ, MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
|
||||
uint8_t *plaintext = heap_caps_malloc(SZ, MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
|
||||
uint8_t *decryptedtext = heap_caps_malloc(SZ, MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
|
||||
|
||||
TEST_ASSERT_NOT_NULL(chipertext);
|
||||
TEST_ASSERT_NOT_NULL(plaintext);
|
||||
TEST_ASSERT_NOT_NULL(decryptedtext);
|
||||
|
||||
mbedtls_aes_init(&ctx);
|
||||
mbedtls_aes_setkey_enc(&ctx, key_256, 256);
|
||||
|
||||
memset(plaintext, 0x3A, SZ);
|
||||
memset(decryptedtext, 0x0, SZ);
|
||||
|
||||
// Encrypt
|
||||
mbedtls_aes_crypt_ofb(&ctx, SZ, &nc_off, nonce, plaintext, chipertext);
|
||||
TEST_ASSERT_EQUAL_HEX8_ARRAY(expected_cipher_end, chipertext + SZ - 32, 32);
|
||||
|
||||
|
||||
// Decrypt
|
||||
nc_off = 0;
|
||||
memcpy(nonce, iv, 16);
|
||||
mbedtls_aes_crypt_ofb(&ctx, SZ, &nc_off, nonce, chipertext, decryptedtext);
|
||||
|
||||
TEST_ASSERT_EQUAL_HEX8_ARRAY(plaintext, decryptedtext, SZ);
|
||||
|
||||
free(plaintext);
|
||||
free(chipertext);
|
||||
free(decryptedtext);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -100,7 +100,7 @@ TEST_CASE("test MPI multiplication", "[bignum]")
|
|||
/* Run some trivial numbers tests w/ various high modulo bit counts,
|
||||
should make no difference to the result
|
||||
*/
|
||||
for(int i = 512; i <= 4096; i+= 512) {
|
||||
for(int i = 512; i <= SOC_RSA_MAX_BIT_LEN; i+= 512) {
|
||||
test_bignum_mult("10", "100", "1000",
|
||||
i);
|
||||
}
|
||||
|
|
@ -138,6 +138,7 @@ TEST_CASE("test MPI multiplication", "[bignum]")
|
|||
"02603AF70D0421C1AD82CE623F28F70B128118D06D00C27D433EC25BA86E6105C3890A0B1973B8BE068CA68E159A21078785DDB37F94216FBF4AEC939958AF4B8CEA2A48895CECA87562FC846EAAE0C866AF9D41EEABFB1D579F5828E9666A15E2AF946F16A189B5C645872FDCA247D309AB0BCAFB0D112881186FCFFEDC87061B4AE4A375E9BBCF579A7BC87A8EAC8C6F66E107986FC603F920F5E1A0FD8C619D88D90066FFFC8F4DB77437EBD7E3BD7E398C4C01F93426E347E039DCA7B0A73C0C90A9C4271BB761ADFF88971D190CE5DA98EFC5D7390D33BC034908AF81D784A4D7F32D0902E0C5DABC706635D5A28FC0E3A364EDEB21E8E117041D0E4B51CA6F9684F434057E7FCF2AF6BD050334B1D11E043B0967154E57354B681161D3C618974D5A7E0385755B80B931AE9B59DD4402BAEC206F04B8440741B3C4CA6D9F7DAF0AE6B3BF1B24B76C2F12B9E9A7C50D32E2093608FC9A30CBD852329E64A9AE0BC3F513899EBFA28629C1DF38081FB8C6630408F70D7B9A37701ABA4176C8B7DCB8CC78BD7783B861A7FC50862E75191DB8",
|
||||
4096);
|
||||
|
||||
|
||||
/* multiply two very large numbers (4080 bits x 4088 bits) with and without overlapping multipliers/multiplicant */
|
||||
test_bignum_mult("B96BF707C8CD3CA5AE8247C5CA2AF98140EFAE60179BE3F5BEAD7DA3C6D17404C529239DD1EFE6CADAE1AAFB4FE936B0107839C28A7861E4364EB093CB4698E4BBF6BD8BEF85D9B35781D14AEE1BE86E57B49DF98896CF037CCBD8C622603D84891FD6AC48BE4728E564E64FB715C149C243BAA289569D0FF2E0C9E183D38C8A669CEFF542737E35F3E484D39FF7A3727EF8DB733DAB3E359E1456C0AE33C358EFEC8079EDDD5D58E09B37744EE1DBDF567742CFC0CE98BCC9AD90242ECCF7F6FA696C8C1B32A4D7285C56AB3658DB1AD89A7331F69DEFE212DE8EEEE5B377EC7A4112A27A0FD02EFABB9D3025F6563B65DC214A38A6E7BF8C78B6A3D2A8BA12D75BFBF26ACA655EF13A145AC18D2A6C9B535AAF8290314A2512451B3BD6DA19C42F1FD1B958E1F49303EDEC0392A8CD8450FBC177B26FD2D6CC23F051655565B42FEDE9685A9E708CFC8EA766B94D7B9B627BFA98945BB8EF88E9E7FB696BC4729240F1C25F7085E8C8A9DE2241BBC388FFC65E0058B4327D554FD2D8AA872614052C38BE177F9EC0E705DFDD5F82DD5ED49DAF3582CA64E7F14CE97FD6F25B53FD888D1593450EDC5E79A947F18D0917E01F66ACE99FF4A249C14957A9860B839CEE5096F78FE02C7610E558FC0FCA803A6EF0FBA64AB94893E61080BC5D2AC5DA548E9E0D8E2B63BAB6B82247DF22007D925711E0FE45EB14B92665B6",
|
||||
"C15B96BF707C8CD3CA5AE8247C5CA2AF98140EFAE60179BE3F5BEAD7DA3C6D17404C529239DD1EFE6CADAE1AAFB4FE936B0107839C28A7861E4364EB093CB4698E4BBF6BD8BEF85D9B35781D14AEE1BE86E57B49DF98896CF037CCBD8C622603D84891FD6AC48BE4728E564E64FB715C149C243BAA289569D0FF2E0C9E183D38C8A669CEFF542737E35F3E484D39FF7A3727EF8DB733DAB3E359E1456C0AE33C358EFEC8079EDDD5D58E09B37744EE1DBDF567742CFC0CE98BCC9AD90242ECCF7F6FA696C8C1B32A4D7285C56AB3658DB1AD89A7331F69DEFE212DE8EEEE5B377EC7A4112A27A0FD02EFABB9D3025F6563B65DC214A38A6E7BF8C78B6A3D2A8BA12D75BFBF26ACA655EF13A145AC18D2A6C9B535AAF8290314A2512451B3BD6DA19C42F1FD1B958E1F49303EDEC0392A8CD8450FBC177B26FD2D6CC23F051655565B42FEDE9685A9E708CFC8EA766B94D7B9B627BFA98945BB8EF88E9E7FB696BC4729240F1C25F7085E8C8A9DE2241BBC388FFC65E0058B4327D554FD2D8AA872614052C38BE177F9EC0E705DFDD5F82DD5ED49DAF3582CA64E7F14CE97FD6F25B53FD888D1593450EDC5E79A947F18D0917E01F66ACE99FF4A249C14957A9860B839CEE5096F78FE02C7610E558FC0FCA803A6EF0FBA64AB94893E61080BC5D2AC5DA548E9E0D8E2B63BAB6B82247DF22007D925711E0FE45EB14B92665B6",
|
||||
|
|
|
|||
|
|
@ -366,9 +366,6 @@ TEST_CASE("mbedtls SHA, input in flash", "[mbedtls]")
|
|||
TEST_ASSERT_EQUAL_MEMORY_MESSAGE(test_vector_digest, sha256, 32, "SHA256 calculation");
|
||||
}
|
||||
|
||||
/* ESP32 do not have SHA512/t functions */
|
||||
#if !DISABLED_FOR_TARGETS(ESP32)
|
||||
|
||||
/* Function are not implemented in SW */
|
||||
#if CONFIG_MBEDTLS_HARDWARE_SHA && SOC_SHA_SUPPORT_SHA512_T
|
||||
|
||||
|
|
@ -491,4 +488,3 @@ TEST_CASE("mbedtls SHA256 PSRAM DMA", "[mbedtls]")
|
|||
#endif //CONFIG_SPIRAM
|
||||
|
||||
#endif //CONFIG_MBEDTLS_HARDWARE_SHA
|
||||
#endif //!DISABLED_FOR_TARGETS(ESP32S2)
|
||||
|
|
|
|||
|
|
@ -5,7 +5,6 @@
|
|||
|
||||
*/
|
||||
#include <string.h>
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <esp_system.h>
|
||||
#include "mbedtls/rsa.h"
|
||||
|
|
@ -13,10 +12,7 @@
|
|||
#include "mbedtls/x509_crt.h"
|
||||
#include "mbedtls/entropy_poll.h"
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "unity.h"
|
||||
#include "sdkconfig.h"
|
||||
#include "test_utils.h"
|
||||
#include "ccomp_timer.h"
|
||||
|
||||
|
|
@ -53,6 +49,35 @@ static const char *rsa4096_cert = "-----BEGIN CERTIFICATE-----\n"\
|
|||
"cjvvf0utMW5fNjTTxu1nnpuxZM3ifTCqZJ+9\n"\
|
||||
"-----END CERTIFICATE-----\n";
|
||||
|
||||
static const char *rsa3072_cert = "-----BEGIN CERTIFICATE-----\n"\
|
||||
"MIIEszCCAxugAwIBAgIUNTBsyv59/rRarOVm3KBA29zqEtUwDQYJKoZIhvcNAQEL\n"\
|
||||
"BQAwaTELMAkGA1UEBhMCQ04xETAPBgNVBAgMCFNoYW5naGFpMREwDwYDVQQHDAhT\n"\
|
||||
"aGFuZ2hhaTESMBAGA1UECgwJRXNwcmVzc2lmMQwwCgYDVQQLDANJREYxEjAQBgNV\n"\
|
||||
"BAMMCWVzcHJlc3NpZjAeFw0yMDA3MTQwODQ5NDdaFw0yMTA3MTQwODQ5NDdaMGkx\n"\
|
||||
"CzAJBgNVBAYTAkNOMREwDwYDVQQIDAhTaGFuZ2hhaTERMA8GA1UEBwwIU2hhbmdo\n"\
|
||||
"YWkxEjAQBgNVBAoMCUVzcHJlc3NpZjEMMAoGA1UECwwDSURGMRIwEAYDVQQDDAll\n"\
|
||||
"c3ByZXNzaWYwggGiMA0GCSqGSIb3DQEBAQUAA4IBjwAwggGKAoIBgQDMj3ZwPd2y\n"\
|
||||
"+UxzmMUdZC5I5JQIzvUmHRNJWUe99Vht/rIEQuNSGg7xjyvuZoyeFo+Yg+QYUICa\n"\
|
||||
"Ipe4y2bZS12QsTxUmeoEhYORDSeQXFEo4aUmWuKIs6Y41dBOL7eDYDL3FRmIgmcn\n"\
|
||||
"qMonyCrSzXlcgHOVtMd8U8ifkX5u+nTigQLSIHVeAFz8CvC0tIiPm9YFurtMN15p\n"\
|
||||
"P1K/AH17ljtwVqacrI/asZgX+ECY5rauNJLigEYgfr7+xV6GofaXp6rUpGgWbVxM\n"\
|
||||
"hqKe/dbDuIzte3VK+zRDNDCeE5gPQjgoSDblOVmPemrq7KKjZ/PKmP47ct5a/0Ov\n"\
|
||||
"zWcdCgaXDRoPiwbpmz3Z6uh3JdvsDf214svLK+z4EDIRzpvggM0pfDvOADatiPkr\n"\
|
||||
"KmnFD1ZZx3R29/7IZ5OVvQL1hgWbm3cL4JADOc8PQKcqCzBE9JDdAVoa228ESaJ/\n"\
|
||||
"n4b63qaqfgBnoaFzCEruEcXj5nuXBxlk19WWtgY1tZtAgoA8hTWxxH0CAwEAAaNT\n"\
|
||||
"MFEwHQYDVR0OBBYEFPlwrvgkde/r+F8VRMMtpDUIxAtgMB8GA1UdIwQYMBaAFPlw\n"\
|
||||
"rvgkde/r+F8VRMMtpDUIxAtgMA8GA1UdEwEB/wQFMAMBAf8wDQYJKoZIhvcNAQEL\n"\
|
||||
"BQADggGBAH9nBaEP+FWyaZnmxCblKhs8eIEYXzjxbnRUPo5b3uL/PAv1XD1kEUwY\n"\
|
||||
"GWnJ7Z5HOSCdVMgo1opmKGLWuiVP6Vlt9QuA/tWh0bGScL4QfriPXuA7aXAcLbW/\n"\
|
||||
"BqHNJ9Z+H2Fq09XktkZE4Nfnv3iTMMqfNCchM3t3iWZRf2sRVYIdd5OjhM+CLLUK\n"\
|
||||
"kYNiseAgbcBX0/kqTdHlC6OS8Mcu9btJ/663DZy8tndf+PH+EB6fexQd9T31jWoj\n"\
|
||||
"OkEkJ4vDRZP+0LceK7kNcMOcLx8DnF9LwUyHQitW7NMFServoTfxy8A0yep7nIOH\n"\
|
||||
"M/ndECzirQ6WkR9jMG3cw0Jm5mZvA9IAvnLhUO45AyZGC8mShJ0AaXtqejqPg9ng\n"\
|
||||
"//5VIpzoqwVkrMYlMA7ZrccQiRsd2nlBHr+64PRwRCp7y5FOxIzhGzsJibXUpO/V\n"\
|
||||
"FNwuPz+VcnPvJE7r4gB1oRViiGYojMDQV3G+jbgvpTHKUKP6zzavSAKs+FlfEAmh\n"\
|
||||
"EtmuT/beDA==\n"\
|
||||
"-----END CERTIFICATE-----\n";
|
||||
|
||||
/* Root cert from openssl s_client -connect google.com:443 -showcerts
|
||||
*/
|
||||
static const char *rsa2048_cert = "-----BEGIN CERTIFICATE-----\n"\
|
||||
|
|
@ -150,6 +175,33 @@ static const uint8_t pki_rsa4096_output[] = {
|
|||
0x7c, 0xca, 0x8c, 0x00, 0xfc, 0xb9, 0x2c, 0x23,
|
||||
};
|
||||
|
||||
static const uint8_t pki_rsa3072_output[] = {
|
||||
0x86, 0xc0, 0xe4, 0xa5, 0x4b, 0x45, 0xe4, 0xd4, 0x0f, 0xb7, 0xe3, 0x10, 0x4f, 0xea, 0x88, 0x91,
|
||||
0x3d, 0xad, 0x43, 0x86, 0x90, 0xf0, 0xd8, 0xf0, 0x29, 0x21, 0xc7, 0x5c, 0x75, 0x49, 0x91, 0xce,
|
||||
0xf8, 0x34, 0x91, 0xbd, 0x89, 0x61, 0xcf, 0x47, 0x0e, 0x4d, 0x3f, 0x29, 0xd1, 0x02, 0xa7, 0xa8,
|
||||
0x8f, 0x6a, 0xda, 0x1a, 0xf2, 0xf1, 0x18, 0x92, 0x35, 0xf6, 0x0c, 0x07, 0x5a, 0x84, 0xfa, 0x65,
|
||||
0xd3, 0x02, 0xe0, 0x53, 0x17, 0x5d, 0xf7, 0x45, 0x26, 0xcc, 0xf9, 0x26, 0xf5, 0x6a, 0x66, 0xbb,
|
||||
0xef, 0x33, 0xcb, 0x03, 0x6e, 0x6a, 0x93, 0x6c, 0x2a, 0x27, 0xa7, 0xf7, 0x2c, 0xdc, 0x00, 0xdd,
|
||||
0x98, 0x52, 0xfb, 0xce, 0x31, 0xe2, 0x96, 0x20, 0x98, 0x0a, 0xf4, 0x19, 0x0f, 0xbf, 0x22, 0xed,
|
||||
0x37, 0xb2, 0x14, 0x10, 0x88, 0xa3, 0x6a, 0x43, 0x26, 0xb8, 0x54, 0xf1, 0xb8, 0xc6, 0x56, 0xb7,
|
||||
0x89, 0x34, 0xc0, 0xba, 0xae, 0x38, 0x35, 0x2c, 0x13, 0x57, 0x7a, 0xa4, 0x4b, 0xf2, 0x21, 0x82,
|
||||
0xf4, 0xea, 0x1a, 0x2c, 0xd8, 0x32, 0xe8, 0x5f, 0x37, 0x04, 0x52, 0x3d, 0xff, 0xc2, 0x85, 0x00,
|
||||
0xd2, 0x8d, 0x84, 0x36, 0x61, 0x61, 0x7b, 0xea, 0x7c, 0x3d, 0xeb, 0x51, 0xea, 0xf2, 0x67, 0xc9,
|
||||
0xb8, 0xa6, 0x98, 0x54, 0x3f, 0x5b, 0x8f, 0x1a, 0x8a, 0x93, 0x81, 0x05, 0xa3, 0x15, 0xf8, 0x54,
|
||||
0x8f, 0x75, 0xe2, 0x01, 0xc3, 0x47, 0xc3, 0x8f, 0xc7, 0x6d, 0x04, 0xbc, 0x05, 0x88, 0xd9, 0x62,
|
||||
0xcc, 0x14, 0xea, 0x30, 0x68, 0x73, 0xd5, 0xe5, 0x53, 0x7c, 0xb1, 0xa0, 0xe5, 0x6c, 0xd0, 0xa3,
|
||||
0x07, 0x2a, 0x5e, 0x2a, 0x0f, 0x89, 0x39, 0xea, 0xf9, 0xf5, 0xfb, 0x3b, 0xee, 0x66, 0xd9, 0xd4,
|
||||
0x04, 0x2d, 0x1b, 0xc9, 0xc2, 0x37, 0xc8, 0xa8, 0x71, 0xea, 0xa8, 0xf6, 0xe6, 0xc1, 0xdc, 0x5b,
|
||||
0x70, 0x68, 0x89, 0xa5, 0x69, 0xc0, 0x7f, 0x15, 0x8b, 0x6d, 0xc6, 0x88, 0x41, 0x8b, 0x25, 0x8f,
|
||||
0x2f, 0x5c, 0x81, 0x94, 0x1b, 0x8c, 0x52, 0x3f, 0xe5, 0x97, 0x6d, 0x4a, 0xc6, 0x42, 0x35, 0x0e,
|
||||
0x59, 0xce, 0x00, 0x3c, 0x2b, 0x0f, 0x5a, 0xc5, 0x1b, 0x01, 0xf3, 0x02, 0x70, 0xb1, 0x88, 0xda,
|
||||
0x7b, 0x5b, 0x4d, 0x3e, 0xd1, 0x15, 0x57, 0xc8, 0x39, 0x14, 0xff, 0x8d, 0x2b, 0x12, 0xf5, 0x5b,
|
||||
0xaf, 0x78, 0x2e, 0x0b, 0xcd, 0x27, 0x83, 0xdb, 0x4e, 0xe1, 0x5d, 0xa5, 0xbd, 0xfe, 0x2b, 0x6e,
|
||||
0x8b, 0x54, 0x7d, 0x14, 0x6f, 0x4d, 0xe1, 0x14, 0xc8, 0x30, 0x0e, 0x10, 0x23, 0x2a, 0xe1, 0xe5,
|
||||
0xee, 0xa3, 0x69, 0x8d, 0xe2, 0x9a, 0xed, 0x0c, 0x23, 0x16, 0x8e, 0x95, 0xae, 0x1a, 0xa2, 0x28,
|
||||
0x61, 0x25, 0xa2, 0x15, 0x74, 0xc4, 0xec, 0x6b, 0x73, 0xb2, 0x8c, 0xd2, 0x64, 0xfd, 0x2b, 0x92,
|
||||
};
|
||||
|
||||
static const uint8_t pki_rsa2048_output[] = {
|
||||
0x47, 0x0b, 0xe5, 0x8a, 0xcd, 0x2f, 0x78, 0x07,
|
||||
0x69, 0x69, 0x70, 0xff, 0x81, 0xdf, 0x96, 0xf0,
|
||||
|
|
@ -219,20 +271,68 @@ static const char privkey_2048_buf[] = "-----BEGIN RSA PRIVATE KEY-----\r\n"
|
|||
"Wzw4ZvDraKlAs7a9CRwS5cpktk5ptK4rc5noSXkvV+yOT75zXat2\r\n"
|
||||
"-----END RSA PRIVATE KEY-----\r\n";
|
||||
|
||||
static const char privkey_3072_buf[] = "-----BEGIN RSA PRIVATE KEY-----\r\n"
|
||||
"MIIG4wIBAAKCAYEAoMPuYRnHVPP49qiPACIsYBLVuj8xH4XqAuXmurOyPPFfKSch\r\n"
|
||||
"52dn97sXvfXQw6hj+iPBeMSzbSAompjx4mUHtwn2+EvyXjqUe8qtI0y12uzXgOr8\r\n"
|
||||
"vdwNLJO1kTmUWxQIa/e6dZpiKcEYYZ6qWNUGVH9IiMB9HdIFLNIdCAAC+gsK+Q0w\r\n"
|
||||
"OT2CwnGOoZ/PzOXHyfte9pJTDk6nQJDKVTBoOLgVcJoCLwctGf7VJ9YI9+YXJKvW\r\n"
|
||||
"1ZYq8PXM8KAVE7KHN7KiskJxDLSR4xuplxdT//LIBJMRvxAEPYohe7QvejFjtQc6\r\n"
|
||||
"WbEJxV/Y4vWHOb2PVGUHATNK2kQ7/N5HgEdxABgLrXQSkGfKKmWwoy/W5TVDS+qX\r\n"
|
||||
"fR/7WeJa/2e2+ZZVSQtiXdrWSKdgEmVdmM43Aso5ppC2C5QBajHAw2MKMZwxLHbI\r\n"
|
||||
"nhQJQMJdmRvXI8Kg/+WEgknxQLFWrRW4ss3wR+2KvZ0eynEuzHkQxtUAWB8xgNAH\r\n"
|
||||
"Bch/tr+xq1g3DFNXAgMBAAECggGAFvaFiScWesLyb8D51AoNjpeCIb0+9gK5vzo5\r\n"
|
||||
"b7eVIPFVJ1qolBYIGrGFnaOL8zaNOUB8NRTbkB3EzvhDrJPDu1hYB3VJpD330YrM\r\n"
|
||||
"mjstypyD16049qGE3DYo/BpeX3gID+vtnTi1BsPHCMKSEGg1JEKeCLJ97JGAHbvR\r\n"
|
||||
"W8AsrKyBH7vLhJGNqNpxhhJ+qwSzOd2G3e9en6+KYkWMMQjeCiP5JAFLiI4c2ha1\r\n"
|
||||
"OaBv3YDnE1zcLdvqPErPwBsNh6e7QLYbEvQj5mZ84/kCbrwFy//+Bf7to0u6weOy\r\n"
|
||||
"8E1HU8UKdJfWsKwh+5BGDnKs8qgVQWJdPJWy25PVgkzp0ZnSKzp2AddMCrI2YHRM\r\n"
|
||||
"Q+G+9bET/D96y7/08EAobDdXCplcPeOVb8ETbQTNTrHJibUCB4fqkN8tR2ZZTQ1F\r\n"
|
||||
"axhmHDThsVFqWk+629j8c6XOQbx2dvzb7YfLK06ShiBcD0V6E7VFXHzR+x/xA9ir\r\n"
|
||||
"zUcgLt9zvzj9puxlkhtzBZKcF3nBAoHBANCtY4NDnFoO+QUS59iz9hsoPAe8+S+U\r\n"
|
||||
"PkvMSN7iziUkiXbXjQsr0v/PLHCuuXRyARBORaI4moLxzbTA1l1C+gBulI29j9zH\r\n"
|
||||
"GwNnl587u5VCpbzuzr5YwHtp85Y1la2/ti+x0Qaw5uoa8G2TqoU4V6SG0qwinQl2\r\n"
|
||||
"9mdNZzVmIBMbE0tTTTzc+CRIPBl9lRQR3Ff3o6eUs6uPE6g1lGZR1ydb2MLBM/wV\r\n"
|
||||
"NgUUf7L5h/s8abrRjS+dnPmtxNgrRZQe9wKBwQDFOQyBzD3xkBgTSFQkU8OgNZyW\r\n"
|
||||
"gNYglE1vLA+wv49NVAErHfKzYf/yw3fkYLDo9JfTJ3KckU6J815VnPXJFNMvjr2J\r\n"
|
||||
"ExXG2JSbZHeUBRgExLU0iFlhQaxbAhuJ6PDrkGy+1ZtsJxYCPpifyNwjkZ0QKQlf\r\n"
|
||||
"n3SwTMXIp0wd80FXVSwKPSuWUlrhByBcJDVwdCIeD8Oi9DrmVe0E9fXDboY2HARb\r\n"
|
||||
"cgrN3n9jnEF/asIsfaHg8EI2z/EVC+C1mHuZdqECgcA5d4ZwH65vHrB1NT+j7etY\r\n"
|
||||
"jzv45ZG6CJkfRqLKvqsGj4lLsRCmgusYh3U1kuh/qOWiF+wVQIFMjkqX/IMMK+Wt\r\n"
|
||||
"OMawQgPcSPind1/J+ikucawy25ET2l0nn4X1V8xgjOsfN1jY/t6YmdKcWo4bIekA\r\n"
|
||||
"5iAeR2n3sUsqJ6bEjdtHZ61okQg0OqYbV8k1O+BSJpkHoKrw+4J/PGetaxPzGZam\r\n"
|
||||
"wCRxfcNTKIQ34e1I3G8WQQzc5dh7xGv2VmRfI4uFvwECgcEAuNGAVfZ3KfNVjGRg\r\n"
|
||||
"bXaNwYncBvIPN5KiigbpYUHyYY3SVnyHHvE8cFwa80plHrlvubGi5vQIfKAzC9m+\r\n"
|
||||
"PsSkL1H9bgITizcU9BYPNQgc/QL1qJgJ4mkvwk1UT0Wa17WNIrx8HLr4Ffxg/IO3\r\n"
|
||||
"QCHJ5QX/wbtlF32qbyHP49U8q0GmtqWiPglJHs2V1qMb7Rj3i+JL/F4RAB8PsXFo\r\n"
|
||||
"8M6XOQfCUYuqckgKaudYPbZm5liJJYkhE8qD6qwp1SNi2GphAoHABjUL8DTHgBWn\r\n"
|
||||
"sr9/XQyornm0sruHcwr7SmGqIJ/hZUUYd4UfDW76e8SjvhRQ7nkpR3f4+LEBCqaJ\r\n"
|
||||
"LDJDhg+6AColwKaWRWV9M1GXHhVD4vaTM46JAvH9wbhmJDUORHq8viyHlwO9QKpK\r\n"
|
||||
"iHE/MtcYb5QBGP5md5wc8LY1lcQazDsJMLlcYNk6ZICNWWrcc2loG4VeOERpHU02\r\n"
|
||||
"6AsKaaMGqBp/T9wYwFPUzk1i+jWCu66xfCYKvEubNdxT/R5juXrd\r\n"
|
||||
"-----END RSA PRIVATE KEY-----\r\n";
|
||||
|
||||
#endif
|
||||
|
||||
_Static_assert(sizeof(pki_rsa2048_output) == 2048/8, "rsa2048 output is wrong size");
|
||||
_Static_assert(sizeof(pki_rsa3072_output) == 3072/8, "rsa3072 output is wrong size");
|
||||
_Static_assert(sizeof(pki_rsa4096_output) == 4096/8, "rsa4096 output is wrong size");
|
||||
|
||||
static void test_cert(const char *cert, const uint8_t *expected_output, size_t output_len);
|
||||
void mbedtls_mpi_printf(const char *name, const mbedtls_mpi *X);
|
||||
|
||||
|
||||
TEST_CASE("mbedtls RSA4096 cert", "[mbedtls]")
|
||||
{
|
||||
|
||||
test_cert(rsa4096_cert, pki_rsa4096_output, 4096/8);
|
||||
}
|
||||
|
||||
TEST_CASE("mbedtls RSA3072 cert", "[mbedtls]")
|
||||
{
|
||||
|
||||
test_cert(rsa3072_cert, pki_rsa3072_output, 3072/8);
|
||||
}
|
||||
|
||||
TEST_CASE("mbedtls RSA2048 cert", "[mbedtls]")
|
||||
{
|
||||
test_cert(rsa2048_cert, pki_rsa2048_output, 2048/8);
|
||||
|
|
@ -243,6 +343,7 @@ static void test_cert(const char *cert, const uint8_t *expected_output, size_t o
|
|||
mbedtls_x509_crt crt;
|
||||
mbedtls_rsa_context *rsa;
|
||||
char buf[output_len];
|
||||
int res;
|
||||
|
||||
bzero(buf, output_len);
|
||||
|
||||
|
|
@ -257,15 +358,22 @@ static void test_cert(const char *cert, const uint8_t *expected_output, size_t o
|
|||
rsa = mbedtls_pk_rsa(crt.pk);
|
||||
TEST_ASSERT_NOT_NULL(rsa);
|
||||
|
||||
res = mbedtls_rsa_check_pubkey(rsa);
|
||||
TEST_ASSERT_EQUAL_HEX16_MESSAGE(0,
|
||||
-mbedtls_rsa_check_pubkey(rsa),
|
||||
-res,
|
||||
"check cert pubkey");
|
||||
|
||||
mbedtls_x509_crt_info(buf, sizeof(buf), "", &crt);
|
||||
puts(buf);
|
||||
|
||||
res = mbedtls_rsa_public(rsa, pki_input, (uint8_t *)buf);
|
||||
if (res == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE + MBEDTLS_ERR_RSA_PUBLIC_FAILED) {
|
||||
mbedtls_x509_crt_free(&crt);
|
||||
TEST_IGNORE_MESSAGE("Hardware does not support this key length");
|
||||
}
|
||||
|
||||
TEST_ASSERT_EQUAL_HEX16_MESSAGE(0,
|
||||
-mbedtls_rsa_public(rsa, pki_input, (uint8_t *)buf),
|
||||
-res,
|
||||
"RSA PK operation");
|
||||
|
||||
/*
|
||||
|
|
@ -309,24 +417,40 @@ static void print_rsa_details(mbedtls_rsa_context *rsa)
|
|||
|
||||
TEST_CASE("test performance RSA key operations", "[bignum]")
|
||||
{
|
||||
for (int keysize = 2048; keysize <= 4096; keysize += 2048) {
|
||||
for (int keysize = 2048; keysize <= SOC_RSA_MAX_BIT_LEN; keysize += 1024) {
|
||||
rsa_key_operations(keysize, true, false, false);
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("test RSA-3072 calculations", "[bignum]")
|
||||
{
|
||||
// use pre-genrated keys to make the test run a bit faster
|
||||
rsa_key_operations(3072, false, true, false);
|
||||
}
|
||||
|
||||
TEST_CASE("test RSA-2048 calculations", "[bignum]")
|
||||
{
|
||||
// use pre-genrated keys to make the test run a bit faster
|
||||
rsa_key_operations(2048, false, true, false);
|
||||
}
|
||||
|
||||
|
||||
TEST_CASE("test RSA-4096 calculations", "[bignum]")
|
||||
{
|
||||
// use pre-genrated keys to make the test run a bit faster
|
||||
rsa_key_operations(4096, false, true, false);
|
||||
}
|
||||
|
||||
|
||||
static void rsa_key_operations(int keysize, bool check_performance, bool use_blinding, bool generate_new_rsa)
|
||||
{
|
||||
mbedtls_pk_context clientkey;
|
||||
mbedtls_rsa_context rsa;
|
||||
unsigned char orig_buf[4096 / 8];
|
||||
unsigned char encrypted_buf[4096 / 8];
|
||||
unsigned char decrypted_buf[4096 / 8];
|
||||
int public_perf, private_perf;
|
||||
int res = 0;
|
||||
|
||||
printf("First, orig_buf is encrypted by the public key, and then decrypted by the private key\n");
|
||||
printf("keysize=%d check_performance=%d use_blinding=%d generate_new_rsa=%d\n", keysize, check_performance, use_blinding, generate_new_rsa);
|
||||
|
|
@ -336,20 +460,28 @@ static void rsa_key_operations(int keysize, bool check_performance, bool use_bli
|
|||
if (generate_new_rsa) {
|
||||
mbedtls_rsa_init(&rsa, MBEDTLS_RSA_PRIVATE, 0);
|
||||
TEST_ASSERT_EQUAL(0, mbedtls_rsa_gen_key(&rsa, myrand, NULL, keysize, 65537));
|
||||
} else if (keysize==4096) {
|
||||
mbedtls_pk_context clientkey;
|
||||
} else {
|
||||
mbedtls_pk_init(&clientkey);
|
||||
TEST_ASSERT_EQUAL(0, mbedtls_pk_parse_key(&clientkey, (const uint8_t *)privkey_4096_buf, sizeof(privkey_4096_buf), NULL, 0));
|
||||
|
||||
switch(keysize) {
|
||||
case 4096:
|
||||
res = mbedtls_pk_parse_key(&clientkey, (const uint8_t *)privkey_4096_buf, sizeof(privkey_4096_buf), NULL, 0);
|
||||
break;
|
||||
case 3072:
|
||||
res = mbedtls_pk_parse_key(&clientkey, (const uint8_t *)privkey_3072_buf, sizeof(privkey_3072_buf), NULL, 0);
|
||||
break;
|
||||
case 2048:
|
||||
res = mbedtls_pk_parse_key(&clientkey, (const uint8_t *)privkey_2048_buf, sizeof(privkey_2048_buf), NULL, 0);
|
||||
break;
|
||||
default:
|
||||
TEST_FAIL_MESSAGE("unsupported keysize, pass generate_new_rsa=true or update test");
|
||||
}
|
||||
|
||||
TEST_ASSERT_EQUAL_HEX16(0, -res);
|
||||
|
||||
memcpy(&rsa, mbedtls_pk_rsa(clientkey), sizeof(mbedtls_rsa_context));
|
||||
} else if (keysize==2048) {
|
||||
mbedtls_pk_context clientkey;
|
||||
mbedtls_pk_init(&clientkey);
|
||||
TEST_ASSERT_EQUAL(0, mbedtls_pk_parse_key(&clientkey, (const uint8_t *)privkey_2048_buf, sizeof(privkey_2048_buf), NULL, 0));
|
||||
memcpy(&rsa, mbedtls_pk_rsa(clientkey), sizeof(mbedtls_rsa_context));
|
||||
} else { // pre-generated private key only available for keysize=4096 and 2048
|
||||
printf("Not supported keysize, please use generate_new_rsa=true\n");
|
||||
abort();
|
||||
}
|
||||
|
||||
#ifdef PRINT_DEBUG_INFO
|
||||
print_rsa_details(&rsa);
|
||||
#endif
|
||||
|
|
@ -357,12 +489,21 @@ static void rsa_key_operations(int keysize, bool check_performance, bool use_bli
|
|||
TEST_ASSERT_EQUAL(keysize, (int)rsa.len * 8);
|
||||
TEST_ASSERT_EQUAL(keysize, (int)rsa.D.n * sizeof(mbedtls_mpi_uint) * 8); // The private exponent
|
||||
|
||||
ccomp_timer_start();;
|
||||
TEST_ASSERT_EQUAL(0, mbedtls_rsa_public(&rsa, orig_buf, encrypted_buf));
|
||||
ccomp_timer_start();
|
||||
res = mbedtls_rsa_public(&rsa, orig_buf, encrypted_buf);
|
||||
public_perf = ccomp_timer_stop();
|
||||
|
||||
ccomp_timer_start();;
|
||||
TEST_ASSERT_EQUAL(0, mbedtls_rsa_private(&rsa, use_blinding?myrand:NULL, NULL, encrypted_buf, decrypted_buf));
|
||||
if (res == MBEDTLS_ERR_MPI_NOT_ACCEPTABLE + MBEDTLS_ERR_RSA_PUBLIC_FAILED) {
|
||||
mbedtls_rsa_free(&rsa);
|
||||
TEST_IGNORE_MESSAGE("Hardware does not support this key length");
|
||||
}
|
||||
TEST_ASSERT_EQUAL_HEX16(0, -res);
|
||||
|
||||
ccomp_timer_start();
|
||||
res = mbedtls_rsa_private(&rsa, use_blinding?myrand:NULL, NULL, encrypted_buf, decrypted_buf);
|
||||
private_perf = ccomp_timer_stop();
|
||||
TEST_ASSERT_EQUAL_HEX16(0, -res);
|
||||
|
||||
private_perf = ccomp_timer_stop();
|
||||
|
||||
if (check_performance && keysize == 2048) {
|
||||
|
|
|
|||
|
|
@ -1,26 +0,0 @@
|
|||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
#define SOC_RSA_MAX_BIT_LEN (3072)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -1,54 +0,0 @@
|
|||
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Max amount of bytes in a single DMA operation is 4095,
|
||||
for SHA this means that the biggest safe amount of bytes is
|
||||
31 blocks of 128 bytes = 3968
|
||||
*/
|
||||
#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968)
|
||||
#define SOC_SHA_SUPPORT_DMA (1)
|
||||
|
||||
/* ESP32 style SHA engine, where multiple states can be stored in parallel */
|
||||
#define SOC_SHA_SUPPORT_PARALLEL_ENG (0)
|
||||
|
||||
/* The SHA engine is able to resume hashing from a user */
|
||||
#define SOC_SHA_SUPPORT_RESUME (1)
|
||||
|
||||
/* Has "crypto DMA", which is shared with AES */
|
||||
#define SOC_SHA_CRYPTO_DMA (0)
|
||||
|
||||
/* Has a centralized DMA, which is shared with all peripherals */
|
||||
#define SOC_SHA_GENERAL_DMA (1)
|
||||
|
||||
/* Supported HW algorithms */
|
||||
#define SOC_SHA_SUPPORT_SHA1 (1)
|
||||
#define SOC_SHA_SUPPORT_SHA224 (1)
|
||||
#define SOC_SHA_SUPPORT_SHA256 (1)
|
||||
#define SOC_SHA_SUPPORT_SHA256 (1)
|
||||
#define SOC_SHA_SUPPORT_SHA384 (0)
|
||||
#define SOC_SHA_SUPPORT_SHA512 (0)
|
||||
#define SOC_SHA_SUPPORT_SHA512_224 (0)
|
||||
#define SOC_SHA_SUPPORT_SHA512_256 (0)
|
||||
#define SOC_SHA_SUPPORT_SHA512_T (0)
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -11,6 +11,7 @@
|
|||
// There are 3 DMA channels on ESP32-C3
|
||||
// Attention: These fixed DMA channels are temporarily workaround before we have a centralized DMA controller API to help alloc the channel dynamically
|
||||
// Remove them when GDMA driver API is ready
|
||||
#define SOC_GDMA_AES_DMA_CHANNEL (0)
|
||||
#define SOC_GDMA_M2M_DMA_CHANNEL (0)
|
||||
#define SOC_GDMA_SHA_DMA_CHANNEL (1)
|
||||
#define SOC_GDMA_SPI2_DMA_CHANNEL (2)
|
||||
|
|
@ -27,7 +28,6 @@
|
|||
#include "dac_caps.h"
|
||||
#include "i2c_caps.h"
|
||||
#include "mpu_caps.h"
|
||||
#include "rsa_caps.h"
|
||||
#include "sigmadelta_caps.h"
|
||||
#include "systimer_caps.h"
|
||||
#include "uart_caps.h"
|
||||
|
|
@ -41,7 +41,6 @@
|
|||
#include "gpio_caps.h"
|
||||
#include "ledc_caps.h"
|
||||
#include "rmt_caps.h"
|
||||
#include "sha_caps.h"
|
||||
#include "spi_caps.h"
|
||||
#include "uart_caps.h"
|
||||
#include "int_caps.h"
|
||||
|
|
@ -49,9 +48,6 @@
|
|||
/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
|
||||
#define SOC_TOUCH_SENSOR_NUM (0) /*! No touch sensors on ESP32-C3 */
|
||||
|
||||
/*-------------------------- ADC CAPS -------------------------------*/
|
||||
#define SOC_ADC_PERIPH_NUM (2)
|
||||
#define SOC_ADC_PATT_LEN_MAX (16)
|
||||
|
||||
#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) ((PERIPH_NUM==0)? 5 : 1)
|
||||
#define SOC_ADC_MAX_CHANNEL_NUM (10)
|
||||
|
|
@ -64,6 +60,32 @@
|
|||
*/
|
||||
#define SOC_ADC_SUPPORT_DMA_MODE(PERIPH_NUM) 1
|
||||
|
||||
/*--------------------------- SHA CAPS ---------------------------------------*/
|
||||
|
||||
/* Max amount of bytes in a single DMA operation is 4095,
|
||||
for SHA this means that the biggest safe amount of bytes is
|
||||
31 blocks of 128 bytes = 3968
|
||||
*/
|
||||
#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968)
|
||||
#define SOC_SHA_SUPPORT_DMA (1)
|
||||
|
||||
/* The SHA engine is able to resume hashing from a user */
|
||||
#define SOC_SHA_SUPPORT_RESUME (1)
|
||||
|
||||
/* Has a centralized DMA, which is shared with all peripherals */
|
||||
#define SOC_SHA_GENERAL_DMA (1)
|
||||
|
||||
/* Supported HW algorithms */
|
||||
#define SOC_SHA_SUPPORT_SHA1 (1)
|
||||
#define SOC_SHA_SUPPORT_SHA224 (1)
|
||||
#define SOC_SHA_SUPPORT_SHA256 (1)
|
||||
|
||||
|
||||
/*--------------------------- RSA CAPS ---------------------------------------*/
|
||||
#define SOC_RSA_MAX_BIT_LEN (3072)
|
||||
|
||||
|
||||
|
||||
/*-------------------------- AES CAPS -----------------------------------------*/
|
||||
#define SOC_AES_SUPPORT_DMA (1)
|
||||
|
||||
|
|
|
|||
|
|
@ -503,7 +503,7 @@ UT_034:
|
|||
|
||||
UT_035:
|
||||
extends: .unit_test_s2_template
|
||||
parallel: 48
|
||||
parallel: 49
|
||||
tags:
|
||||
- ESP32S2_IDF
|
||||
- UT_T1_1
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue