Wykres commitów

959 Commity (822a7f848c7f86e6bd564dd90128a5bf168ba4c6)

Autor SHA1 Wiadomość Data
IanSB 7e98924d1c Add Mode 7 scaling option 4:3Uneven/Even 2019-12-08 17:27:20 +00:00
IanSB 48ea152931 Add small overscan for cases where integer scaling doesn't quite fit 2019-12-08 14:50:26 +00:00
IanSB c872ce15da Fix for 4 bit screencap with odd numbered frame buffer width 2019-12-08 05:01:28 +00:00
IanSB 1012ce2d6a Fix screencap fractional scaling 2019-12-08 02:45:40 +00:00
IanSB a1e8929954 rename to kicad_analog_6bit 2019-12-08 00:33:55 +00:00
IanSB ad0474fd1f Issue 2 analog board part2 2019-12-08 00:23:14 +00:00
IanSB e9df50f748 Issue 2 analog board with MAX 5259 2019-12-08 00:22:02 +00:00
IanSB d9c35ae2c4 Fix screencaps in 4bpp mode such as mode 7 2019-12-08 00:11:19 +00:00
IanSB 1a2ff36eb1 Update BBC profile default 2019-12-08 00:10:13 +00:00
IanSB f978f4a650 Update profiles 2019-12-08 00:09:34 +00:00
IanSB 3cd8e05eb0 Add gerbers 2019-12-07 16:04:30 +00:00
David Banks 6516568d12 Added all past versions of CPLD firmware for testing
Change-Id: I0f003c226e4b92183e85d0b851183e3448149e41
2019-12-07 15:05:56 +00:00
IanSB 49fd6bee8d Terminator and decoupling caps added plus pcb layout 2019-12-07 13:58:16 +00:00
David Banks 806fcc7dd1 Profiles: Renamed Normal to BBC
Change-Id: Ic6e07addc559f91e36d47fcba8a98a0c16217bb0
2019-12-06 12:15:42 +00:00
IanSB bdd0a71823 First attempt at RGB/YUV board with clamp 2019-12-06 11:19:23 +00:00
David Banks 98170366a5 Refactor xilinx projects so vhdl_bbc and vhdl_RGB_6bit share same vhdl/ucf file
Change-Id: I7c6db57f6b1fe8331dbeaacc81e49e8239349625
2019-12-05 14:34:59 +00:00
David Banks b7ba4a2da0 Remove space from directory name
Change-Id: Ia8c60f571a3e7c82951ab447ef8205588f5e11cb
2019-12-05 13:47:11 +00:00
David Banks 1be2eac571 Rename normal to BBC, tidy cpld header files
Change-Id: I1ff05849ac49071f4b35851ffc1af1ac2b87d1c2
2019-12-05 13:44:01 +00:00
David Banks 3f97bb9ed5 Generate the three cpld_rgb drivers from a single source file
Change-Id: I8183087ed1904a5c16a1621a237603ed91f4fb9a
2019-12-05 11:24:47 +00:00
David Banks 18f8688c4a Merge remote-tracking branch 'ian/dev' into dev
Change-Id: I3d8673c308aa50829938002acd9c06e35e14f2e3
2019-12-05 09:32:01 +00:00
IanSB 06616ed860 Update Atom profile 2019-12-05 00:04:47 +00:00
IanSB 841e965a39 Change "frontend" to "interface". Also fix cosmetic issue during calibration 2019-12-04 23:34:42 +00:00
IanSB 137cb0cc8b Support for new RGB CPLD with TTL / Analog auto detect - ID 4 for TTL and 12 for Analog (P19 changes top bit of ID nibble) 2019-12-04 22:10:16 +00:00
IanSB 516a9840cb Update YUV CPLD for 6 bit board #2 2019-12-04 22:08:18 +00:00
IanSB 40e9b64718 Update YUV CPLD for 6 bit board 2019-12-04 22:07:52 +00:00
IanSB 1a461cff2b New 6 bit RGB CPLD with analog board auto detect 2019-12-04 22:07:24 +00:00
IanSB a984e72a7e Update defaults 2019-12-04 22:06:19 +00:00
IanSB 5a840e766e Update profiles 2019-12-04 22:05:42 +00:00
IanSB 1be15060ac Update firmware 2019-12-04 22:05:16 +00:00
David Banks 81e8dcb5ec Add Pi temp/voltage to info menu
Change-Id: Ie7ad7862e8948a7fe64cf776078b6ad66294aad1
2019-12-04 13:18:46 +00:00
IanSB 7f6109acab Fix Vsync detection bug 2019-12-04 03:24:03 +00:00
IanSB a46580ae99 Update CPLDs. Note: "test_atom_cpld" simulates Atom on 6 bit for software testing only 2019-12-04 01:23:25 +00:00
IanSB 14e1e200af Update profiles into separate folders per CPLD design. Also separate profile.txt for each CPLD named profile_<cpldname>.txt 2019-12-04 01:20:37 +00:00
IanSB 6187fe05f4 Support for new driver. Also split profiles into separate folders for each CPLD 2019-12-04 01:16:25 +00:00
IanSB 0baad9bc6b New driver for yuv6847 CPLD 2019-12-04 01:15:23 +00:00
IanSB db566710d9 Change 6847 CPLD to different type (3) 2019-12-03 23:48:07 +00:00
IanSB 3d7ca5c262 Text spacing 2019-12-03 18:55:32 +00:00
IanSB 2fe50d0548 Merge remote-tracking branch 'upstream/dev' into dev 2019-12-03 17:39:01 +00:00
IanSB 1c49aa7baf Update software to support Atom and 6847 in general on 6 bit board 2019-12-03 17:38:12 +00:00
IanSB 7f067b4ebe New version of Atom YUV CPLD to work with 6 bit board (includes invert bit for 6847 direct connection) 2019-12-03 17:36:53 +00:00
IanSB 6023604999 Update profiles 2019-12-03 17:35:25 +00:00
David Banks d5190bab4e Merge remote-tracking branch 'ian/dev' into dev
Change-Id: I76873f23afabbee4f3c43502fe0b03ecaab4007b
2019-12-02 13:31:50 +00:00
IanSB 1882925d84 Fix enum and parameter names 2019-12-02 11:56:25 +00:00
IanSB 49c0144716 Scaling change for QL 2019-12-01 16:38:45 +00:00
IanSB 4468edd3cb Revert "Tweak mode 7 profiles"
This reverts commit 21023d3d68.
2019-11-30 11:30:26 +00:00
IanSB 21023d3d68 Tweak mode 7 profiles 2019-11-30 10:49:47 +00:00
IanSB b11535b99d Improve scaling, change source size to overscan, add spectrum palettes, add setup modes, add info to calibration summary 2019-11-30 04:21:57 +00:00
IanSB 316f181da8 Update profiles 2019-11-30 04:19:42 +00:00
David Banks 1a42767cd2 Fix typo in menu item label
Change-Id: Id4492c31a57e5b78e8fe1ab12c0a5c92465689a0
2019-11-28 16:35:59 +00:00
David Banks d24ddd6163 Fix CPLD firmware path in release.sh
Change-Id: I9e1f58b5dc30a3061377e57d17e1559d1cfc576f
2019-11-27 12:49:14 +00:00