kopia lustrzana https://github.com/OpenRTX/OpenRTX
116 wiersze
4.0 KiB
C++
116 wiersze
4.0 KiB
C++
/***************************************************************************
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* Copyright (C) 2024 - 2025 by Federico Amedeo Izzo IU2NUO, *
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* Niccolò Izzo IU2KIN *
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* Frederik Saraci IU2NRO *
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* Silvano Seva IU2KWO *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#ifndef LPTIM_H
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#define LPTIM_H
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/**
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* Handler class for STM32H7 LPTIM peripheral.
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*/
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class Lptim
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{
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public:
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/**
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* Constructor.
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*
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* @param tim: base address of timer peripheral to manage.
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* @param baseFreq: timer base input frequency, in Hz.
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*/
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constexpr Lptim(const uint32_t tim, const uint32_t baseFreq) : tim(tim),
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baseFreq(baseFreq) {}
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~Lptim() = default;
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/**
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* Configure timer prescaler and auto-reload registers for a given update
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* frequency.
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*
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* @param updFreq: desidered update frequency, in Hz.
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* @return effective timer update frequency, in Hz.
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*/
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uint32_t setUpdateFrequency(const uint32_t updFreq) const
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{
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/*
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* Timer update frequency is given by:
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* Fupd = (Fbus / prescaler) / autoreload
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*
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* In LPTIM the prescaler can only assume values being powers of two up
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* to 128. To find the correct prescaler and autoreload values we start
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* by setting the the prescaler to 1 and proceed iteratively until the
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* autoreload value is less than the maximum allowed.
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*/
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uint32_t div;
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uint32_t arr;
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uint32_t psc;
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for(div = 0; div < 8; div += 1)
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{
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psc = 1 << div;
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arr = (baseFreq / psc) / updFreq;
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if(arr < 0xFFFF)
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break;
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}
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// Timer needs to be enabled before configuring the other registers.
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reinterpret_cast< LPTIM_TypeDef * >(tim)->CR = LPTIM_CR_ENABLE;
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reinterpret_cast< LPTIM_TypeDef * >(tim)->CFGR = div << 9;
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reinterpret_cast< LPTIM_TypeDef * >(tim)->ARR = arr - 1;
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return (baseFreq / psc) / arr;
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}
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/**
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* Clear and start the timer's counter.
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*/
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inline void start() const
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{
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reinterpret_cast< LPTIM_TypeDef * >(tim)->CNT = 0;
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reinterpret_cast< LPTIM_TypeDef * >(tim)->CR |= LPTIM_CR_CNTSTRT;
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}
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/**
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* Stop the timer's counter.
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*/
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inline void stop() const
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{
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// It seems that the only way to stop the LPTIM is to turn it off. Then
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// we have to turn it on again to allow writing the configuration registers.
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reinterpret_cast< LPTIM_TypeDef * >(tim)->CR = 0;
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reinterpret_cast< LPTIM_TypeDef * >(tim)->CR = LPTIM_CR_ENABLE;
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}
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/**
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* Get current value of timer's counter.
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*
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* @return value of timer's counter.
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*/
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inline uint16_t value() const
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{
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return reinterpret_cast< LPTIM_TypeDef * >(tim)->CNT = 0;
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}
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private:
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const uint32_t tim;
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const uint32_t baseFreq;
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};
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#endif /* LPTIM_H */
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