Fixed reset of DC bias on stream stop in Module 17 output stream driver, made parametric the gain of the RRC at modulator side

openrtx/include/protocols/M17/M17Modulator.h

@@ -111,6 +111,7 @@ private:
     static constexpr size_t M17_TX_SAMPLE_RATE    = 48000;
     static constexpr size_t M17_FRAME_SAMPLES_48K = 1920;
     static constexpr size_t M17_FRAME_SYMBOLS     = 192;
+    static constexpr float  M17_RRC_GAIN          = 7168.0f;
 
     std::array< int16_t, M17_FRAME_SYMBOLS > symbols;
     stream_sample_t  *baseband_buffer;  ///< Buffer for baseband audio handling.

openrtx/src/protocols/M17/M17Modulator.cpp

@@ -97,7 +97,7 @@ void M17Modulator::generateBaseband()
     for(size_t i = 0; i < M17_FRAME_SAMPLES_48K; i++)
     {
         float elem    = static_cast< float >(idleBuffer[i]);
-        idleBuffer[i] = static_cast< int16_t >(M17::rrc(elem) * 7168.0);
+        idleBuffer[i] = static_cast< int16_t >(M17::rrc(elem) * M17_RRC_GAIN);
     }
 }
 

platform/drivers/audio/outputStream_Mod17.cpp

@@ -49,8 +49,8 @@ void stopTransfer()
     DMA1_Stream6->CR = 0;
 
     TIM7->CR1    = 0;              // Shutdown timer
-    DAC->CR     &= ~DAC_CR_EN2;    // Disable only channel 2
     DAC->SR      = 0;              // Clear status flags
+    DAC->CR      = DAC_CR_EN1;     // Keep only channel 1 active
     DAC->DHR12R1 = 2048;           // Set channel 1 (RTX) to VDD/2 when idle
 
     // Clear flags