Biased Module 17 baseband DAC output to Vdd/2 when idle

platform/drivers/audio/outputStream_Mod17.cpp

@@ -44,14 +44,15 @@ static Thread *dmaWaiting = 0;
  */
 void stopTransfer()
 {
-    TIM7->CR1 = 0;    // Shutdown timer
-    DAC->CR   = 0;    // Disable DAC channels
-    DAC->SR   = 0;    // Clear status flags
-
     // Stop DMA transfers
     DMA1_Stream5->CR = 0;
     DMA1_Stream6->CR = 0;
 
+    TIM7->CR1    = 0;              // Shutdown timer
+    DAC->CR     &= ~DAC_CR_EN2;    // Disable only channel 2
+    DAC->SR      = 0;              // Clear status flags
+    DAC->DHR12R1 = 2048;           // Set channel 1 (RTX) to VDD/2 when idle
+
     // Clear flags
     running      = false;
     reqFinish    = false;

platform/targets/Module17/platform.c

@@ -42,6 +42,12 @@ void platform_init()
     gpio_setMode(PTT_OUT, OUTPUT);
     gpio_clearPin(PTT_OUT);
 
+    /* Set analog output for baseband signal to an idle level of VDD/2 */
+    gpio_setMode(BASEBAND_TX, INPUT_ANALOG);
+    RCC->APB1ENR |= RCC_APB1ENR_DACEN;
+    DAC->CR      |= DAC_CR_EN1;
+    DAC->DHR12R1  = 2048;
+
     nvm_init();
     adc1_init();
     i2c_init();