kopia lustrzana https://github.com/Jean-MarcHarvengt/MCUME
add genesis emu to TEECOMPUTER
jean-marcharvengt
rodzic
7472eeec4f
commit
b064204c27
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
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@ -0,0 +1,361 @@
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#include "emuapi.h"
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#ifdef HAS_SND
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#include "AudioPlaySystem.h"
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#include <Arduino.h>
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#define SAMPLERATE AUDIO_SAMPLE_RATE_EXACT
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#define CLOCKFREQ 985248
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#ifndef CUSTOM_SND
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PROGMEM static const short square[]={
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32767,32767,32767,32767,
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32767,32767,32767,32767,
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32767,32767,32767,32767,
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32767,32767,32767,32767,
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32767,32767,32767,32767,
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32767,32767,32767,32767,
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32767,32767,32767,32767,
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32767,32767,32767,32767,
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-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,
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};
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PROGMEM const short noise[] {
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-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,
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-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,-32767,32767,-32767,
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-32767,-32767,32767,-32767,-32767,-32767,32767,-32767,-32767,-32767,32767,-32767,-32767,-32767,32767,-32767,
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-32767,-32767,32767,-32767,-32767,-32767,32767,-32767,-32767,-32767,32767,-32767,-32767,32767,32767,-32767,
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-32767,-32767,32767,-32767,-32767,32767,32767,-32767,-32767,-32767,32767,-32767,-32767,32767,32767,-32767,
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-32767,-32767,32767,-32767,-32767,32767,32767,-32767,-32767,-32767,32767,-32767,32767,32767,32767,-32767,
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32767,-32767,32767,-32767,-32767,32767,32767,-32767,-32767,-32767,32767,-32767,32767,32767,32767,-32767,
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32767,-32767,32767,-32767,-32767,32767,32767,-32767,-32767,-32767,32767,32767,32767,32767,32767,-32767,
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32767,-32767,32767,-32767,-32767,32767,32767,-32767,-32767,-32767,32767,32767,32767,32767,32767,-32767,
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32767,-32767,32767,-32767,-32767,32767,32767,-32767,-32767,-32767,-32767,32767,32767,32767,-32767,-32767,
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32767,-32767,-32767,-32767,-32767,32767,-32767,-32767,-32767,-32767,32767,32767,32767,32767,32767,-32767,
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32767,-32767,32767,-32767,-32767,32767,32767,-32767,-32767,32767,-32767,32767,32767,32767,-32767,-32767,
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32767,32767,-32767,-32767,-32767,32767,-32767,-32767,-32767,-32767,32767,32767,32767,32767,32767,-32767,
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32767,-32767,32767,-32767,-32767,32767,32767,-32767,32767,32767,-32767,32767,-32767,32767,-32767,-32767,
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32767,32767,-32767,-32767,-32767,32767,-32767,-32767,-32767,-32767,32767,32767,32767,32767,32767,-32767,
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32767,-32767,32767,-32767,-32767,32767,32767,32767,32767,32767,-32767,32767,-32767,32767,-32767,-32767,
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};
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#define NOISEBSIZE 0x100
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typedef struct
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{
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unsigned int spos;
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unsigned int sinc;
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unsigned int vol;
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} Channel;
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static Channel chan[6] = {
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{0,0,0},
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{0,0,0},
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{0,0,0},
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{0,0,0},
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{0,0,0},
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{0,0,0} };
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#endif
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volatile bool playing = false;
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static void snd_Reset(void)
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{
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#ifndef CUSTOM_SND
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chan[0].vol = 0;
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chan[1].vol = 0;
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chan[2].vol = 0;
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chan[3].vol = 0;
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chan[4].vol = 0;
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chan[5].vol = 0;
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chan[0].sinc = 0;
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chan[1].sinc = 0;
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chan[2].sinc = 0;
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chan[3].sinc = 0;
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chan[4].sinc = 0;
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chan[5].sinc = 0;
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#endif
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}
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#ifdef CUSTOM_SND
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//extern "C" {
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void SND_Process(void *sndbuffer, int sndn);
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//}
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#endif
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FASTRUN void AudioPlaySystem::snd_Mixer(short * stream, int len )
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{
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if (playing)
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{
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#ifdef CUSTOM_SND
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SND_Process((void*)stream, len);
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#else
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int i;
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long s;
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len = len >> 1;
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short v0=chan[0].vol;
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short v1=chan[1].vol;
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short v2=chan[2].vol;
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short v3=chan[3].vol;
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short v4=chan[4].vol;
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short v5=chan[5].vol;
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for (i=0;i<len;i++)
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{
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s =((v0*square[(chan[0].spos>>8)&0x3f])>>11);
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s+=((v1*square[(chan[1].spos>>8)&0x3f])>>11);
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s+=((v2*square[(chan[2].spos>>8)&0x3f])>>11);
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s+=((v3*noise[(chan[3].spos>>8)&(NOISEBSIZE-1)])>>11);
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s+=((v4*noise[(chan[4].spos>>8)&(NOISEBSIZE-1)])>>11);
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s+=((v5*noise[(chan[5].spos>>8)&(NOISEBSIZE-1)])>>11);
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*stream++ = (short)(s);
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*stream++ = (short)(s);
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chan[0].spos += chan[0].sinc;
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chan[1].spos += chan[1].sinc;
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chan[2].spos += chan[2].sinc;
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chan[3].spos += chan[3].sinc;
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chan[4].spos += chan[4].sinc;
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chan[5].spos += chan[5].sinc;
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}
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#endif
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}
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}
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void AudioPlaySystem::begin(void)
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{
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this->reset();
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}
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void AudioPlaySystem::start(void)
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{
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playing = true;
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}
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void AudioPlaySystem::setSampleParameters(float clockfreq, float samplerate) {
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}
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void AudioPlaySystem::reset(void)
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{
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snd_Reset();
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}
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void AudioPlaySystem::stop(void)
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{
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//__disable_irq();
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playing = false;
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//__enable_irq();
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}
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bool AudioPlaySystem::isPlaying(void)
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{
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return playing;
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}
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void AudioPlaySystem::sound(int C, int F, int V) {
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#ifndef CUSTOM_SND
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if (C < 6) {
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chan[C].vol = V;
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chan[C].sinc = F>>1;
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}
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#endif
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}
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void AudioPlaySystem::step(void) {
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}
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#ifndef HAS_T4_VGA
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/*******************************************************************
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Experimental I2S interrupt based sound driver for PCM51xx !!!
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*******************************************************************/
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FLASHMEM static void set_audioClock(int nfact, int32_t nmult, uint32_t ndiv, bool force) // sets PLL4
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{
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if (!force && (CCM_ANALOG_PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_ENABLE)) return;
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CCM_ANALOG_PLL_AUDIO = CCM_ANALOG_PLL_AUDIO_BYPASS | CCM_ANALOG_PLL_AUDIO_ENABLE
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| CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(2) // 2: 1/4; 1: 1/2; 0: 1/1
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| CCM_ANALOG_PLL_AUDIO_DIV_SELECT(nfact);
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CCM_ANALOG_PLL_AUDIO_NUM = nmult & CCM_ANALOG_PLL_AUDIO_NUM_MASK;
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CCM_ANALOG_PLL_AUDIO_DENOM = ndiv & CCM_ANALOG_PLL_AUDIO_DENOM_MASK;
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CCM_ANALOG_PLL_AUDIO &= ~CCM_ANALOG_PLL_AUDIO_POWERDOWN;//Switch on PLL
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while (!(CCM_ANALOG_PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_LOCK)) {}; //Wait for pll-lock
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const int div_post_pll = 1; // other values: 2,4
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CCM_ANALOG_MISC2 &= ~(CCM_ANALOG_MISC2_DIV_MSB | CCM_ANALOG_MISC2_DIV_LSB);
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if(div_post_pll>1) CCM_ANALOG_MISC2 |= CCM_ANALOG_MISC2_DIV_LSB;
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if(div_post_pll>3) CCM_ANALOG_MISC2 |= CCM_ANALOG_MISC2_DIV_MSB;
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CCM_ANALOG_PLL_AUDIO &= ~CCM_ANALOG_PLL_AUDIO_BYPASS;//Disable Bypass
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}
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#define AUDIO_SAMPLE_RATE_EXACT 11025.0 //44117.64706 //11025.0 //22050.0 //44117.64706 //31778.0
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FLASHMEM static void config_sai1()
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{
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CCM_CCGR5 |= CCM_CCGR5_SAI1(CCM_CCGR_ON);
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double fs = AUDIO_SAMPLE_RATE_EXACT;
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// PLL between 27*24 = 648MHz und 54*24=1296MHz
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int n1 = 4; //SAI prescaler 4 => (n1*n2) = multiple of 4
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int n2 = 1 + (24000000 * 27) / (fs * 256 * n1);
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double C = (fs * 256 * n1 * n2) / 24000000;
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int c0 = C;
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int c2 = 10000;
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int c1 = C * c2 - (c0 * c2);
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set_audioClock(c0, c1, c2, true);
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// clear SAI1_CLK register locations
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CCM_CSCMR1 = (CCM_CSCMR1 & ~(CCM_CSCMR1_SAI1_CLK_SEL_MASK))
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| CCM_CSCMR1_SAI1_CLK_SEL(2); // &0x03 // (0,1,2): PLL3PFD0, PLL5, PLL4
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n1 = n1 / 2; //Double Speed for TDM
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CCM_CS1CDR = (CCM_CS1CDR & ~(CCM_CS1CDR_SAI1_CLK_PRED_MASK | CCM_CS1CDR_SAI1_CLK_PODF_MASK))
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| CCM_CS1CDR_SAI1_CLK_PRED(n1 - 1) // &0x07
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| CCM_CS1CDR_SAI1_CLK_PODF(n2 - 1); // &0x3f
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IOMUXC_GPR_GPR1 = (IOMUXC_GPR_GPR1 & ~(IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL_MASK))
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| (IOMUXC_GPR_GPR1_SAI1_MCLK_DIR | IOMUXC_GPR_GPR1_SAI1_MCLK1_SEL(0)); //Select MCLK
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// configure transmitter
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int rsync = 0;
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int tsync = 1;
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I2S1_TMR = 0;
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I2S1_TCR1 = I2S_TCR1_RFW(1);
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I2S1_TCR2 = I2S_TCR2_SYNC(tsync) | I2S_TCR2_BCP // sync=0; tx is async;
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| (I2S_TCR2_BCD | I2S_TCR2_DIV((1)) | I2S_TCR2_MSEL(1));
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I2S1_TCR3 = I2S_TCR3_TCE;
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I2S1_TCR4 = I2S_TCR4_FRSZ((2-1)) | I2S_TCR4_SYWD((32-1)) | I2S_TCR4_MF
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| I2S_TCR4_FSD | I2S_TCR4_FSE | I2S_TCR4_FSP;
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I2S1_TCR5 = I2S_TCR5_WNW((32-1)) | I2S_TCR5_W0W((32-1)) | I2S_TCR5_FBT((32-1));
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I2S1_RMR = 0;
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I2S1_RCR1 = I2S_RCR1_RFW(1);
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I2S1_RCR2 = I2S_RCR2_SYNC(rsync) | I2S_RCR2_BCP // sync=0; rx is async;
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| (I2S_RCR2_BCD | I2S_RCR2_DIV((1)) | I2S_RCR2_MSEL(1));
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I2S1_RCR3 = I2S_RCR3_RCE;
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I2S1_RCR4 = I2S_RCR4_FRSZ((2-1)) | I2S_RCR4_SYWD((32-1)) | I2S_RCR4_MF
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| I2S_RCR4_FSE | I2S_RCR4_FSP | I2S_RCR4_FSD;
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I2S1_RCR5 = I2S_RCR5_WNW((32-1)) | I2S_RCR5_W0W((32-1)) | I2S_RCR5_FBT((32-1));
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//CORE_PIN23_CONFIG = 3; // MCLK
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CORE_PIN21_CONFIG = 3; // RX_BCLK
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CORE_PIN20_CONFIG = 3; // RX_SYNC
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CORE_PIN7_CONFIG = 3; // TX_DATA0
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I2S1_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE;
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I2S1_TCSR = I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE ;//<-- not using DMA */;
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}
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//DMAMEM __attribute__((aligned(32))) static uint32_t i2s_tx[1024];
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static bool fillfirsthalf = true;
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static uint16_t cnt = 0;
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static uint16_t sampleBufferSize = 0;
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static void (*fillsamples)(short * stream, int len) = nullptr;
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static uint32_t * i2s_tx_buffer __attribute__((aligned(32)));
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static uint16_t * i2s_tx_buffer16;
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static uint16_t * txreg = (uint16_t *)((uint32_t)&I2S1_TDR0 + 2);
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FASTRUN void AudioPlaySystem::AUDIO_isr() {
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*txreg = i2s_tx_buffer16[cnt];
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cnt = cnt + 1;
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cnt = cnt & (sampleBufferSize*2-1);
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if (cnt == 0) {
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fillfirsthalf = false;
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NVIC_SET_PENDING(IRQ_SOFTWARE);
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}
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else if (cnt == sampleBufferSize) {
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fillfirsthalf = true;
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NVIC_SET_PENDING(IRQ_SOFTWARE);
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}
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/*
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I2S1_TDR0 = i2s_tx_buffer[cnt];
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cnt = cnt + 1;
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cnt = cnt & (sampleBufferSize-1);
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if (cnt == 0) {
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fillfirsthalf = false;
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NVIC_SET_PENDING(IRQ_SOFTWARE);
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}
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else if (cnt == sampleBufferSize/2) {
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fillfirsthalf = true;
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NVIC_SET_PENDING(IRQ_SOFTWARE);
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}
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*/
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}
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FASTRUN void AudioPlaySystem::SOFTWARE_isr() {
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//Serial.println("x");
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if (fillfirsthalf) {
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fillsamples((short *)i2s_tx_buffer, sampleBufferSize);
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arm_dcache_flush_delete((void*)i2s_tx_buffer, (sampleBufferSize/2)*sizeof(uint32_t));
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}
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else {
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fillsamples((short *)&i2s_tx_buffer[sampleBufferSize/2], sampleBufferSize);
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arm_dcache_flush_delete((void*)&i2s_tx_buffer[sampleBufferSize/2], (sampleBufferSize/2)*sizeof(uint32_t));
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}
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}
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// display VGA image
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FLASHMEM void AudioPlaySystem::begin_audio(int samplesize, void (*callback)(short * stream, int len))
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{
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fillsamples = callback;
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i2s_tx_buffer = (uint32_t*)malloc(samplesize*sizeof(uint32_t)); //&i2s_tx[0];
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if (i2s_tx_buffer == NULL) {
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Serial.println("could not allocate audio samples");
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return;
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}
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memset((void*)i2s_tx_buffer,0, samplesize*sizeof(uint32_t));
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arm_dcache_flush_delete((void*)i2s_tx_buffer, samplesize*sizeof(uint32_t));
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i2s_tx_buffer16 = (uint16_t*)i2s_tx_buffer;
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sampleBufferSize = samplesize;
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config_sai1();
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attachInterruptVector(IRQ_SAI1, AUDIO_isr);
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NVIC_ENABLE_IRQ(IRQ_SAI1);
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NVIC_SET_PRIORITY(IRQ_QTIMER3, 0); // 0 highest priority, 255 = lowest priority
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NVIC_SET_PRIORITY(IRQ_SAI1, 127);
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attachInterruptVector(IRQ_SOFTWARE, SOFTWARE_isr);
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NVIC_SET_PRIORITY(IRQ_SOFTWARE, 208);
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NVIC_ENABLE_IRQ(IRQ_SOFTWARE);
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I2S1_TCSR |= 1<<8; // start generating TX FIFO interrupts
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Serial.print("Audio sample buffer = ");
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Serial.println(samplesize);
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}
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FLASHMEM void AudioPlaySystem::end_audio()
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{
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if (i2s_tx_buffer != NULL) {
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free(i2s_tx_buffer);
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}
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}
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#endif
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#endif
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|
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@ -0,0 +1,34 @@
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#ifndef audioplaysystem_h_
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#define audioplaysystem_h_
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#ifdef HAS_SND
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#include "platform_config.h"
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class AudioPlaySystem
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{
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public:
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AudioPlaySystem(void) { };
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void begin(void);
|
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void setSampleParameters(float clockfreq, float samplerate);
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void reset(void);
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void start(void);
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void stop(void);
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bool isPlaying(void);
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void sound(int C, int F, int V);
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void buzz(int size, int val);
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void step(void);
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static void snd_Mixer(short * stream, int len );
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#ifndef HAS_T4_VGA
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void begin_audio(int samplesize, void (*callback)(short * stream, int len));
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void end_audio();
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static void AUDIO_isr(void);
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static void SOFTWARE_isr(void);
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#endif
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||||
};
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
#ifndef _ARDUINOPROTO_H_
|
||||
#define _ARDUINOPROTO_H_
|
||||
|
||||
#include <Arduino.h>
|
||||
//#define PROGMEM
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
|
||||
#ifndef CPUINTRF_H
|
||||
#define CPUINTRF_H
|
||||
|
||||
#include "osd_cpu.h"
|
||||
|
||||
#define CPU_16BIT_PORT 0x4000
|
||||
#define CPU_FLAGS_MASK 0xff00
|
||||
#define CLEAR_LINE 0
|
||||
#define ASSERT_LINE 1
|
||||
#define REG_PREVIOUSPC -1
|
||||
#define REG_SP_CONTENTS -2
|
||||
|
||||
/* daisy-chain link */
|
||||
typedef struct {
|
||||
void (*reset)(int); /* reset callback */
|
||||
int (*interrupt_entry)(int); /* entry callback */
|
||||
void (*interrupt_reti)(int); /* reti callback */
|
||||
int irq_param; /* callback paramater */
|
||||
} Z80_DaisyChain;
|
||||
|
||||
#define Z80_MAXDAISY 4 /* maximum of daisy chan device */
|
||||
|
||||
#define Z80_INT_REQ 0x01 /* interrupt request mask */
|
||||
#define Z80_INT_IEO 0x02 /* interrupt disable mask(IEO) */
|
||||
|
||||
#define Z80_VECTOR(device,state) (((device)<<8)|(state))
|
||||
|
||||
|
||||
#endif /* CPUINTRF_H */
|
||||
|
|
@ -0,0 +1,203 @@
|
|||
#include <string.h>
|
||||
|
||||
#include "emuapi.h"
|
||||
#include "tft_t_dma.h"
|
||||
#include "iopins.h"
|
||||
|
||||
extern "C" {
|
||||
#include "shared.h"
|
||||
#include "system.h"
|
||||
}
|
||||
|
||||
|
||||
EXTMEM static unsigned char MemPool[8*1024*1024];
|
||||
|
||||
extern "C" uint8 read_rom(int address) {
|
||||
return (MemPool[address]);
|
||||
}
|
||||
|
||||
extern "C" uint8 readb_swap_rom(int address) {
|
||||
return (MemPool[address^1]);
|
||||
}
|
||||
|
||||
extern "C" uint16 readw_swap_rom(int address) {
|
||||
return ((MemPool[address+1]<<8) + MemPool[address]);
|
||||
}
|
||||
extern "C" void write_rom(int address, uint8 val) {
|
||||
MemPool[address]=val;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static uint8 romversion;
|
||||
extern "C" uint8 rom_version(void) {
|
||||
return romversion;
|
||||
}
|
||||
|
||||
static deinterleave_block(int offset, int srcoffset)
|
||||
{
|
||||
int i;
|
||||
int srcaddr = offset + srcoffset;
|
||||
uint8 * block = work_ram; // 0x4000 bytes tmp buffer
|
||||
for(i = 0; i < 0x4000; i += 1) {
|
||||
block[i] = read_rom(srcaddr++);
|
||||
}
|
||||
for(i = 0; i < 0x2000; i += 1)
|
||||
{
|
||||
write_rom(srcoffset + i*2+1, block[0x2000 + (i)]);
|
||||
write_rom(srcoffset + i*2+0, block[0x0000 + (i)]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static int ik; // joypad key
|
||||
static int ihk; // I2C keyboard key
|
||||
static int iusbhk; // USB keyboard key
|
||||
static int prevhk; // previous keyboard key
|
||||
|
||||
void emu_KeyboardOnDown(int keymodifer, int key) {
|
||||
int keyCode = -1; //INV_KEY;
|
||||
if ((key >=0xc0) && (key <=0xdf)) {
|
||||
keyCode = ((key-0xc0) & 0x1f) + 0x7f;
|
||||
}
|
||||
else {
|
||||
keyCode = key & 0x7f;
|
||||
}
|
||||
|
||||
//Serial.println(keyCode);
|
||||
|
||||
if (keyCode != -1) {
|
||||
iusbhk = keyCode;
|
||||
}
|
||||
}
|
||||
|
||||
void emu_KeyboardOnUp(int keymodifer, int key) {
|
||||
iusbhk = 0;
|
||||
}
|
||||
|
||||
|
||||
void gen_Init(void)
|
||||
{
|
||||
emu_printf("Allocating MEM");
|
||||
|
||||
bg_pattern_cache = emu_Malloc(BGPATTERN_CACH_SIZE);
|
||||
work_ram = &MemPool[7*1024*1024]; // emu_Malloc(WORK_RAM_SIZE);
|
||||
vram = &MemPool[7*1024*1024+WORK_RAM_SIZE];//emu_Malloc(VRAM_SIZE);
|
||||
zram = emu_Malloc(Z_RAM_SIZE);
|
||||
|
||||
//mem_init();
|
||||
emu_printf("Allocating MEM done");
|
||||
}
|
||||
|
||||
void gen_Input(int click) {
|
||||
ik = emu_GetPad();
|
||||
ihk = emu_ReadI2CKeyboard();
|
||||
}
|
||||
|
||||
void gen_Start(char * filename)
|
||||
{
|
||||
emu_printf("load and init");
|
||||
|
||||
|
||||
int size;
|
||||
int offset = 0;
|
||||
|
||||
size = emu_FileSize(filename);
|
||||
int pos = 0;
|
||||
int n;
|
||||
int i;
|
||||
char * buf = (char*)bg_pattern_cache;
|
||||
size = 0;
|
||||
int f = emu_FileOpen(filename,"r+b");
|
||||
if (f) {
|
||||
while ( (n = emu_FileRead(buf,0x40000,f) ) ) {
|
||||
size += n;
|
||||
for (int i=0; i<n; i++) {
|
||||
write_rom(pos++,buf[i]);
|
||||
}
|
||||
emu_printi(size);
|
||||
//emu_printi(n);
|
||||
}
|
||||
emu_FileClose(f);
|
||||
}
|
||||
|
||||
|
||||
if((size / 512) & 1)
|
||||
{
|
||||
//emu_printf("deinterleave");
|
||||
size -= 512;
|
||||
offset += 512;
|
||||
for(i = 0; i < (size / 0x4000); i += 1)
|
||||
{
|
||||
deinterleave_block(offset, (i * 0x4000));
|
||||
}
|
||||
}
|
||||
else {
|
||||
for(i = 0; i < size; i += 2)
|
||||
{
|
||||
uint8 temp = read_rom(i+0);
|
||||
write_rom(i+0,read_rom(offset+i+1));
|
||||
write_rom(i+1, temp);
|
||||
}
|
||||
}
|
||||
|
||||
romversion = read_rom(0x0001F0);
|
||||
|
||||
|
||||
system_init();
|
||||
|
||||
#ifdef SOUND_PRESENT
|
||||
#ifdef HAS_SND
|
||||
audio_init(22050);
|
||||
emu_sndInit();
|
||||
#endif
|
||||
#endif
|
||||
|
||||
system_reset();
|
||||
|
||||
emu_printf("init done");
|
||||
}
|
||||
|
||||
void gen_Step(void) {
|
||||
|
||||
input.pad[0] = 0;
|
||||
|
||||
int k = ik;
|
||||
int hk = ihk;
|
||||
if (iusbhk) hk = iusbhk;
|
||||
|
||||
if (( k & MASK_JOY1_RIGHT) || ( k & MASK_JOY2_RIGHT)) {
|
||||
input.pad[0] |= INPUT_RIGHT;
|
||||
}
|
||||
if (( k & MASK_JOY1_LEFT) || ( k & MASK_JOY2_LEFT)) {
|
||||
input.pad[0] |= INPUT_LEFT;
|
||||
}
|
||||
if (( k & MASK_JOY1_UP) || ( k & MASK_JOY2_UP)) {
|
||||
input.pad[0] |= INPUT_UP;
|
||||
}
|
||||
if (( k & MASK_JOY1_DOWN) || ( k & MASK_JOY2_DOWN)) {
|
||||
input.pad[0] |= INPUT_DOWN;
|
||||
}
|
||||
if ( k & MASK_JOY2_BTN) {
|
||||
input.pad[0] |= INPUT_A;
|
||||
}
|
||||
|
||||
if (k & MASK_KEY_USER1) input.pad[0] |= INPUT_C;
|
||||
if ( (k & MASK_KEY_USER2) || (hk == 'q') ) input.pad[0] |= INPUT_START;
|
||||
//if (k & MASK_KEY_USER3) input.pad[0] |= INPUT_B;
|
||||
|
||||
prevhk = hk;
|
||||
|
||||
system_frame(emu_FrameSkip());
|
||||
//emu_printi(emu_FrameSkip());
|
||||
|
||||
emu_DrawVsync();
|
||||
}
|
||||
|
||||
void SND_Process(void *stream, int len) {
|
||||
#ifdef SOUND_PRESENT
|
||||
#ifdef HAS_SND
|
||||
audio_play_sample(stream, 0, len);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
extern void gen_Init(void);
|
||||
extern void gen_Step(void);
|
||||
extern void gen_Start(char * filename);
|
||||
extern void gen_Input(int click);
|
||||
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,215 @@
|
|||
#ifndef EMUAPI_H
|
||||
#define EMUAPI_H
|
||||
|
||||
#include "platform_config.h"
|
||||
|
||||
#define CUSTOM_SND 1
|
||||
//#define TIMER_REND 1
|
||||
|
||||
#define EXTRA_HEAP 0x10000
|
||||
|
||||
|
||||
// Title: < >
|
||||
#define TITLE " Genesis Emulator "
|
||||
#define ROMSDIR "/gen"
|
||||
|
||||
#define emu_Init(ROM) {gen_Init(); gen_Start(ROM);}
|
||||
#define emu_Step(x) {gen_Step();}
|
||||
#define emu_Input(x) {gen_Input(x);}
|
||||
|
||||
#define MAX_FILENAME_PATH 64
|
||||
#define NB_FILE_HANDLER 4
|
||||
#define PALETTE_SIZE 1
|
||||
#define VID_FRAME_SKIP 0x0
|
||||
#define TFT_VBUFFER_YCROP 0
|
||||
#define SINGLELINE_RENDERING 1
|
||||
|
||||
#define R32(rgb) ((rgb>>16)&0xff)
|
||||
#define G32(rgb) ((rgb>>8)&0xff)
|
||||
#define B32(rgb) (rgb & 0xff)
|
||||
|
||||
#define ACTION_NONE 0
|
||||
#define ACTION_MAXKBDVAL 16
|
||||
#define ACTION_EXITKBD 128
|
||||
#define ACTION_RUN1 129
|
||||
#define ACTION_RUN2 130
|
||||
#define ACTION_RUN3 131
|
||||
|
||||
#ifdef KEYMAP_PRESENT
|
||||
|
||||
#define keylables_map0_0 (char *)"qwertyuiop\x1a"
|
||||
#define keylables_map0_1 (char *)" asdfghjkl\x19"
|
||||
#define keylables_map0_2 (char *)" zxcvbnm,.;/"
|
||||
#define keylables_map0_3 (char *)" +\x10-"
|
||||
const unsigned short key_map0[] = {
|
||||
'q','w','e','r','t','y','u','i','o','p',157, //lowecase
|
||||
0,'a','s','d','f','g','h','j','k','l',0x0D,
|
||||
0,'z','x','c','v','b','n','m',',','.',';','/',
|
||||
145,157,29,17,
|
||||
0,'+',' ','-'
|
||||
};
|
||||
|
||||
#define keylables_map1_0 (char *)"QWERTYUIOP@"
|
||||
#define keylables_map1_1 (char *)" ASDFGHJKL\x19"
|
||||
#define keylables_map1_2 (char *)" ZXCVBNM<>:?"
|
||||
#define keylables_map1_3 (char *)" =\x10_"
|
||||
const unsigned short key_map1[] = {
|
||||
'Q','W','E','R','T','Y','U','I','O','P','@', //shift uppercase
|
||||
0,'A','S','D','F','G','H','J','K','L',0x0D,
|
||||
0,'Z','X','C','V','B','N','M','<','>',':','?',
|
||||
145,157,29,17,
|
||||
0,'=',' ','_'
|
||||
};
|
||||
|
||||
#define keylables_map2_0 (char *)"!\"#$%^&*()@"
|
||||
#define keylables_map2_1 (char *)" |\\[]{} "
|
||||
#define keylables_map2_2 (char *)" <>:?"
|
||||
#define keylables_map2_3 (char *)" =\x10_"
|
||||
const unsigned short key_map2[] = {
|
||||
'!','"','#','$','%','^','&','*','(',')','@', // shiftothers
|
||||
0, '|','\\','[',']','{','}','\'',0,0,0,
|
||||
0, 0,0,0,0,0,0,0,'<','>',':','?',
|
||||
0,0,0,0,
|
||||
0,'=',' ','_'
|
||||
};
|
||||
|
||||
#define keylables_map3_0 (char *)"1234567890 "
|
||||
#define keylables_map3_1 (char *)" "
|
||||
#define keylables_map3_2 (char *)" "
|
||||
#define keylables_map3_3 (char *)" "
|
||||
|
||||
const unsigned short key_map3[] = {
|
||||
'1','2','3','4','5','6','7','8','9','0',0, // digit keys
|
||||
0, 0,0,0,0,0,0,0,0,0,0,
|
||||
0, 0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,' ',0
|
||||
};
|
||||
|
||||
#define keylables_map4_0 (char *)"\x11\x12\x13\x14\x15\x16\x17\x18 "
|
||||
#define keylables_map4_1 (char *)" "
|
||||
#define keylables_map4_2 (char *)" "
|
||||
#define keylables_map4_3 (char *)" "
|
||||
|
||||
const unsigned short key_map4[] = {
|
||||
133,134,135,136,137,138,139,140,0,0,0, // function keys
|
||||
0, 0,0,0,0,0,0,0,0,0,0,
|
||||
0, 0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,' ',0
|
||||
};
|
||||
|
||||
#define keylables_map5_0 (char *)" "
|
||||
#define keylables_map5_1 (char *)" "
|
||||
#define keylables_map5_2 (char *)" "
|
||||
#define keylables_map5_3 (char *)" "
|
||||
|
||||
const unsigned short key_map5[] = {
|
||||
0,0,0,0,0,0,0,0,0,0,0, // extra keys
|
||||
0, 0,0,0,0,0,0,0,0,0,0,
|
||||
0, 0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,
|
||||
0,0,' ',0
|
||||
};
|
||||
|
||||
const unsigned short matkeys[] = {
|
||||
0x004,0x008,0x108,0x104,0x208,0x204,0x308,0x304,0x408,0x404,0x410, // row 1
|
||||
0x502,0x002,0x020,0x102,0x120,0x202,0x220,0x302,0x320,0x402,0x420, // row 2
|
||||
0x508,0x001,0x040,0x101,0x140,0x201,0x240,0x210,0x340,0x301,0x401,0x440, // row 3
|
||||
0x504,0x520,0x540,0x501, // UP LEFT RIGHT DOWN
|
||||
0x510,0x010,0x110,0x310, // row 4
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#define MASK_JOY2_RIGHT 0x0001
|
||||
#define MASK_JOY2_LEFT 0x0002
|
||||
#define MASK_JOY2_UP 0x0004
|
||||
#define MASK_JOY2_DOWN 0x0008
|
||||
#define MASK_JOY2_BTN 0x0010
|
||||
#define MASK_KEY_USER1 0x0020
|
||||
#define MASK_KEY_USER2 0x0040
|
||||
#define MASK_KEY_USER3 0x0080
|
||||
#define MASK_JOY1_RIGHT 0x0100
|
||||
#define MASK_JOY1_LEFT 0x0200
|
||||
#define MASK_JOY1_UP 0x0400
|
||||
#define MASK_JOY1_DOWN 0x0800
|
||||
#define MASK_JOY1_BTN 0x1000
|
||||
#define MASK_KEY_USER4 0x2000
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern void emu_init(void);
|
||||
extern void emu_start(void);
|
||||
extern void emu_printf(const char * text);
|
||||
extern void emu_printi(int val);
|
||||
extern void emu_printh(int val);
|
||||
extern void * emu_Malloc(unsigned int size);
|
||||
extern void * emu_MallocI(unsigned int size);
|
||||
extern void emu_Free(void * pt);
|
||||
|
||||
extern int emu_FileOpen(const char * filepath, const char * mode);
|
||||
extern int emu_FileRead(void * buf, int size, int handler);
|
||||
extern int emu_FileGetc(int handler);
|
||||
extern int emu_FileSeek(int handler, int seek, int origin);
|
||||
extern int emu_FileTell(int handler);
|
||||
extern void emu_FileClose(int handler);
|
||||
|
||||
extern unsigned int emu_FileSize(const char * filepath);
|
||||
extern unsigned int emu_LoadFile(const char * filepath, void * buf, int size);
|
||||
extern unsigned int emu_LoadFileSeek(const char * filepath, void * buf, int size, int seek);
|
||||
|
||||
extern void emu_SetPaletteEntry(unsigned char r, unsigned char g, unsigned char b, int index);
|
||||
extern void emu_DrawScreen(unsigned char * VBuf, int width, int height, int stride);
|
||||
extern void emu_DrawLine(unsigned char * VBuf, int width, int height, int line);
|
||||
extern void emu_DrawLine16(unsigned short * VBuf, int width, int height, int line);
|
||||
extern void emu_DrawLine8(unsigned char * VBuf, int width, int height, int line);
|
||||
extern void emu_CopyLine(int width, int height, int ysrc, int ydst);
|
||||
extern void emu_DrawVsync(void);
|
||||
extern int emu_FrameSkip(void);
|
||||
extern void * emu_LineBuffer(int line);
|
||||
extern void emu_tweakVideo(int shiftdelta, int numdelta, int denomdelta);
|
||||
|
||||
extern bool menuActive(void);
|
||||
extern char * menuSelection(void);
|
||||
extern char * menuSecondSelection(void);
|
||||
extern void toggleMenu(bool on);
|
||||
extern int handleMenu(unsigned short bClick);
|
||||
|
||||
extern int handleOSKB(void);
|
||||
extern void toggleOSKB(bool forceon);
|
||||
|
||||
extern void emu_InitJoysticks(void);
|
||||
extern int emu_SwapJoysticks(int statusOnly);
|
||||
extern unsigned short emu_DebounceLocalKeys(void);
|
||||
extern int emu_ReadKeys(void);
|
||||
extern int emu_GetPad(void);
|
||||
extern int emu_GetMouse(int *x, int *y, int *buts);
|
||||
extern int emu_MouseDetected(void);
|
||||
extern int emu_KeyboardDetected(void);
|
||||
extern int emu_ReadAnalogJoyX(int min, int max);
|
||||
extern int emu_ReadAnalogJoyY(int min, int max);
|
||||
extern int emu_ReadI2CKeyboard(void);
|
||||
extern unsigned char emu_ReadI2CKeyboard2(int row);
|
||||
extern void emu_KeyboardOnUp(int keymodifer, int key);
|
||||
extern void emu_KeyboardOnDown(int keymodifer, int key);
|
||||
extern void emu_MidiOnDataReceived(unsigned char data);
|
||||
|
||||
extern void emu_sndPlaySound(int chan, int volume, int freq);
|
||||
extern void emu_sndPlayBuzz(int size, int val);
|
||||
extern void emu_sndInit();
|
||||
extern void emu_resetus(void);
|
||||
extern int emu_us(void);
|
||||
|
||||
extern int emu_setKeymap(int index);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,181 @@
|
|||
|
||||
#ifndef _H_FM_FM_
|
||||
#define _H_FM_FM_
|
||||
|
||||
#define HAS_YM2612 1
|
||||
|
||||
#define BUILD_YM2612 (HAS_YM2612 || HAS_YM3438)
|
||||
|
||||
#define FM_STEREO_MIX 0
|
||||
#define FM_OUTPUT_BIT 16
|
||||
#define FM_INTERNAL_TIMER 0
|
||||
|
||||
#define FM_LFO_SUPPORT 1
|
||||
#define FM_SEG_SUPPORT 0
|
||||
|
||||
#if BUILD_YM2612
|
||||
/* in 2612intf.c */
|
||||
#define YM2612UpdateReq(chip) YM2612UpdateRequest(chip);
|
||||
#endif
|
||||
|
||||
/* compiler dependence */
|
||||
#ifndef OSD_CPU_H
|
||||
#define OSD_CPU_H
|
||||
typedef unsigned char UINT8; /* unsigned 8bit */
|
||||
typedef unsigned short UINT16; /* unsigned 16bit */
|
||||
typedef unsigned int UINT32; /* unsigned 32bit */
|
||||
typedef signed char INT8; /* signed 8bit */
|
||||
typedef signed short INT16; /* signed 16bit */
|
||||
typedef signed int INT32; /* signed 32bit */
|
||||
#endif
|
||||
|
||||
#define YM2203_NUMBUF 1
|
||||
#if FM_STEREO_MIX
|
||||
#define YM2151_NUMBUF 1
|
||||
#define YM2608_NUMBUF 1
|
||||
#define YM2612_NUMBUF 1
|
||||
#define YM2610_NUMBUF 1
|
||||
#else
|
||||
#define YM2151_NUMBUF 2 /* FM L+R */
|
||||
#define YM2608_NUMBUF 2 /* FM L+R+ADPCM+RYTHM */
|
||||
#define YM2610_NUMBUF 2 /* FM L+R+ADPCMA+ADPCMB */
|
||||
#define YM2612_NUMBUF 2 /* FM L+R */
|
||||
#endif
|
||||
|
||||
#if (FM_OUTPUT_BIT==16)
|
||||
typedef INT16 FMSAMPLE;
|
||||
typedef unsigned long FMSAMPLE_MIX;
|
||||
#endif
|
||||
#if (FM_OUTPUT_BIT==8)
|
||||
typedef unsigned char FMSAMPLE;
|
||||
typedef unsigned short FMSAMPLE_MIX;
|
||||
#endif
|
||||
|
||||
typedef void (*FM_TIMERHANDLER)(int n,int c,int cnt,double stepTime);
|
||||
typedef void (*FM_IRQHANDLER)(int n,int irq);
|
||||
/* FM_TIMERHANDLER : Stop or Start timer */
|
||||
/* int n = chip number */
|
||||
/* int c = Channel 0=TimerA,1=TimerB */
|
||||
/* int count = timer count (0=stop) */
|
||||
/* doube stepTime = step time of one count (sec.)*/
|
||||
|
||||
/* FM_IRQHHANDLER : IRQ level changing sense */
|
||||
/* int n = chip number */
|
||||
/* int irq = IRQ level 0=OFF,1=ON */
|
||||
|
||||
#if BUILD_YM2203
|
||||
/* -------------------- YM2203(OPN) Interface -------------------- */
|
||||
|
||||
/*
|
||||
** Initialize YM2203 emulator(s).
|
||||
**
|
||||
** 'num' is the number of virtual YM2203's to allocate
|
||||
** 'baseclock'
|
||||
** 'rate' is sampling rate
|
||||
** 'TimerHandler' timer callback handler when timer start and clear
|
||||
** 'IRQHandler' IRQ callback handler when changed IRQ level
|
||||
** return 0 = success
|
||||
*/
|
||||
int YM2203Init(int num, int baseclock, int rate,
|
||||
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
|
||||
|
||||
/*
|
||||
** shutdown the YM2203 emulators .. make sure that no sound system stuff
|
||||
** is touching our audio buffers ...
|
||||
*/
|
||||
void YM2203Shutdown(void);
|
||||
|
||||
/*
|
||||
** reset all chip registers for YM2203 number 'num'
|
||||
*/
|
||||
void YM2203ResetChip(int num);
|
||||
/*
|
||||
** update one of chip
|
||||
*/
|
||||
|
||||
void YM2203UpdateOne(int num, INT16 *buffer, int length);
|
||||
|
||||
/*
|
||||
** Write
|
||||
** return : InterruptLevel
|
||||
*/
|
||||
int YM2203Write(int n,int a,unsigned char v);
|
||||
/*
|
||||
** Read
|
||||
** return : InterruptLevel
|
||||
*/
|
||||
unsigned char YM2203Read(int n,int a);
|
||||
|
||||
/*
|
||||
** Timer OverFlow
|
||||
*/
|
||||
int YM2203TimerOver(int n, int c);
|
||||
|
||||
#endif /* BUILD_YM2203 */
|
||||
|
||||
#if BUILD_YM2608
|
||||
/* -------------------- YM2608(OPNA) Interface -------------------- */
|
||||
int YM2608Init(int num, int baseclock, int rate,
|
||||
void **pcmroma,int *pcmsizea,short *rhythmrom,int *rhythmpos,
|
||||
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
|
||||
void YM2608Shutdown(void);
|
||||
void YM2608ResetChip(int num);
|
||||
void YM2608UpdateOne(int num, INT16 **buffer, int length);
|
||||
|
||||
int YM2608Write(int n, int a,unsigned char v);
|
||||
unsigned char YM2608Read(int n,int a);
|
||||
int YM2608TimerOver(int n, int c );
|
||||
#endif /* BUILD_YM2608 */
|
||||
|
||||
#if (BUILD_YM2610||BUILD_YM2610B)
|
||||
/* -------------------- YM2610(OPNB) Interface -------------------- */
|
||||
int YM2610Init(int num, int baseclock, int rate,
|
||||
void **pcmroma,int *pcmasize,void **pcmromb,int *pcmbsize,
|
||||
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
|
||||
void YM2610Shutdown(void);
|
||||
void YM2610ResetChip(int num);
|
||||
void YM2610UpdateOne(int num, INT16 **buffer, int length);
|
||||
#if BUILD_YM2610B
|
||||
void YM2610BUpdateOne(int num, INT16 **buffer, int length);
|
||||
#endif
|
||||
|
||||
int YM2610Write(int n, int a,unsigned char v);
|
||||
unsigned char YM2610Read(int n,int a);
|
||||
int YM2610TimerOver(int n, int c );
|
||||
|
||||
#endif /* BUILD_YM2610 */
|
||||
|
||||
#if BUILD_YM2612
|
||||
int YM2612Init(int num, int baseclock, int rate,
|
||||
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
|
||||
void YM2612Shutdown(void);
|
||||
void YM2612ResetChip(int num);
|
||||
void YM2612UpdateOne(int num, INT16 **buffer, int length);
|
||||
int YM2612Write(int n, int a,unsigned char v);
|
||||
unsigned char YM2612Read(int n,int a);
|
||||
int YM2612TimerOver(int n, int c );
|
||||
|
||||
#endif /* BUILD_YM2612 */
|
||||
|
||||
#if BUILD_YM2151
|
||||
/* -------------------- YM2151(OPM) Interface -------------------- */
|
||||
int OPMInit(int num, int baseclock, int rate,
|
||||
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
|
||||
void OPMShutdown(void);
|
||||
void OPMResetChip(int num);
|
||||
|
||||
void OPMUpdateOne(int num, INT16 **buffer, int length );
|
||||
/* ---- set callback hander when port CT0/1 write ----- */
|
||||
/* CT.bit0 = CT0 , CT.bit1 = CT1 */
|
||||
/*
|
||||
typedef void (*mem_write_handler)(int offset,int data);
|
||||
*/
|
||||
void OPMSetPortHander(int n,mem_write_handler PortWrite);
|
||||
/* JB 981119 - so it will match MAME's memory write functions scheme*/
|
||||
|
||||
int YM2151Write(int n,int a,unsigned char v);
|
||||
unsigned char YM2151Read(int n,int a);
|
||||
int YM2151TimerOver(int n,int c);
|
||||
#endif /* BUILD_YM2151 */
|
||||
|
||||
#endif /* _H_FM_FM_ */
|
||||
|
|
@ -0,0 +1,148 @@
|
|||
|
||||
// Font: c64_lower.64c
|
||||
|
||||
PROGMEM const unsigned char font8x8[128][8] =
|
||||
{
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0000 (nul)
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0001
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0002
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0003
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0004
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0005
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0006
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0007
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0008
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0009
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000A
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000B
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000C
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000D
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000E
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+000F
|
||||
|
||||
{ 0x7f, 0x41, 0x41, 0x41, 0x41, 0x41, 0x7f, 0x00 }, // Space // 0x10
|
||||
{ 0x00, 0x27, 0x31, 0x27, 0x21, 0x71, 0x00, 0x00 }, // F1 // 0x11
|
||||
{ 0x00, 0x77, 0x41, 0x77, 0x11, 0x71, 0x00, 0x00 }, // F2
|
||||
{ 0x00, 0x77, 0x41, 0x77, 0x41, 0x71, 0x00, 0x00 }, // F3
|
||||
{ 0x00, 0x17, 0x51, 0x77, 0x41, 0x41, 0x00, 0x00 }, // F4
|
||||
{ 0x00, 0x77, 0x11, 0x77, 0x41, 0x71, 0x00, 0x00 }, // F5
|
||||
{ 0x00, 0x77, 0x11, 0x77, 0x51, 0x71, 0x00, 0x00 }, // F6
|
||||
{ 0x00, 0x77, 0x41, 0x47, 0x41, 0x41, 0x00, 0x00 }, // F7
|
||||
{ 0x00, 0x77, 0x51, 0x77, 0x51, 0x71, 0x00, 0x00 }, // F8 // 0x18
|
||||
{ 0x00, 0x00, 0x20, 0x24, 0x3e, 0x04, 0x00, 0x00 }, // Return // 0x19
|
||||
{ 0x00, 0x59, 0x4b, 0x5b, 0x4b, 0xd9, 0x00, 0x00 }, // Del // 0x1A
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0010
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0011
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0012
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0013
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0014
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0015
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0016
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0017
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0018
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0019
|
||||
//{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001A
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001B
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001C
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001D
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001E
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+001F
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0020 (space)
|
||||
{ 0x18, 0x3C, 0x3C, 0x18, 0x18, 0x00, 0x18, 0x00}, // U+0021 (!)
|
||||
{ 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0022 (")
|
||||
{ 0x36, 0x36, 0x7F, 0x36, 0x7F, 0x36, 0x36, 0x00}, // U+0023 (#)
|
||||
{ 0x0C, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x0C, 0x00}, // U+0024 ($)
|
||||
{ 0x00, 0x63, 0x33, 0x18, 0x0C, 0x66, 0x63, 0x00}, // U+0025 (%)
|
||||
{ 0x1C, 0x36, 0x1C, 0x6E, 0x3B, 0x33, 0x6E, 0x00}, // U+0026 (&)
|
||||
{ 0x06, 0x06, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0027 (')
|
||||
{ 0x18, 0x0C, 0x06, 0x06, 0x06, 0x0C, 0x18, 0x00}, // U+0028 (()
|
||||
{ 0x06, 0x0C, 0x18, 0x18, 0x18, 0x0C, 0x06, 0x00}, // U+0029 ())
|
||||
{ 0x00, 0x66, 0x3C, 0xFF, 0x3C, 0x66, 0x00, 0x00}, // U+002A (*)
|
||||
{ 0x00, 0x0C, 0x0C, 0x3F, 0x0C, 0x0C, 0x00, 0x00}, // U+002B (+)
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x06}, // U+002C (,)
|
||||
{ 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x00}, // U+002D (-)
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x00}, // U+002E (.)
|
||||
{ 0x60, 0x30, 0x18, 0x0C, 0x06, 0x03, 0x01, 0x00}, // U+002F (/)
|
||||
{ 0x3E, 0x63, 0x73, 0x7B, 0x6F, 0x67, 0x3E, 0x00}, // U+0030 (0)
|
||||
{ 0x0C, 0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x3F, 0x00}, // U+0031 (1)
|
||||
{ 0x1E, 0x33, 0x30, 0x1C, 0x06, 0x33, 0x3F, 0x00}, // U+0032 (2)
|
||||
{ 0x1E, 0x33, 0x30, 0x1C, 0x30, 0x33, 0x1E, 0x00}, // U+0033 (3)
|
||||
{ 0x38, 0x3C, 0x36, 0x33, 0x7F, 0x30, 0x78, 0x00}, // U+0034 (4)
|
||||
{ 0x3F, 0x03, 0x1F, 0x30, 0x30, 0x33, 0x1E, 0x00}, // U+0035 (5)
|
||||
{ 0x1C, 0x06, 0x03, 0x1F, 0x33, 0x33, 0x1E, 0x00}, // U+0036 (6)
|
||||
{ 0x3F, 0x33, 0x30, 0x18, 0x0C, 0x0C, 0x0C, 0x00}, // U+0037 (7)
|
||||
{ 0x1E, 0x33, 0x33, 0x1E, 0x33, 0x33, 0x1E, 0x00}, // U+0038 (8)
|
||||
{ 0x1E, 0x33, 0x33, 0x3E, 0x30, 0x18, 0x0E, 0x00}, // U+0039 (9)
|
||||
{ 0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x00}, // U+003A (:)
|
||||
{ 0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0C, 0x0C, 0x06}, // U+003B (//)
|
||||
{ 0x18, 0x0C, 0x06, 0x03, 0x06, 0x0C, 0x18, 0x00}, // U+003C (<)
|
||||
{ 0x00, 0x00, 0x3F, 0x00, 0x00, 0x3F, 0x00, 0x00}, // U+003D (=)
|
||||
{ 0x06, 0x0C, 0x18, 0x30, 0x18, 0x0C, 0x06, 0x00}, // U+003E (>)
|
||||
{ 0x1E, 0x33, 0x30, 0x18, 0x0C, 0x00, 0x0C, 0x00}, // U+003F (?)
|
||||
{ 0x3E, 0x63, 0x7B, 0x7B, 0x7B, 0x03, 0x1E, 0x00}, // U+0040 (@)
|
||||
{ 0x0C, 0x1E, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x00}, // U+0041 (A)
|
||||
{ 0x3F, 0x66, 0x66, 0x3E, 0x66, 0x66, 0x3F, 0x00}, // U+0042 (B)
|
||||
{ 0x3C, 0x66, 0x03, 0x03, 0x03, 0x66, 0x3C, 0x00}, // U+0043 (C)
|
||||
{ 0x1F, 0x36, 0x66, 0x66, 0x66, 0x36, 0x1F, 0x00}, // U+0044 (D)
|
||||
{ 0x7F, 0x46, 0x16, 0x1E, 0x16, 0x46, 0x7F, 0x00}, // U+0045 (E)
|
||||
{ 0x7F, 0x46, 0x16, 0x1E, 0x16, 0x06, 0x0F, 0x00}, // U+0046 (F)
|
||||
{ 0x3C, 0x66, 0x03, 0x03, 0x73, 0x66, 0x7C, 0x00}, // U+0047 (G)
|
||||
{ 0x33, 0x33, 0x33, 0x3F, 0x33, 0x33, 0x33, 0x00}, // U+0048 (H)
|
||||
{ 0x1E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+0049 (I)
|
||||
{ 0x78, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E, 0x00}, // U+004A (J)
|
||||
{ 0x67, 0x66, 0x36, 0x1E, 0x36, 0x66, 0x67, 0x00}, // U+004B (K)
|
||||
{ 0x0F, 0x06, 0x06, 0x06, 0x46, 0x66, 0x7F, 0x00}, // U+004C (L)
|
||||
{ 0x63, 0x77, 0x7F, 0x7F, 0x6B, 0x63, 0x63, 0x00}, // U+004D (M)
|
||||
{ 0x63, 0x67, 0x6F, 0x7B, 0x73, 0x63, 0x63, 0x00}, // U+004E (N)
|
||||
{ 0x1C, 0x36, 0x63, 0x63, 0x63, 0x36, 0x1C, 0x00}, // U+004F (O)
|
||||
{ 0x3F, 0x66, 0x66, 0x3E, 0x06, 0x06, 0x0F, 0x00}, // U+0050 (P)
|
||||
{ 0x1E, 0x33, 0x33, 0x33, 0x3B, 0x1E, 0x38, 0x00}, // U+0051 (Q)
|
||||
{ 0x3F, 0x66, 0x66, 0x3E, 0x36, 0x66, 0x67, 0x00}, // U+0052 (R)
|
||||
{ 0x1E, 0x33, 0x07, 0x0E, 0x38, 0x33, 0x1E, 0x00}, // U+0053 (S)
|
||||
{ 0x3F, 0x2D, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+0054 (T)
|
||||
{ 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x3F, 0x00}, // U+0055 (U)
|
||||
{ 0x33, 0x33, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00}, // U+0056 (V)
|
||||
{ 0x63, 0x63, 0x63, 0x6B, 0x7F, 0x77, 0x63, 0x00}, // U+0057 (W)
|
||||
{ 0x63, 0x63, 0x36, 0x1C, 0x1C, 0x36, 0x63, 0x00}, // U+0058 (X)
|
||||
{ 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x0C, 0x1E, 0x00}, // U+0059 (Y)
|
||||
{ 0x7F, 0x63, 0x31, 0x18, 0x4C, 0x66, 0x7F, 0x00}, // U+005A (Z)
|
||||
{ 0x1E, 0x06, 0x06, 0x06, 0x06, 0x06, 0x1E, 0x00}, // U+005B ([)
|
||||
{ 0x03, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x40, 0x00}, // U+005C (\)
|
||||
{ 0x1E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1E, 0x00}, // U+005D (])
|
||||
{ 0x08, 0x1C, 0x36, 0x63, 0x00, 0x00, 0x00, 0x00}, // U+005E (^)
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF}, // U+005F (_)
|
||||
{ 0x0C, 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+0060 (`)
|
||||
{ 0x00, 0x00, 0x1E, 0x30, 0x3E, 0x33, 0x6E, 0x00}, // U+0061 (a)
|
||||
{ 0x07, 0x06, 0x06, 0x3E, 0x66, 0x66, 0x3B, 0x00}, // U+0062 (b)
|
||||
{ 0x00, 0x00, 0x1E, 0x33, 0x03, 0x33, 0x1E, 0x00}, // U+0063 (c)
|
||||
{ 0x38, 0x30, 0x30, 0x3e, 0x33, 0x33, 0x6E, 0x00}, // U+0064 (d)
|
||||
{ 0x00, 0x00, 0x1E, 0x33, 0x3f, 0x03, 0x1E, 0x00}, // U+0065 (e)
|
||||
{ 0x1C, 0x36, 0x06, 0x0f, 0x06, 0x06, 0x0F, 0x00}, // U+0066 (f)
|
||||
{ 0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x1F}, // U+0067 (g)
|
||||
{ 0x07, 0x06, 0x36, 0x6E, 0x66, 0x66, 0x67, 0x00}, // U+0068 (h)
|
||||
{ 0x0C, 0x00, 0x0E, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+0069 (i)
|
||||
{ 0x30, 0x00, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1E}, // U+006A (j)
|
||||
{ 0x07, 0x06, 0x66, 0x36, 0x1E, 0x36, 0x67, 0x00}, // U+006B (k)
|
||||
{ 0x0E, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x1E, 0x00}, // U+006C (l)
|
||||
{ 0x00, 0x00, 0x33, 0x7F, 0x7F, 0x6B, 0x63, 0x00}, // U+006D (m)
|
||||
{ 0x00, 0x00, 0x1F, 0x33, 0x33, 0x33, 0x33, 0x00}, // U+006E (n)
|
||||
{ 0x00, 0x00, 0x1E, 0x33, 0x33, 0x33, 0x1E, 0x00}, // U+006F (o)
|
||||
{ 0x00, 0x00, 0x3B, 0x66, 0x66, 0x3E, 0x06, 0x0F}, // U+0070 (p)
|
||||
{ 0x00, 0x00, 0x6E, 0x33, 0x33, 0x3E, 0x30, 0x78}, // U+0071 (q)
|
||||
{ 0x00, 0x00, 0x3B, 0x6E, 0x66, 0x06, 0x0F, 0x00}, // U+0072 (r)
|
||||
{ 0x00, 0x00, 0x3E, 0x03, 0x1E, 0x30, 0x1F, 0x00}, // U+0073 (s)
|
||||
{ 0x08, 0x0C, 0x3E, 0x0C, 0x0C, 0x2C, 0x18, 0x00}, // U+0074 (t)
|
||||
{ 0x00, 0x00, 0x33, 0x33, 0x33, 0x33, 0x6E, 0x00}, // U+0075 (u)
|
||||
{ 0x00, 0x00, 0x33, 0x33, 0x33, 0x1E, 0x0C, 0x00}, // U+0076 (v)
|
||||
{ 0x00, 0x00, 0x63, 0x6B, 0x7F, 0x7F, 0x36, 0x00}, // U+0077 (w)
|
||||
{ 0x00, 0x00, 0x63, 0x36, 0x1C, 0x36, 0x63, 0x00}, // U+0078 (x)
|
||||
{ 0x00, 0x00, 0x33, 0x33, 0x33, 0x3E, 0x30, 0x1F}, // U+0079 (y)
|
||||
{ 0x00, 0x00, 0x3F, 0x19, 0x0C, 0x26, 0x3F, 0x00}, // U+007A (z)
|
||||
{ 0x38, 0x0C, 0x0C, 0x07, 0x0C, 0x0C, 0x38, 0x00}, // U+007B ({)
|
||||
{ 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x00}, // U+007C (|)
|
||||
{ 0x07, 0x0C, 0x0C, 0x38, 0x0C, 0x0C, 0x07, 0x00}, // U+007D (})
|
||||
{ 0x6E, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, // U+007E (~)
|
||||
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} // U+007F
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,160 @@
|
|||
/*
|
||||
Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
//uint8 work_ram[0x10000]; /* 68K work RAM */
|
||||
//uint8 zram[0x2000]; /* Z80 work RAM */
|
||||
uint8 zbusreq; /* /BUSREQ from Z80 */
|
||||
uint8 zreset; /* /RESET to Z80 */
|
||||
uint8 zbusack; /* /BUSACK to Z80 */
|
||||
uint8 zirq; /* /IRQ to Z80 */
|
||||
uint32 zbank; /* Address of Z80 bank window */
|
||||
uint8 gen_running;
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* Init, reset, shutdown functions */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
void gen_init(void)
|
||||
{
|
||||
sound_init();
|
||||
memset(&snd, 0, sizeof(snd));
|
||||
|
||||
m68k_set_cpu_type(M68K_CPU_TYPE_68000);
|
||||
m68k_pulse_reset();
|
||||
error("PC:%08X\tSP:%08X\n", m68k_get_reg(NULL,M68K_REG_PC), m68k_get_reg(NULL,M68K_REG_SP));
|
||||
gen_running = 1;
|
||||
}
|
||||
|
||||
void gen_reset(void)
|
||||
{
|
||||
/* Clear RAM */
|
||||
memset(work_ram, 0, WORK_RAM_SIZE);
|
||||
memset(zram, 0, Z_RAM_SIZE);
|
||||
|
||||
gen_running = 1;
|
||||
zreset = 0; /* Z80 is reset */
|
||||
zbusreq = 0; /* Z80 has control of the Z bus */
|
||||
zbusack = 1; /* Z80 is busy using the Z bus */
|
||||
zbank = 0; /* Assume default bank is 000000-007FFF */
|
||||
zirq = 0; /* No interrupts occuring */
|
||||
|
||||
io_reset();
|
||||
|
||||
/* Reset the 68000 emulator */
|
||||
m68k_pulse_reset();
|
||||
error("PC:%08X\tSP:%08X\n", m68k_get_reg(NULL,M68K_REG_PC), m68k_get_reg(NULL,M68K_REG_SP));
|
||||
z80_reset(0);
|
||||
z80_set_irq_callback(z80_irq_callback);
|
||||
}
|
||||
|
||||
void gen_shutdown(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Print 68K and Z80 state */
|
||||
error("\n");
|
||||
error("\nPC:%08X\tSP:%08X\tSR:%04X\n", m68k_get_reg(NULL,M68K_REG_PC), m68k_get_reg(NULL,M68K_REG_SP), m68k_get_reg(NULL, M68K_REG_SR));
|
||||
for(i=0;i<8;i++)
|
||||
{
|
||||
error("D%d:%08X\tA%d:%08X\n",
|
||||
i, m68k_get_reg(NULL, M68K_REG_D0+i),
|
||||
i, m68k_get_reg(NULL, M68K_REG_A0+i));
|
||||
}
|
||||
|
||||
error("\n");
|
||||
error("PC:%04X\tSP:%04X\n", z80_get_reg(Z80_PC), z80_get_reg(Z80_SP));
|
||||
error("AF:%04X\tAF:%04X\n", z80_get_reg(Z80_AF), z80_get_reg(Z80_AF2));
|
||||
error("BC:%04X\tBC:%04X\n", z80_get_reg(Z80_BC), z80_get_reg(Z80_BC2));
|
||||
error("DE:%04X\tDE:%04X\n", z80_get_reg(Z80_DE), z80_get_reg(Z80_DE2));
|
||||
error("HL:%04X\tHL:%04X\n", z80_get_reg(Z80_HL), z80_get_reg(Z80_HL2));
|
||||
error("IX:%04X\tIY:%04X\n", z80_get_reg(Z80_IX), z80_get_reg(Z80_IY));
|
||||
error("\n");
|
||||
}
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* Bus controller chip functions */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
int gen_busack_r(void)
|
||||
{
|
||||
return (zbusack & 1);
|
||||
}
|
||||
|
||||
void gen_busreq_w(int state)
|
||||
{
|
||||
zbusreq = (state & 1);
|
||||
zbusack = 1 ^ (zbusreq & zreset);
|
||||
|
||||
if(zbusreq == 0 && zreset == 1)
|
||||
{
|
||||
z80_execute(32);
|
||||
}
|
||||
}
|
||||
|
||||
void gen_reset_w(int state)
|
||||
{
|
||||
zreset = (state & 1);
|
||||
zbusack = 1 ^ (zbusreq & zreset);
|
||||
|
||||
if(zreset == 0)
|
||||
{
|
||||
if(snd.enabled)
|
||||
{
|
||||
YM2612ResetChip(0);
|
||||
}
|
||||
|
||||
z80_reset(0);
|
||||
z80_set_irq_callback(z80_irq_callback);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void gen_bank_w(int state)
|
||||
{
|
||||
zbank = ((zbank >> 1) | ((state & 1) << 23)) & 0xFF8000;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int z80_irq_callback(int param)
|
||||
{
|
||||
zirq = 0;
|
||||
z80_set_irq_line(0, CLEAR_LINE);
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
int vdp_int_ack_callback(int int_level)
|
||||
{
|
||||
switch(int_level)
|
||||
{
|
||||
case 4:
|
||||
hint_pending = 0;
|
||||
break;
|
||||
|
||||
case 6:
|
||||
status &= ~0x0080;
|
||||
vint_pending = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
|
||||
#ifndef _GENESIS_H_
|
||||
#define _GENESIS_H_
|
||||
|
||||
/* Global variables */
|
||||
//extern uint8 work_ram[0x10000];
|
||||
//extern uint8 zram[0x2000];
|
||||
extern uint8 zbusreq;
|
||||
extern uint8 zbusack;
|
||||
extern uint8 zreset;
|
||||
extern uint8 zirq;
|
||||
extern uint32 zbank;
|
||||
extern uint8 gen_running;
|
||||
|
||||
/* Function prototypes */
|
||||
void gen_init(void);
|
||||
void gen_reset(void);
|
||||
void gen_shutdown(void);
|
||||
int gen_busack_r(void);
|
||||
void gen_busreq_w(int state);
|
||||
void gen_reset_w(int state);
|
||||
void gen_bank_w(int state);
|
||||
//void bswap(uint8 *mem, int length);
|
||||
int z80_irq_callback(int param);
|
||||
void m68k_irq_ack_callback(int int_level);
|
||||
|
||||
#endif /* _GEN_H_ */
|
||||
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,69 @@
|
|||
#include "arduinoproto.h"
|
||||
PROGMEM const uint8 cycle2hc32[488] =
|
||||
{
|
||||
0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x05,
|
||||
0x05, 0x05, 0x06, 0x06, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0A, 0x0A, 0x0A,
|
||||
0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x10, 0x10,
|
||||
0x10, 0x11, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x16,
|
||||
0x16, 0x16, 0x17, 0x17, 0x17, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B, 0x1B,
|
||||
0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x21,
|
||||
0x21, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24, 0x25, 0x25, 0x25, 0x26, 0x26, 0x26,
|
||||
0x27, 0x27, 0x27, 0x28, 0x28, 0x29, 0x29, 0x29, 0x2A, 0x2A, 0x2A, 0x2B, 0x2B, 0x2B, 0x2C, 0x2C,
|
||||
0x2C, 0x2D, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F, 0x2F, 0x30, 0x30, 0x30, 0x31, 0x31, 0x31, 0x32,
|
||||
0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x35, 0x35, 0x36, 0x36, 0x36, 0x37, 0x37, 0x37,
|
||||
0x38, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3A, 0x3B, 0x3B, 0x3B, 0x3C, 0x3C, 0x3D, 0x3D,
|
||||
0x3D, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F, 0x40, 0x40, 0x40, 0x41, 0x41, 0x41, 0x42, 0x42, 0x42,
|
||||
0x43, 0x43, 0x44, 0x44, 0x44, 0x45, 0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47, 0x47, 0x48, 0x48,
|
||||
0x48, 0x49, 0x49, 0x4A, 0x4A, 0x4A, 0x4B, 0x4B, 0x4B, 0x4C, 0x4C, 0x4C, 0x4D, 0x4D, 0x4D, 0x4E,
|
||||
0x4E, 0x4E, 0x4F, 0x4F, 0x4F, 0x50, 0x50, 0x51, 0x51, 0x51, 0x52, 0x52, 0x52, 0x53, 0x53, 0x53,
|
||||
0x54, 0x54, 0x54, 0x55, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x58, 0x58, 0x58, 0x59, 0x59,
|
||||
0x59, 0x5A, 0x5A, 0x5A, 0x5B, 0x5B, 0x5B, 0x5C, 0x5C, 0x5C, 0x5D, 0x5D, 0x5E, 0x5E, 0x5E, 0x5F,
|
||||
0x5F, 0x5F, 0x60, 0x60, 0x60, 0x61, 0x61, 0x61, 0x62, 0x62, 0x62, 0x63, 0x63, 0x63, 0x64, 0x64,
|
||||
0x65, 0x65, 0x65, 0x66, 0x66, 0x66, 0x67, 0x67, 0x67, 0x68, 0x68, 0x68, 0x69, 0x69, 0x69, 0x6A,
|
||||
0x6A, 0x6A, 0x6B, 0x6B, 0x6C, 0x6C, 0x6C, 0x6D, 0x6D, 0x6D, 0x6E, 0x6E, 0x6E, 0x6F, 0x6F, 0x6F,
|
||||
0x70, 0x70, 0x70, 0x71, 0x71, 0x72, 0x72, 0x72, 0x73, 0x73, 0x73, 0x74, 0x74, 0x74, 0x75, 0x75,
|
||||
0x75, 0x76, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x79, 0x7A, 0x7A, 0x7A, 0x7B,
|
||||
0x7B, 0x7B, 0x7C, 0x7C, 0x7C, 0x7D, 0x7D, 0x7D, 0x7E, 0x7E, 0x7E, 0x7F, 0x7F, 0x80, 0x80, 0x80,
|
||||
0x81, 0x81, 0x81, 0x82, 0x82, 0x82, 0x83, 0x83, 0x83, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x86,
|
||||
0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x89, 0x89, 0x89, 0x8A, 0x8A, 0x8A, 0x8B, 0x8B, 0x8B,
|
||||
0x8C, 0x8C, 0x8D, 0x8D, 0x8D, 0x8E, 0x8E, 0x8E, 0x8F, 0x8F, 0x8F, 0x90, 0x90, 0x90, 0x91, 0x91,
|
||||
0x91, 0x92, 0x92, 0x92, 0x93, 0x93, 0xE9, 0xE9, 0xE9, 0xEA, 0xEA, 0xEA, 0xEB, 0xEB, 0xEB, 0xEC,
|
||||
0xEC, 0xEC, 0xED, 0xED, 0xED, 0xEE, 0xEE, 0xEE, 0xEF, 0xEF, 0xF0, 0xF0, 0xF0, 0xF1, 0xF1, 0xF1,
|
||||
0xF2, 0xF2, 0xF2, 0xF3, 0xF3, 0xF3, 0xF4, 0xF4, 0xF4, 0xF5, 0xF5, 0xF6, 0xF6, 0xF6, 0xF7, 0xF7,
|
||||
0xF7, 0xF8, 0xF8, 0xF8, 0xF9, 0xF9, 0xF9, 0xFA, 0xFA, 0xFA, 0xFB, 0xFB, 0xFB, 0xFC, 0xFC, 0xFD,
|
||||
0xFD, 0xFD, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF,
|
||||
};
|
||||
PROGMEM const uint8 cycle2hc40[488] =
|
||||
{
|
||||
0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x06,
|
||||
0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0A, 0x0A, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0D,
|
||||
0x0D, 0x0E, 0x0E, 0x0F, 0x0F, 0x10, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14,
|
||||
0x14, 0x15, 0x15, 0x16, 0x16, 0x16, 0x17, 0x17, 0x18, 0x18, 0x19, 0x19, 0x19, 0x1A, 0x1A, 0x1B,
|
||||
0x1B, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1E, 0x1E, 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
|
||||
0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x25, 0x25, 0x26, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29,
|
||||
0x29, 0x29, 0x2A, 0x2A, 0x2B, 0x2B, 0x2C, 0x2C, 0x2D, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F, 0x30,
|
||||
0x30, 0x30, 0x31, 0x31, 0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x35, 0x35, 0x36, 0x36, 0x36,
|
||||
0x37, 0x37, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3B, 0x3B, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D,
|
||||
0x3E, 0x3E, 0x3F, 0x3F, 0x40, 0x40, 0x40, 0x41, 0x41, 0x42, 0x42, 0x43, 0x43, 0x43, 0x44, 0x44,
|
||||
0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47, 0x48, 0x48, 0x49, 0x49, 0x4A, 0x4A, 0x4A, 0x4B, 0x4B,
|
||||
0x4C, 0x4C, 0x4D, 0x4D, 0x4D, 0x4E, 0x4E, 0x4F, 0x4F, 0x50, 0x50, 0x50, 0x51, 0x51, 0x52, 0x52,
|
||||
0x53, 0x53, 0x53, 0x54, 0x54, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x58, 0x58, 0x59, 0x59,
|
||||
0x5A, 0x5A, 0x5A, 0x5B, 0x5B, 0x5C, 0x5C, 0x5D, 0x5D, 0x5D, 0x5E, 0x5E, 0x5F, 0x5F, 0x60, 0x60,
|
||||
0x60, 0x61, 0x61, 0x62, 0x62, 0x63, 0x63, 0x63, 0x64, 0x64, 0x65, 0x65, 0x66, 0x66, 0x67, 0x67,
|
||||
0x67, 0x68, 0x68, 0x69, 0x69, 0x6A, 0x6A, 0x6A, 0x6B, 0x6B, 0x6C, 0x6C, 0x6D, 0x6D, 0x6D, 0x6E,
|
||||
0x6E, 0x6F, 0x6F, 0x70, 0x70, 0x70, 0x71, 0x71, 0x72, 0x72, 0x73, 0x73, 0x73, 0x74, 0x74, 0x75,
|
||||
0x75, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x7A, 0x7A, 0x7A, 0x7B, 0x7B, 0x7C,
|
||||
0x7C, 0x7D, 0x7D, 0x7D, 0x7E, 0x7E, 0x7F, 0x7F, 0x80, 0x80, 0x80, 0x81, 0x81, 0x82, 0x82, 0x83,
|
||||
0x83, 0x84, 0x84, 0x84, 0x85, 0x85, 0x86, 0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x89, 0x89, 0x8A,
|
||||
0x8A, 0x8A, 0x8B, 0x8B, 0x8C, 0x8C, 0x8D, 0x8D, 0x8D, 0x8E, 0x8E, 0x8F, 0x8F, 0x90, 0x90, 0x90,
|
||||
0x91, 0x91, 0x92, 0x92, 0x93, 0x93, 0x94, 0x94, 0x94, 0x95, 0x95, 0x96, 0x96, 0x97, 0x97, 0x97,
|
||||
0x98, 0x98, 0x99, 0x99, 0x9A, 0x9A, 0x9A, 0x9B, 0x9B, 0x9C, 0x9C, 0x9D, 0x9D, 0x9D, 0x9E, 0x9E,
|
||||
0x9F, 0x9F, 0xA0, 0xA0, 0xA1, 0xA1, 0xA1, 0xA2, 0xA2, 0xA3, 0xA3, 0xA4, 0xA4, 0xA4, 0xA5, 0xA5,
|
||||
0xA6, 0xA6, 0xA7, 0xA7, 0xA7, 0xA8, 0xA8, 0xA9, 0xA9, 0xAA, 0xAA, 0xAA, 0xAB, 0xAB, 0xAC, 0xAC,
|
||||
0xAD, 0xAD, 0xAD, 0xAE, 0xAE, 0xAF, 0xAF, 0xB0, 0xB0, 0xB1, 0xB1, 0xB1, 0xB2, 0xB2, 0xB3, 0xB3,
|
||||
0xB4, 0xB4, 0xB4, 0xB5, 0xB5, 0xB6, 0xB6, 0xE4, 0xE4, 0xE4, 0xE5, 0xE5, 0xE6, 0xE6, 0xE7, 0xE7,
|
||||
0xE7, 0xE8, 0xE8, 0xE9, 0xE9, 0xEA, 0xEA, 0xEB, 0xEB, 0xEB, 0xEC, 0xEC, 0xED, 0xED, 0xEE, 0xEE,
|
||||
0xEE, 0xEF, 0xEF, 0xF0, 0xF0, 0xF1, 0xF1, 0xF1, 0xF2, 0xF2, 0xF3, 0xF3, 0xF4, 0xF4, 0xF4, 0xF5,
|
||||
0xF5, 0xF6, 0xF6, 0xF7, 0xF7, 0xF7, 0xF8, 0xF8, 0xF9, 0xF9, 0xFA, 0xFA, 0xFB, 0xFB, 0xFB, 0xFC,
|
||||
0xFC, 0xFD, 0xFD, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF,
|
||||
};
|
||||
|
|
@ -0,0 +1,193 @@
|
|||
|
||||
#ifndef _HVC_H_
|
||||
#define _HVC_H_
|
||||
|
||||
#include "arduinoproto.h"
|
||||
|
||||
/* V counter values for NTSC 192-line display */
|
||||
PROGMEM const uint8 vc_ntsc_192[262] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA,
|
||||
0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
|
||||
};
|
||||
|
||||
/* V counter values for NTSC 224-line display */
|
||||
PROGMEM const uint8 vc_ntsc_224[262] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA,
|
||||
0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
|
||||
};
|
||||
|
||||
/* V counter values for NTSC 240-line display */
|
||||
PROGMEM const uint8 vc_ntsc_240[262] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05
|
||||
};
|
||||
|
||||
/* V counter values for PAL 192-line display */
|
||||
PROGMEM const uint8 vc_pal_192[313] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2,
|
||||
0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
|
||||
};
|
||||
|
||||
/* V counter values for PAL 224-line display */
|
||||
PROGMEM const uint8 vc_pal_224[313] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
|
||||
0x00, 0x01, 0x02,
|
||||
0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
|
||||
};
|
||||
|
||||
/* V counter values for PAL 240-line display */
|
||||
PROGMEM const uint8 vc_pal_240[313] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A,
|
||||
0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
|
||||
};
|
||||
|
||||
/* H counter values for a 256-pixel wide display (342 pixel max.) */
|
||||
PROGMEM const uint8 hc_256[171] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93,
|
||||
0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
|
||||
};
|
||||
|
||||
/* H counter values for a 320-pixel wide display (442 pixels max.) */
|
||||
PROGMEM const uint8 hc_320[211] = {
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6,
|
||||
0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
|
||||
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
|
||||
};
|
||||
|
||||
uint8 *vc_table[6] = {
|
||||
vc_ntsc_192,
|
||||
vc_ntsc_224,
|
||||
vc_ntsc_240,
|
||||
vc_pal_192,
|
||||
vc_pal_224,
|
||||
vc_pal_240
|
||||
};
|
||||
|
||||
uint8 *hc_table[2] = {
|
||||
hc_256,
|
||||
hc_320,
|
||||
};
|
||||
|
||||
#endif /* _HVC_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
/*
|
||||
io.c
|
||||
I/O controller chip emulation
|
||||
*/
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
port_t port[3];
|
||||
uint8 io_reg[0x10];
|
||||
|
||||
|
||||
void io_reset(void)
|
||||
{
|
||||
/* I/O register default settings */
|
||||
uint8 io_def[0x10] =
|
||||
{
|
||||
0xA0,
|
||||
0x7F, 0x7F, 0x7F,
|
||||
0x00, 0x00, 0x00,
|
||||
0xFF, 0x00, 0x00,
|
||||
0xFF, 0x00, 0x00,
|
||||
0xFB, 0x00, 0x00,
|
||||
};
|
||||
|
||||
/* Initialize I/O registers */
|
||||
memcpy(io_reg, io_def, 0x10);
|
||||
|
||||
/*
|
||||
Port A : 3B pad
|
||||
Port B : Unused
|
||||
Port C : Unused
|
||||
*/
|
||||
port[0].data_w = device_3b_w;
|
||||
port[0].data_r = device_3b_r;
|
||||
port[1].data_w = NULL;
|
||||
port[1].data_r = NULL;
|
||||
port[2].data_w = NULL;
|
||||
port[2].data_r = NULL;
|
||||
}
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* I/O chip functions */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
void gen_io_w(int offset, int value)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
case 0x01: /* Port A Data */
|
||||
value = ((value & 0x80) | (value & io_reg[offset+3]));
|
||||
io_reg[offset] = value;
|
||||
if(port[0].data_w) port[0].data_w(value);
|
||||
return;
|
||||
|
||||
case 0x02: /* Port B Data */
|
||||
value = ((value & 0x80) | (value & io_reg[offset+3]));
|
||||
io_reg[offset] = value;
|
||||
if(port[1].data_w) port[1].data_w(value);
|
||||
return;
|
||||
|
||||
case 0x03: /* Port C Data */
|
||||
value = ((value & 0x80) | (value & io_reg[offset+3]));
|
||||
io_reg[offset] = value;
|
||||
if(port[2].data_w) port[2].data_w(value);
|
||||
return;
|
||||
|
||||
case 0x04: /* Port A Ctrl */
|
||||
case 0x05: /* Port B Ctrl */
|
||||
case 0x06: /* Port C Ctrl */
|
||||
io_reg[offset] = value & 0xFF;
|
||||
break;
|
||||
|
||||
case 0x07: /* Port A TxData */
|
||||
case 0x0A: /* Port B TxData */
|
||||
case 0x0D: /* Port C TxData */
|
||||
io_reg[offset] = value;
|
||||
break;
|
||||
|
||||
case 0x09: /* Port A S-Ctrl */
|
||||
case 0x0C: /* Port B S-Ctrl */
|
||||
case 0x0F: /* Port C S-Ctrl */
|
||||
io_reg[offset] = (value & 0xF8);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int gen_io_r(int offset)
|
||||
{
|
||||
uint8 temp;
|
||||
uint8 has_scd = 0x20; /* No Sega CD unit attached */
|
||||
uint8 gen_ver = 0x00; /* Version 0 hardware */
|
||||
|
||||
switch(offset)
|
||||
{
|
||||
case 0x00: /* Version */
|
||||
switch(rom_version())
|
||||
{
|
||||
case 'J':
|
||||
temp = 0x00;
|
||||
break;
|
||||
case 'U':
|
||||
temp = 0x80;
|
||||
break;
|
||||
case 'E':
|
||||
temp = 0xC0;
|
||||
break;
|
||||
case 'A':
|
||||
temp = 0xC0;
|
||||
break;
|
||||
case 'B':
|
||||
temp = 0xC0;
|
||||
break;
|
||||
case '4':
|
||||
temp = 0x80;
|
||||
break;
|
||||
default:
|
||||
temp = 0x80;
|
||||
break;
|
||||
}
|
||||
return (temp | has_scd | gen_ver);
|
||||
break;
|
||||
|
||||
case 0x01: /* Port A Data */
|
||||
if(port[0].data_r) return ((io_reg[offset] & 0x80) | port[0].data_r());
|
||||
return (io_reg[offset] | ((~io_reg[offset+3]) & 0x7F));
|
||||
|
||||
case 0x02: /* Port B Data */
|
||||
if(port[1].data_r) return ((io_reg[offset] & 0x80) | port[1].data_r());
|
||||
return (io_reg[offset] | ((~io_reg[offset+3]) & 0x7F));
|
||||
|
||||
case 0x03: /* Port C Data */
|
||||
if(port[2].data_r) return ((io_reg[offset] & 0x80) | port[2].data_r());
|
||||
return (io_reg[offset] | ((~io_reg[offset+3]) & 0x7F));
|
||||
}
|
||||
|
||||
return (io_reg[offset]);
|
||||
}
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* Input callbacks */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
uint8 pad_2b_r(void)
|
||||
{
|
||||
uint8 temp = 0x3F;
|
||||
if(input.pad[0] & INPUT_UP) temp &= ~0x01;
|
||||
if(input.pad[0] & INPUT_DOWN) temp &= ~0x02;
|
||||
if(input.pad[0] & INPUT_LEFT) temp &= ~0x04;
|
||||
if(input.pad[0] & INPUT_RIGHT) temp &= ~0x08;
|
||||
if(input.pad[0] & INPUT_B) temp &= ~0x10;
|
||||
if(input.pad[0] & INPUT_C) temp &= ~0x20;
|
||||
return (temp);
|
||||
}
|
||||
|
||||
static int th = 0;
|
||||
|
||||
uint8 device_3b_r(void)
|
||||
{
|
||||
uint8 temp = 0x3F;
|
||||
|
||||
if(th)
|
||||
{
|
||||
temp = 0x3f;
|
||||
if(input.pad[0] & INPUT_UP) temp &= ~0x01;
|
||||
if(input.pad[0] & INPUT_DOWN) temp &= ~0x02;
|
||||
if(input.pad[0] & INPUT_LEFT) temp &= ~0x04;
|
||||
if(input.pad[0] & INPUT_RIGHT) temp &= ~0x08;
|
||||
if(input.pad[0] & INPUT_B) temp &= ~0x10;
|
||||
if(input.pad[0] & INPUT_C) temp &= ~0x20;
|
||||
return (temp | 0x40);
|
||||
}
|
||||
else
|
||||
{
|
||||
temp = 0x33;
|
||||
if(input.pad[0] & INPUT_UP) temp &= ~0x01;
|
||||
if(input.pad[0] & INPUT_DOWN) temp &= ~0x02;
|
||||
if(input.pad[0] & INPUT_A) temp &= ~0x10;
|
||||
if(input.pad[0] & INPUT_START) temp &= ~0x20;
|
||||
return (temp);
|
||||
}
|
||||
}
|
||||
|
||||
void device_3b_w(uint8 data)
|
||||
{
|
||||
th = (data & 0x40);
|
||||
}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
#ifndef _IO_H_
|
||||
#define _IO_H_
|
||||
|
||||
/*
|
||||
|
||||
void io_reset(void);
|
||||
void io_set_version(int export, int pal, int fdd, int n);
|
||||
|
||||
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
void (*data_w)(uint8 data);
|
||||
uint8 (*data_r)(void);
|
||||
} port_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 state;
|
||||
} t_input_3b;
|
||||
|
||||
/* Global variables */
|
||||
extern port_t port[3];
|
||||
extern uint8 io_reg[0x10];
|
||||
|
||||
/* Function prototypes */
|
||||
extern void io_reset(void);
|
||||
extern void gen_io_w(int offset, int value);
|
||||
extern int gen_io_r(int offset);
|
||||
extern uint8 pad_2b_r(void);
|
||||
extern uint8 device_3b_r(void);
|
||||
extern void device_3b_w(uint8 data);
|
||||
|
||||
#endif /* _IO_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,124 @@
|
|||
#ifndef IOPINS_H
|
||||
#define IOPINS_H
|
||||
|
||||
#include "platform_config.h"
|
||||
|
||||
#ifdef TEECOMPUTER
|
||||
|
||||
// Teecomputer layout
|
||||
|
||||
// VGA
|
||||
// R 3 2K
|
||||
// R 4 1K
|
||||
// R 33 500
|
||||
// G 11 2K
|
||||
// G 13 1K
|
||||
// G 2 500
|
||||
// B 10 820
|
||||
// B 12 390
|
||||
// HSYNC 15 82
|
||||
// VSYNC 8 82
|
||||
|
||||
// Display
|
||||
#define TFT_SCLK 27
|
||||
#define TFT_MOSI 26
|
||||
#define TFT_MISO 255
|
||||
#define TFT_TOUCH_CS 255
|
||||
#define TFT_TOUCH_INT 255
|
||||
#define TFT_DC 23
|
||||
#define TFT_CS 22 // 255 for LORES ST7789 (NO CS)
|
||||
#define TFT_RST 255 // 255 for ILI/ST if connected to 3.3V or 24 if really needed
|
||||
|
||||
|
||||
// SD
|
||||
#define SD_CS BUILTIN_SDCARD
|
||||
|
||||
// Audio
|
||||
#define AUDIO_I2S_DIN 7
|
||||
#define AUDIO_I2S_BCK 21
|
||||
#define AUDIO_I2S_LCK 20
|
||||
|
||||
// Keyboard matrix
|
||||
#define KLED 14
|
||||
//Cols (out)
|
||||
//pico 1,2,3,4,5,14
|
||||
//teen 16,6,24,25,28,31
|
||||
#define KCOLOUT1 16
|
||||
#define KCOLOUT2 6
|
||||
#define KCOLOUT3 24
|
||||
#define KCOLOUT4 25
|
||||
#define KCOLOUT5 28
|
||||
#define KCOLOUT6 31
|
||||
//Rows (in)
|
||||
//pico 9,8,6,15,7,22
|
||||
//teen 19,18,17,5,29,30,32 //5,6,16,17,18,19
|
||||
#define KROWIN1 19
|
||||
#define KROWIN2 18
|
||||
#define KROWIN3 17
|
||||
#define KROWIN4 5
|
||||
#define KROWIN5 29
|
||||
#define KROWIN6 30
|
||||
#define KROWIN7 32
|
||||
|
||||
#define PIN_KEY_USER1 41
|
||||
#define PIN_KEY_USER2 40
|
||||
|
||||
// Second joystick (external)
|
||||
#define PIN_JOY1_BTN 34
|
||||
#define PIN_JOY1_1 35 // UP
|
||||
#define PIN_JOY1_2 36 // DOWN
|
||||
#define PIN_JOY1_3 38 // RIGHT
|
||||
#define PIN_JOY1_4 37 // LEFT
|
||||
|
||||
#else
|
||||
|
||||
// Original Layout
|
||||
#define TFT_SCLK 13
|
||||
#define TFT_MOSI 11
|
||||
#define TFT_MISO 12
|
||||
#define TFT_TOUCH_CS 255
|
||||
#define TFT_TOUCH_INT 255
|
||||
#define TFT_DC 9
|
||||
#define TFT_CS 22 // 255 for LORES ST7789 (NO CS)
|
||||
#define TFT_RST 23 // 255 for ILI/ST if connected to 3.3V
|
||||
|
||||
// SD
|
||||
#define SD_CS BUILTIN_SDCARD
|
||||
|
||||
// I2C keyboard
|
||||
#define I2C_SCL_IO 19
|
||||
#define I2C_SDA_IO 18
|
||||
|
||||
// Analog joystick (primary) for JOY2 and 5 extra buttons
|
||||
#ifdef HAS_T4_VGA
|
||||
#define PIN_JOY2_A1X A3
|
||||
#define PIN_JOY2_A2Y A2
|
||||
#define PIN_JOY2_BTN 14
|
||||
#define PIN_KEY_USER1 22
|
||||
#define PIN_KEY_USER2 23
|
||||
|
||||
// Second joystick
|
||||
#define PIN_JOY1_BTN 34
|
||||
#define PIN_JOY1_1 35 // UP
|
||||
#define PIN_JOY1_2 36 // DOWN
|
||||
#define PIN_JOY1_3 38 // RIGHT
|
||||
#define PIN_JOY1_4 37 // LEFT
|
||||
|
||||
#else
|
||||
#define PIN_JOY2_A1X A1
|
||||
#define PIN_JOY2_A2Y A2
|
||||
#define PIN_JOY2_BTN 17
|
||||
#define PIN_KEY_USER1 3 //34
|
||||
#define PIN_KEY_USER2 4 //35
|
||||
|
||||
// Second joystick
|
||||
#define PIN_JOY1_BTN 2
|
||||
#define PIN_JOY1_1 14 // UP
|
||||
#define PIN_JOY1_2 7 // DOWN
|
||||
#define PIN_JOY1_3 6 // RIGHT
|
||||
#define PIN_JOY1_4 5 // LEFT
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,339 @@
|
|||
#ifndef M68K__HEADER
|
||||
#define M68K__HEADER
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ========================= LICENSING & COPYRIGHT ======================== */
|
||||
/* ======================================================================== */
|
||||
/*
|
||||
* MUSASHI
|
||||
* Version 3.3
|
||||
*
|
||||
* A portable Motorola M680x0 processor emulation engine.
|
||||
* Copyright 1998-2001 Karl Stenerud. All rights reserved.
|
||||
*
|
||||
* This code may be freely used for non-commercial purposes as long as this
|
||||
* copyright notice remains unaltered in the source code and any binary files
|
||||
* containing this code in compiled form.
|
||||
*
|
||||
* All other lisencing terms must be negotiated with the author
|
||||
* (Karl Stenerud).
|
||||
*
|
||||
* The latest version of this code can be obtained at:
|
||||
* http://kstenerud.cjb.net
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================ GENERAL DEFINES =========================== */
|
||||
|
||||
/* ======================================================================== */
|
||||
|
||||
/* There are 7 levels of interrupt to the 68K.
|
||||
* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
|
||||
*/
|
||||
#define M68K_IRQ_NONE 0
|
||||
#define M68K_IRQ_1 1
|
||||
#define M68K_IRQ_2 2
|
||||
#define M68K_IRQ_3 3
|
||||
#define M68K_IRQ_4 4
|
||||
#define M68K_IRQ_5 5
|
||||
#define M68K_IRQ_6 6
|
||||
#define M68K_IRQ_7 7
|
||||
|
||||
|
||||
/* Special interrupt acknowledge values.
|
||||
* Use these as special returns from the interrupt acknowledge callback
|
||||
* (specified later in this header).
|
||||
*/
|
||||
|
||||
/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
|
||||
* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
|
||||
* acknowledge cycle instead of DTACK.
|
||||
*/
|
||||
#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
|
||||
|
||||
/* Causes the spurious interrupt vector (0x18) to be taken
|
||||
* This happens in a real 68K if BERR is asserted during the interrupt
|
||||
* acknowledge cycle (i.e. no devices responded to the acknowledge).
|
||||
*/
|
||||
#define M68K_INT_ACK_SPURIOUS 0xfffffffe
|
||||
|
||||
|
||||
/* CPU types for use in m68k_set_cpu_type() */
|
||||
enum
|
||||
{
|
||||
M68K_CPU_TYPE_INVALID,
|
||||
M68K_CPU_TYPE_68000,
|
||||
M68K_CPU_TYPE_68010,
|
||||
M68K_CPU_TYPE_68EC020,
|
||||
M68K_CPU_TYPE_68020,
|
||||
M68K_CPU_TYPE_68030, /* Supported by disassembler ONLY */
|
||||
M68K_CPU_TYPE_68040 /* Supported by disassembler ONLY */
|
||||
};
|
||||
|
||||
/* Registers used by m68k_get_reg() and m68k_set_reg() */
|
||||
typedef enum
|
||||
{
|
||||
/* Real registers */
|
||||
M68K_REG_D0, /* Data registers */
|
||||
M68K_REG_D1,
|
||||
M68K_REG_D2,
|
||||
M68K_REG_D3,
|
||||
M68K_REG_D4,
|
||||
M68K_REG_D5,
|
||||
M68K_REG_D6,
|
||||
M68K_REG_D7,
|
||||
M68K_REG_A0, /* Address registers */
|
||||
M68K_REG_A1,
|
||||
M68K_REG_A2,
|
||||
M68K_REG_A3,
|
||||
M68K_REG_A4,
|
||||
M68K_REG_A5,
|
||||
M68K_REG_A6,
|
||||
M68K_REG_A7,
|
||||
M68K_REG_PC, /* Program Counter */
|
||||
M68K_REG_SR, /* Status Register */
|
||||
M68K_REG_SP, /* The current Stack Pointer (located in A7) */
|
||||
M68K_REG_USP, /* User Stack Pointer */
|
||||
M68K_REG_ISP, /* Interrupt Stack Pointer */
|
||||
M68K_REG_MSP, /* Master Stack Pointer */
|
||||
M68K_REG_SFC, /* Source Function Code */
|
||||
M68K_REG_DFC, /* Destination Function Code */
|
||||
M68K_REG_VBR, /* Vector Base Register */
|
||||
M68K_REG_CACR, /* Cache Control Register */
|
||||
M68K_REG_CAAR, /* Cache Address Register */
|
||||
|
||||
/* Assumed registers */
|
||||
/* These are cheat registers which emulate the 1-longword prefetch
|
||||
* present in the 68000 and 68010.
|
||||
*/
|
||||
M68K_REG_PREF_ADDR, /* Last prefetch address */
|
||||
M68K_REG_PREF_DATA, /* Last prefetch data */
|
||||
|
||||
/* Convenience registers */
|
||||
M68K_REG_PPC, /* Previous value in the program counter */
|
||||
M68K_REG_IR, /* Instruction register */
|
||||
M68K_REG_CPU_TYPE /* Type of CPU being run */
|
||||
} m68k_register_t;
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ====================== FUNCTIONS CALLED BY THE CPU ===================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* You will have to implement these functions */
|
||||
|
||||
/* read/write functions called by the CPU to access memory.
|
||||
* while values used are 32 bits, only the appropriate number
|
||||
* of bits are relevant (i.e. in write_memory_8, only the lower 8 bits
|
||||
* of value should be written to memory).
|
||||
*
|
||||
* NOTE: I have separated the immediate and PC-relative memory fetches
|
||||
* from the other memory fetches because some systems require
|
||||
* differentiation between PROGRAM and DATA fetches (usually
|
||||
* for security setups such as encryption).
|
||||
* This separation can either be achieved by setting
|
||||
* M68K_SEPARATE_READS in m68kconf.h and defining
|
||||
* the read functions, or by setting M68K_EMULATE_FC and
|
||||
* making a function code callback function.
|
||||
* Using the callback offers better emulation coverage
|
||||
* because you can also monitor whether the CPU is in SYSTEM or
|
||||
* USER mode, but it is also slower.
|
||||
*/
|
||||
|
||||
/* Read from anywhere */
|
||||
unsigned int m68k_read_memory_8(unsigned int address);
|
||||
unsigned int m68k_read_memory_16(unsigned int address);
|
||||
unsigned int m68k_read_memory_32(unsigned int address);
|
||||
|
||||
/* Read data immediately following the PC */
|
||||
unsigned int m68k_read_immediate_16(unsigned int address);
|
||||
unsigned int m68k_read_immediate_32(unsigned int address);
|
||||
|
||||
/* Read data relative to the PC */
|
||||
unsigned int m68k_read_pcrelative_8(unsigned int address);
|
||||
unsigned int m68k_read_pcrelative_16(unsigned int address);
|
||||
unsigned int m68k_read_pcrelative_32(unsigned int address);
|
||||
|
||||
/* Memory access for the disassembler */
|
||||
unsigned int m68k_read_disassembler_8 (unsigned int address);
|
||||
unsigned int m68k_read_disassembler_16 (unsigned int address);
|
||||
unsigned int m68k_read_disassembler_32 (unsigned int address);
|
||||
|
||||
/* Write to anywhere */
|
||||
void m68k_write_memory_8(unsigned int address, unsigned int value);
|
||||
void m68k_write_memory_16(unsigned int address, unsigned int value);
|
||||
void m68k_write_memory_32(unsigned int address, unsigned int value);
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================== CALLBACKS =============================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* These functions allow you to set callbacks to the host when specific events
|
||||
* occur. Note that you must enable the corresponding value in m68kconf.h
|
||||
* in order for these to do anything useful.
|
||||
* Note: I have defined default callbacks which are used if you have enabled
|
||||
* the corresponding #define in m68kconf.h but either haven't assigned a
|
||||
* callback or have assigned a callback of NULL.
|
||||
*/
|
||||
|
||||
/* Set the callback for an interrupt acknowledge.
|
||||
* You must enable M68K_EMULATE_INT_ACK in m68kconf.h.
|
||||
* The CPU will call the callback with the interrupt level being acknowledged.
|
||||
* The host program must return either a vector from 0x02-0xff, or one of the
|
||||
* special interrupt acknowledge values specified earlier in this header.
|
||||
* If this is not implemented, the CPU will always assume an autovectored
|
||||
* interrupt, and will automatically clear the interrupt request when it
|
||||
* services the interrupt.
|
||||
* Default behavior: return M68K_INT_ACK_AUTOVECTOR.
|
||||
*/
|
||||
void m68k_set_int_ack_callback(int (*callback)(int int_level));
|
||||
|
||||
|
||||
/* Set the callback for a breakpoint acknowledge (68010+).
|
||||
* You must enable M68K_EMULATE_BKPT_ACK in m68kconf.h.
|
||||
* The CPU will call the callback with whatever was in the data field of the
|
||||
* BKPT instruction for 68020+, or 0 for 68010.
|
||||
* Default behavior: do nothing.
|
||||
*/
|
||||
void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data));
|
||||
|
||||
|
||||
/* Set the callback for the RESET instruction.
|
||||
* You must enable M68K_EMULATE_RESET in m68kconf.h.
|
||||
* The CPU calls this callback every time it encounters a RESET instruction.
|
||||
* Default behavior: do nothing.
|
||||
*/
|
||||
void m68k_set_reset_instr_callback(void (*callback)(void));
|
||||
|
||||
|
||||
/* Set the callback for informing of a large PC change.
|
||||
* You must enable M68K_MONITOR_PC in m68kconf.h.
|
||||
* The CPU calls this callback with the new PC value every time the PC changes
|
||||
* by a large value (currently set for changes by longwords).
|
||||
* Default behavior: do nothing.
|
||||
*/
|
||||
void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc));
|
||||
|
||||
|
||||
/* Set the callback for CPU function code changes.
|
||||
* You must enable M68K_EMULATE_FC in m68kconf.h.
|
||||
* The CPU calls this callback with the function code before every memory
|
||||
* access to set the CPU's function code according to what kind of memory
|
||||
* access it is (supervisor/user, program/data and such).
|
||||
* Default behavior: do nothing.
|
||||
*/
|
||||
void m68k_set_fc_callback(void (*callback)(unsigned int new_fc));
|
||||
|
||||
|
||||
/* Set a callback for the instruction cycle of the CPU.
|
||||
* You must enable M68K_INSTRUCTION_HOOK in m68kconf.h.
|
||||
* The CPU calls this callback just before fetching the opcode in the
|
||||
* instruction cycle.
|
||||
* Default behavior: do nothing.
|
||||
*/
|
||||
void m68k_set_instr_hook_callback(void (*callback)(void));
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Use this function to set the CPU type you want to emulate.
|
||||
* Currently supported types are: M68K_CPU_TYPE_68000, M68K_CPU_TYPE_68010,
|
||||
* M68K_CPU_TYPE_EC020, and M68K_CPU_TYPE_68020.
|
||||
*/
|
||||
void m68k_set_cpu_type(unsigned int cpu_type);
|
||||
|
||||
/* Pulse the RESET pin on the CPU.
|
||||
* You *MUST* reset the CPU at least once to initialize the emulation
|
||||
* Note: If you didn't call m68k_set_cpu_type() before resetting
|
||||
* the CPU for the first time, the CPU will be set to
|
||||
* M68K_CPU_TYPE_68000.
|
||||
*/
|
||||
void m68k_pulse_reset(void);
|
||||
|
||||
/* execute num_cycles worth of instructions. returns number of cycles used */
|
||||
int m68k_execute(int num_cycles);
|
||||
|
||||
/* These functions let you read/write/modify the number of cycles left to run
|
||||
* while m68k_execute() is running.
|
||||
* These are useful if the 68k accesses a memory-mapped port on another device
|
||||
* that requires immediate processing by another CPU.
|
||||
*/
|
||||
int m68k_cycles_run(void); /* Number of cycles run so far */
|
||||
int m68k_cycles_remaining(void); /* Number of cycles left */
|
||||
void m68k_modify_timeslice(int cycles); /* Modify cycles left */
|
||||
void m68k_end_timeslice(void); /* End timeslice now */
|
||||
|
||||
/* Set the IPL0-IPL2 pins on the CPU (IRQ).
|
||||
* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
|
||||
* Setting IRQ to 0 will clear an interrupt request.
|
||||
*/
|
||||
void m68k_set_irq(unsigned int int_level);
|
||||
|
||||
|
||||
/* Halt the CPU as if you pulsed the HALT pin. */
|
||||
void m68k_pulse_halt(void);
|
||||
|
||||
|
||||
/* Context switching to allow multiple CPUs */
|
||||
|
||||
/* Get the size of the cpu context in bytes */
|
||||
unsigned int m68k_context_size(void);
|
||||
|
||||
/* Get a cpu context */
|
||||
unsigned int m68k_get_context(void* dst);
|
||||
|
||||
/* set the current cpu context */
|
||||
void m68k_set_context(void* dst);
|
||||
|
||||
/* Save the current cpu context to disk.
|
||||
* You must provide a function pointer of the form:
|
||||
* void save_value(char* identifier, unsigned int value)
|
||||
*/
|
||||
void m68k_save_context( void (*save_value)(char* identifier, unsigned int value));
|
||||
|
||||
/* Load a cpu context from disk.
|
||||
* You must provide a function pointer of the form:
|
||||
* unsigned int load_value(char* identifier)
|
||||
*/
|
||||
void m68k_load_context(unsigned int (*load_value)(char* identifier));
|
||||
|
||||
|
||||
|
||||
/* Peek at the internals of a CPU context. This can either be a context
|
||||
* retrieved using m68k_get_context() or the currently running context.
|
||||
* If context is NULL, the currently running CPU context will be used.
|
||||
*/
|
||||
unsigned int m68k_get_reg(void* context, m68k_register_t reg);
|
||||
|
||||
/* Poke values into the internals of the currently running CPU context */
|
||||
void m68k_set_reg(m68k_register_t reg, unsigned int value);
|
||||
|
||||
/* Check if an instruction is valid for the specified CPU type */
|
||||
unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type);
|
||||
|
||||
/* Disassemble 1 instruction using the epecified CPU type at pc. Stores
|
||||
* disassembly in str_buff and returns the size of the instruction in bytes.
|
||||
*/
|
||||
unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type);
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================= CONFIGURATION ============================ */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Import the configuration for this build */
|
||||
#include "m68kconf.h"
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================== END OF FILE ============================= */
|
||||
/* ======================================================================== */
|
||||
|
||||
#endif /* M68K__HEADER */
|
||||
|
|
@ -0,0 +1,183 @@
|
|||
/* ======================================================================== */
|
||||
/* ========================= LICENSING & COPYRIGHT ======================== */
|
||||
/* ======================================================================== */
|
||||
/*
|
||||
* MUSASHI
|
||||
* Version 3.3
|
||||
*
|
||||
* A portable Motorola M680x0 processor emulation engine.
|
||||
* Copyright 1998-2001 Karl Stenerud. All rights reserved.
|
||||
*
|
||||
* This code may be freely used for non-commercial purposes as long as this
|
||||
* copyright notice remains unaltered in the source code and any binary files
|
||||
* containing this code in compiled form.
|
||||
*
|
||||
* All other lisencing terms must be negotiated with the author
|
||||
* (Karl Stenerud).
|
||||
*
|
||||
* The latest version of this code can be obtained at:
|
||||
* http://kstenerud.cjb.net
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef M68KCONF__HEADER
|
||||
#define M68KCONF__HEADER
|
||||
|
||||
|
||||
/* Configuration switches.
|
||||
* Use OPT_SPECIFY_HANDLER for configuration options that allow callbacks.
|
||||
* OPT_SPECIFY_HANDLER causes the core to link directly to the function
|
||||
* or macro you specify, rather than using callback functions whose pointer
|
||||
* must be passed in using m68k_set_xxx_callback().
|
||||
*/
|
||||
#define OPT_OFF 0
|
||||
#define OPT_ON 1
|
||||
#define OPT_SPECIFY_HANDLER 2
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================== MAME STUFF ============================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* If you're compiling this for MAME, only change M68K_COMPILE_FOR_MAME
|
||||
* to OPT_ON and use m68kmame.h to configure the 68k core.
|
||||
*/
|
||||
#ifndef M68K_COMPILE_FOR_MAME
|
||||
#define M68K_COMPILE_FOR_MAME OPT_OFF
|
||||
#endif /* M68K_COMPILE_FOR_MAME */
|
||||
|
||||
#if M68K_COMPILE_FOR_MAME == OPT_ON
|
||||
#include "m68kmame.h"
|
||||
#else
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================= CONFIGURATION ============================ */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Turn on if you want to use the following M68K variants */
|
||||
#define M68K_EMULATE_010 OPT_ON
|
||||
#define M68K_EMULATE_EC020 OPT_ON
|
||||
#define M68K_EMULATE_020 OPT_ON
|
||||
|
||||
|
||||
/* If on, the CPU will call m68k_read_immediate_xx() for immediate addressing
|
||||
* and m68k_read_pcrelative_xx() for PC-relative addressing.
|
||||
* If off, all read requests from the CPU will be redirected to m68k_read_xx()
|
||||
*/
|
||||
#define M68K_SEPARATE_READS OPT_OFF
|
||||
|
||||
|
||||
/* If on, CPU will call the interrupt acknowledge callback when it services an
|
||||
* interrupt.
|
||||
* If off, all interrupts will be autovectored and all interrupt requests will
|
||||
* auto-clear when the interrupt is serviced.
|
||||
*/
|
||||
#define M68K_EMULATE_INT_ACK OPT_SPECIFY_HANDLER
|
||||
#define M68K_INT_ACK_CALLBACK(A) vdp_int_ack_callback(A)
|
||||
|
||||
|
||||
/* If on, CPU will call the breakpoint acknowledge callback when it encounters
|
||||
* a breakpoint instruction and it is running a 68010+.
|
||||
*/
|
||||
#define M68K_EMULATE_BKPT_ACK OPT_OFF
|
||||
#define M68K_BKPT_ACK_CALLBACK() your_bkpt_ack_handler_function()
|
||||
|
||||
|
||||
/* If on, the CPU will monitor the trace flags and take trace exceptions
|
||||
*/
|
||||
#define M68K_EMULATE_TRACE OPT_OFF
|
||||
|
||||
|
||||
/* If on, CPU will call the output reset callback when it encounters a reset
|
||||
* instruction.
|
||||
*/
|
||||
#define M68K_EMULATE_RESET OPT_OFF
|
||||
#define M68K_RESET_CALLBACK() your_reset_handler_function()
|
||||
|
||||
|
||||
/* If on, CPU will call the set fc callback on every memory access to
|
||||
* differentiate between user/supervisor, program/data access like a real
|
||||
* 68000 would. This should be enabled and the callback should be set if you
|
||||
* want to properly emulate the m68010 or higher. (moves uses function codes
|
||||
* to read/write data from different address spaces)
|
||||
*/
|
||||
#define M68K_EMULATE_FC OPT_OFF
|
||||
#define M68K_SET_FC_CALLBACK(A) your_set_fc_handler_function(A)
|
||||
|
||||
|
||||
/* If on, CPU will call the pc changed callback when it changes the PC by a
|
||||
* large value. This allows host programs to be nicer when it comes to
|
||||
* fetching immediate data and instructions on a banked memory system.
|
||||
*/
|
||||
#define M68K_MONITOR_PC OPT_OFF
|
||||
#define M68K_SET_PC_CALLBACK(A) your_pc_changed_handler_function(A)
|
||||
|
||||
|
||||
/* If on, CPU will call the instruction hook callback before every
|
||||
* instruction.
|
||||
*/
|
||||
#define M68K_INSTRUCTION_HOOK OPT_OFF
|
||||
#define M68K_INSTRUCTION_CALLBACK() your_instruction_hook_function()
|
||||
|
||||
|
||||
/* If on, the CPU will emulate the 4-byte prefetch queue of a real 68000 */
|
||||
#define M68K_EMULATE_PREFETCH OPT_OFF
|
||||
|
||||
|
||||
/* If on, the CPU will generate address error exceptions if it tries to
|
||||
* access a word or longword at an odd address.
|
||||
* NOTE: Do not enable this! It is not working!
|
||||
*/
|
||||
#define M68K_EMULATE_ADDRESS_ERROR OPT_OFF
|
||||
|
||||
|
||||
/* Turn on to enable logging of illegal instruction calls.
|
||||
* M68K_LOG_FILEHANDLE must be #defined to a stdio file stream.
|
||||
* Turn on M68K_LOG_1010_1111 to log all 1010 and 1111 calls.
|
||||
*/
|
||||
#define M68K_LOG_ENABLE OPT_OFF
|
||||
#define M68K_LOG_1010_1111 OPT_OFF
|
||||
#define M68K_LOG_FILEHANDLE some_file_handle
|
||||
|
||||
|
||||
/* ----------------------------- COMPATIBILITY ---------------------------- */
|
||||
|
||||
/* The following options set optimizations that violate the current ANSI
|
||||
* standard, but will be compliant under the forthcoming C9X standard.
|
||||
*/
|
||||
|
||||
|
||||
/* If on, the enulation core will use 64-bit integers to speed up some
|
||||
* operations.
|
||||
*/
|
||||
#define M68K_USE_64_BIT OPT_OFF
|
||||
|
||||
|
||||
/* Set to your compiler's static inline keyword to enable it, or
|
||||
* set it to blank to disable it.
|
||||
* If you define INLINE in the makefile, it will override this value.
|
||||
* NOTE: not enabling inline functions will SEVERELY slow down emulation.
|
||||
*/
|
||||
#ifndef INLINE
|
||||
#define INLINE static __inline__
|
||||
#endif /* INLINE */
|
||||
|
||||
|
||||
/* If your environment requires special prefixes for system callback functions
|
||||
* such as the argument to qsort(), then set them here or in the makefile.
|
||||
*/
|
||||
#ifndef DECL_SPEC
|
||||
#define DECL_SPEC
|
||||
#endif
|
||||
|
||||
#endif /* M68K_COMPILE_FOR_MAME */
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================== END OF FILE ============================= */
|
||||
/* ======================================================================== */
|
||||
|
||||
#endif /* M68KCONF__HEADER */
|
||||
|
|
@ -0,0 +1,895 @@
|
|||
/* ======================================================================== */
|
||||
/* ========================= LICENSING & COPYRIGHT ======================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
#if 0
|
||||
static const char* copyright_notice =
|
||||
"MUSASHI\n"
|
||||
"Version 3.3 (2001-01-29)\n"
|
||||
"A portable Motorola M680x0 processor emulation engine.\n"
|
||||
"Copyright 1998-2001 Karl Stenerud. All rights reserved.\n"
|
||||
"\n"
|
||||
"This code may be freely used for non-commercial purpooses as long as this\n"
|
||||
"copyright notice remains unaltered in the source code and any binary files\n"
|
||||
"containing this code in compiled form.\n"
|
||||
"\n"
|
||||
"All other lisencing terms must be negotiated with the author\n"
|
||||
"(Karl Stenerud).\n"
|
||||
"\n"
|
||||
"The latest version of this code can be obtained at:\n"
|
||||
"http://kstenerud.cjb.net\n"
|
||||
;
|
||||
#endif
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ================================= NOTES ================================ */
|
||||
/* ======================================================================== */
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ================================ INCLUDES ============================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
#include "m68kops.h"
|
||||
#include "m68kcpu.h"
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ================================= DATA ================================= */
|
||||
/* ======================================================================== */
|
||||
|
||||
int m68ki_initial_cycles;
|
||||
int m68ki_remaining_cycles = 0; /* Number of clocks remaining */
|
||||
uint m68ki_tracing = 0;
|
||||
uint m68ki_address_space;
|
||||
|
||||
#ifdef M68K_LOG_ENABLE
|
||||
char* m68ki_cpu_names[9] =
|
||||
{
|
||||
"Invalid CPU",
|
||||
"M68000",
|
||||
"M68010",
|
||||
"Invalid CPU",
|
||||
"M68EC020"
|
||||
"Invalid CPU",
|
||||
"Invalid CPU",
|
||||
"Invalid CPU",
|
||||
"M68020"
|
||||
};
|
||||
#endif /* M68K_LOG_ENABLE */
|
||||
|
||||
/* The CPU core */
|
||||
m68ki_cpu_core m68ki_cpu = {0};
|
||||
|
||||
#if M68K_EMULATE_ADDRESS_ERROR
|
||||
jmp_buf m68ki_address_error_trap;
|
||||
#endif /* M68K_EMULATE_ADDRESS_ERROR */
|
||||
|
||||
#include "arduinoproto.h"
|
||||
/* Used by shift & rotate instructions */
|
||||
PROGMEM const uint8 m68ki_shift_8_table[65] =
|
||||
{
|
||||
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff
|
||||
};
|
||||
PROGMEM const uint16 m68ki_shift_16_table[65] =
|
||||
{
|
||||
0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
|
||||
0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
|
||||
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
|
||||
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
|
||||
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
|
||||
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
|
||||
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
|
||||
0xffff, 0xffff
|
||||
};
|
||||
PROGMEM const uint m68ki_shift_32_table[65] =
|
||||
{
|
||||
0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
|
||||
0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
|
||||
0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000,
|
||||
0xffffc000, 0xffffe000, 0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00,
|
||||
0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8,
|
||||
0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
|
||||
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
|
||||
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
|
||||
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
|
||||
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
|
||||
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
|
||||
};
|
||||
|
||||
|
||||
/* Number of clock cycles to use for exception processing.
|
||||
* I used 4 for any vectors that are undocumented for processing times.
|
||||
*/
|
||||
PROGMEM const uint8 m68ki_exception_cycle_table[3][256] =
|
||||
{
|
||||
{ /* 000 */
|
||||
4, /* 0: Reset - Initial Stack Pointer */
|
||||
4, /* 1: Reset - Initial Program Counter */
|
||||
50, /* 2: Bus Error (unemulated) */
|
||||
50, /* 3: Address Error (unemulated) */
|
||||
34, /* 4: Illegal Instruction */
|
||||
38, /* 5: Divide by Zero -- ASG: changed from 42 */
|
||||
40, /* 6: CHK -- ASG: chanaged from 44 */
|
||||
34, /* 7: TRAPV */
|
||||
34, /* 8: Privilege Violation */
|
||||
34, /* 9: Trace */
|
||||
4, /* 10: 1010 */
|
||||
4, /* 11: 1111 */
|
||||
4, /* 12: RESERVED */
|
||||
4, /* 13: Coprocessor Protocol Violation (unemulated) */
|
||||
4, /* 14: Format Error */
|
||||
44, /* 15: Uninitialized Interrupt */
|
||||
4, /* 16: RESERVED */
|
||||
4, /* 17: RESERVED */
|
||||
4, /* 18: RESERVED */
|
||||
4, /* 19: RESERVED */
|
||||
4, /* 20: RESERVED */
|
||||
4, /* 21: RESERVED */
|
||||
4, /* 22: RESERVED */
|
||||
4, /* 23: RESERVED */
|
||||
44, /* 24: Spurious Interrupt */
|
||||
44, /* 25: Level 1 Interrupt Autovector */
|
||||
44, /* 26: Level 2 Interrupt Autovector */
|
||||
44, /* 27: Level 3 Interrupt Autovector */
|
||||
44, /* 28: Level 4 Interrupt Autovector */
|
||||
44, /* 29: Level 5 Interrupt Autovector */
|
||||
44, /* 30: Level 6 Interrupt Autovector */
|
||||
44, /* 31: Level 7 Interrupt Autovector */
|
||||
34, /* 32: TRAP #0 -- ASG: chanaged from 38 */
|
||||
34, /* 33: TRAP #1 */
|
||||
34, /* 34: TRAP #2 */
|
||||
34, /* 35: TRAP #3 */
|
||||
34, /* 36: TRAP #4 */
|
||||
34, /* 37: TRAP #5 */
|
||||
34, /* 38: TRAP #6 */
|
||||
34, /* 39: TRAP #7 */
|
||||
34, /* 40: TRAP #8 */
|
||||
34, /* 41: TRAP #9 */
|
||||
34, /* 42: TRAP #10 */
|
||||
34, /* 43: TRAP #11 */
|
||||
34, /* 44: TRAP #12 */
|
||||
34, /* 45: TRAP #13 */
|
||||
34, /* 46: TRAP #14 */
|
||||
34, /* 47: TRAP #15 */
|
||||
4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
|
||||
4, /* 49: FP Inexact Result (unemulated) */
|
||||
4, /* 50: FP Divide by Zero (unemulated) */
|
||||
4, /* 51: FP Underflow (unemulated) */
|
||||
4, /* 52: FP Operand Error (unemulated) */
|
||||
4, /* 53: FP Overflow (unemulated) */
|
||||
4, /* 54: FP Signaling NAN (unemulated) */
|
||||
4, /* 55: FP Unimplemented Data Type (unemulated) */
|
||||
4, /* 56: MMU Configuration Error (unemulated) */
|
||||
4, /* 57: MMU Illegal Operation Error (unemulated) */
|
||||
4, /* 58: MMU Access Level Violation Error (unemulated) */
|
||||
4, /* 59: RESERVED */
|
||||
4, /* 60: RESERVED */
|
||||
4, /* 61: RESERVED */
|
||||
4, /* 62: RESERVED */
|
||||
4, /* 63: RESERVED */
|
||||
/* 64-255: User Defined */
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
|
||||
},
|
||||
{ /* 010 */
|
||||
4, /* 0: Reset - Initial Stack Pointer */
|
||||
4, /* 1: Reset - Initial Program Counter */
|
||||
126, /* 2: Bus Error (unemulated) */
|
||||
126, /* 3: Address Error (unemulated) */
|
||||
38, /* 4: Illegal Instruction */
|
||||
44, /* 5: Divide by Zero */
|
||||
44, /* 6: CHK */
|
||||
34, /* 7: TRAPV */
|
||||
38, /* 8: Privilege Violation */
|
||||
38, /* 9: Trace */
|
||||
4, /* 10: 1010 */
|
||||
4, /* 11: 1111 */
|
||||
4, /* 12: RESERVED */
|
||||
4, /* 13: Coprocessor Protocol Violation (unemulated) */
|
||||
4, /* 14: Format Error */
|
||||
44, /* 15: Uninitialized Interrupt */
|
||||
4, /* 16: RESERVED */
|
||||
4, /* 17: RESERVED */
|
||||
4, /* 18: RESERVED */
|
||||
4, /* 19: RESERVED */
|
||||
4, /* 20: RESERVED */
|
||||
4, /* 21: RESERVED */
|
||||
4, /* 22: RESERVED */
|
||||
4, /* 23: RESERVED */
|
||||
46, /* 24: Spurious Interrupt */
|
||||
46, /* 25: Level 1 Interrupt Autovector */
|
||||
46, /* 26: Level 2 Interrupt Autovector */
|
||||
46, /* 27: Level 3 Interrupt Autovector */
|
||||
46, /* 28: Level 4 Interrupt Autovector */
|
||||
46, /* 29: Level 5 Interrupt Autovector */
|
||||
46, /* 30: Level 6 Interrupt Autovector */
|
||||
46, /* 31: Level 7 Interrupt Autovector */
|
||||
38, /* 32: TRAP #0 */
|
||||
38, /* 33: TRAP #1 */
|
||||
38, /* 34: TRAP #2 */
|
||||
38, /* 35: TRAP #3 */
|
||||
38, /* 36: TRAP #4 */
|
||||
38, /* 37: TRAP #5 */
|
||||
38, /* 38: TRAP #6 */
|
||||
38, /* 39: TRAP #7 */
|
||||
38, /* 40: TRAP #8 */
|
||||
38, /* 41: TRAP #9 */
|
||||
38, /* 42: TRAP #10 */
|
||||
38, /* 43: TRAP #11 */
|
||||
38, /* 44: TRAP #12 */
|
||||
38, /* 45: TRAP #13 */
|
||||
38, /* 46: TRAP #14 */
|
||||
38, /* 47: TRAP #15 */
|
||||
4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
|
||||
4, /* 49: FP Inexact Result (unemulated) */
|
||||
4, /* 50: FP Divide by Zero (unemulated) */
|
||||
4, /* 51: FP Underflow (unemulated) */
|
||||
4, /* 52: FP Operand Error (unemulated) */
|
||||
4, /* 53: FP Overflow (unemulated) */
|
||||
4, /* 54: FP Signaling NAN (unemulated) */
|
||||
4, /* 55: FP Unimplemented Data Type (unemulated) */
|
||||
4, /* 56: MMU Configuration Error (unemulated) */
|
||||
4, /* 57: MMU Illegal Operation Error (unemulated) */
|
||||
4, /* 58: MMU Access Level Violation Error (unemulated) */
|
||||
4, /* 59: RESERVED */
|
||||
4, /* 60: RESERVED */
|
||||
4, /* 61: RESERVED */
|
||||
4, /* 62: RESERVED */
|
||||
4, /* 63: RESERVED */
|
||||
/* 64-255: User Defined */
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
|
||||
},
|
||||
{ /* 020 */
|
||||
4, /* 0: Reset - Initial Stack Pointer */
|
||||
4, /* 1: Reset - Initial Program Counter */
|
||||
50, /* 2: Bus Error (unemulated) */
|
||||
50, /* 3: Address Error (unemulated) */
|
||||
20, /* 4: Illegal Instruction */
|
||||
38, /* 5: Divide by Zero */
|
||||
40, /* 6: CHK */
|
||||
20, /* 7: TRAPV */
|
||||
34, /* 8: Privilege Violation */
|
||||
25, /* 9: Trace */
|
||||
20, /* 10: 1010 */
|
||||
20, /* 11: 1111 */
|
||||
4, /* 12: RESERVED */
|
||||
4, /* 13: Coprocessor Protocol Violation (unemulated) */
|
||||
4, /* 14: Format Error */
|
||||
30, /* 15: Uninitialized Interrupt */
|
||||
4, /* 16: RESERVED */
|
||||
4, /* 17: RESERVED */
|
||||
4, /* 18: RESERVED */
|
||||
4, /* 19: RESERVED */
|
||||
4, /* 20: RESERVED */
|
||||
4, /* 21: RESERVED */
|
||||
4, /* 22: RESERVED */
|
||||
4, /* 23: RESERVED */
|
||||
30, /* 24: Spurious Interrupt */
|
||||
30, /* 25: Level 1 Interrupt Autovector */
|
||||
30, /* 26: Level 2 Interrupt Autovector */
|
||||
30, /* 27: Level 3 Interrupt Autovector */
|
||||
30, /* 28: Level 4 Interrupt Autovector */
|
||||
30, /* 29: Level 5 Interrupt Autovector */
|
||||
30, /* 30: Level 6 Interrupt Autovector */
|
||||
30, /* 31: Level 7 Interrupt Autovector */
|
||||
20, /* 32: TRAP #0 */
|
||||
20, /* 33: TRAP #1 */
|
||||
20, /* 34: TRAP #2 */
|
||||
20, /* 35: TRAP #3 */
|
||||
20, /* 36: TRAP #4 */
|
||||
20, /* 37: TRAP #5 */
|
||||
20, /* 38: TRAP #6 */
|
||||
20, /* 39: TRAP #7 */
|
||||
20, /* 40: TRAP #8 */
|
||||
20, /* 41: TRAP #9 */
|
||||
20, /* 42: TRAP #10 */
|
||||
20, /* 43: TRAP #11 */
|
||||
20, /* 44: TRAP #12 */
|
||||
20, /* 45: TRAP #13 */
|
||||
20, /* 46: TRAP #14 */
|
||||
20, /* 47: TRAP #15 */
|
||||
4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
|
||||
4, /* 49: FP Inexact Result (unemulated) */
|
||||
4, /* 50: FP Divide by Zero (unemulated) */
|
||||
4, /* 51: FP Underflow (unemulated) */
|
||||
4, /* 52: FP Operand Error (unemulated) */
|
||||
4, /* 53: FP Overflow (unemulated) */
|
||||
4, /* 54: FP Signaling NAN (unemulated) */
|
||||
4, /* 55: FP Unimplemented Data Type (unemulated) */
|
||||
4, /* 56: MMU Configuration Error (unemulated) */
|
||||
4, /* 57: MMU Illegal Operation Error (unemulated) */
|
||||
4, /* 58: MMU Access Level Violation Error (unemulated) */
|
||||
4, /* 59: RESERVED */
|
||||
4, /* 60: RESERVED */
|
||||
4, /* 61: RESERVED */
|
||||
4, /* 62: RESERVED */
|
||||
4, /* 63: RESERVED */
|
||||
/* 64-255: User Defined */
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
|
||||
4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
|
||||
}
|
||||
};
|
||||
|
||||
PROGMEM const uint8 m68ki_ea_idx_cycle_table[64] =
|
||||
{
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, /* ..01.000 no memory indirect, base NULL */
|
||||
5, /* ..01..01 memory indirect, base NULL, outer NULL */
|
||||
7, /* ..01..10 memory indirect, base NULL, outer 16 */
|
||||
7, /* ..01..11 memory indirect, base NULL, outer 32 */
|
||||
0, 5, 7, 7, 0, 5, 7, 7, 0, 5, 7, 7,
|
||||
2, /* ..10.000 no memory indirect, base 16 */
|
||||
7, /* ..10..01 memory indirect, base 16, outer NULL */
|
||||
9, /* ..10..10 memory indirect, base 16, outer 16 */
|
||||
9, /* ..10..11 memory indirect, base 16, outer 32 */
|
||||
0, 7, 9, 9, 0, 7, 9, 9, 0, 7, 9, 9,
|
||||
6, /* ..11.000 no memory indirect, base 32 */
|
||||
11, /* ..11..01 memory indirect, base 32, outer NULL */
|
||||
13, /* ..11..10 memory indirect, base 32, outer 16 */
|
||||
13, /* ..11..11 memory indirect, base 32, outer 32 */
|
||||
0, 11, 13, 13, 0, 11, 13, 13, 0, 11, 13, 13
|
||||
};
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* =============================== CALLBACKS ============================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Default callbacks used if the callback hasn't been set yet, or if the
|
||||
* callback is set to NULL
|
||||
*/
|
||||
|
||||
/* Interrupt acknowledge */
|
||||
static int default_int_ack_callback_data;
|
||||
static int default_int_ack_callback(int int_level)
|
||||
{
|
||||
default_int_ack_callback_data = int_level;
|
||||
CPU_INT_LEVEL = 0;
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
}
|
||||
|
||||
/* Breakpoint acknowledge */
|
||||
static unsigned int default_bkpt_ack_callback_data;
|
||||
static void default_bkpt_ack_callback(unsigned int data)
|
||||
{
|
||||
default_bkpt_ack_callback_data = data;
|
||||
}
|
||||
|
||||
/* Called when a reset instruction is executed */
|
||||
static void default_reset_instr_callback(void)
|
||||
{
|
||||
}
|
||||
|
||||
/* Called when the program counter changed by a large value */
|
||||
static unsigned int default_pc_changed_callback_data;
|
||||
static void default_pc_changed_callback(unsigned int new_pc)
|
||||
{
|
||||
default_pc_changed_callback_data = new_pc;
|
||||
}
|
||||
|
||||
/* Called every time there's bus activity (read/write to/from memory */
|
||||
static unsigned int default_set_fc_callback_data;
|
||||
static void default_set_fc_callback(unsigned int new_fc)
|
||||
{
|
||||
default_set_fc_callback_data = new_fc;
|
||||
}
|
||||
|
||||
/* Called every instruction cycle prior to execution */
|
||||
static void default_instr_hook_callback(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ================================= API ================================== */
|
||||
/* ======================================================================== */
|
||||
|
||||
/* Access the internals of the CPU */
|
||||
unsigned int m68k_get_reg(void* context, m68k_register_t regnum)
|
||||
{
|
||||
m68ki_cpu_core* cpu = context != NULL ?(m68ki_cpu_core*)context : &m68ki_cpu;
|
||||
|
||||
switch(regnum)
|
||||
{
|
||||
case M68K_REG_D0: return cpu->dar[0];
|
||||
case M68K_REG_D1: return cpu->dar[1];
|
||||
case M68K_REG_D2: return cpu->dar[2];
|
||||
case M68K_REG_D3: return cpu->dar[3];
|
||||
case M68K_REG_D4: return cpu->dar[4];
|
||||
case M68K_REG_D5: return cpu->dar[5];
|
||||
case M68K_REG_D6: return cpu->dar[6];
|
||||
case M68K_REG_D7: return cpu->dar[7];
|
||||
case M68K_REG_A0: return cpu->dar[8];
|
||||
case M68K_REG_A1: return cpu->dar[9];
|
||||
case M68K_REG_A2: return cpu->dar[10];
|
||||
case M68K_REG_A3: return cpu->dar[11];
|
||||
case M68K_REG_A4: return cpu->dar[12];
|
||||
case M68K_REG_A5: return cpu->dar[13];
|
||||
case M68K_REG_A6: return cpu->dar[14];
|
||||
case M68K_REG_A7: return cpu->dar[15];
|
||||
case M68K_REG_PC: return MASK_OUT_ABOVE_32(cpu->pc);
|
||||
case M68K_REG_SR: return cpu->t1_flag |
|
||||
cpu->t0_flag |
|
||||
(cpu->s_flag << 11) |
|
||||
(cpu->m_flag << 11) |
|
||||
cpu->int_mask |
|
||||
((cpu->x_flag & XFLAG_SET) >> 4) |
|
||||
((cpu->n_flag & NFLAG_SET) >> 4) |
|
||||
((!cpu->not_z_flag) << 2) |
|
||||
((cpu->v_flag & VFLAG_SET) >> 6) |
|
||||
((cpu->c_flag & CFLAG_SET) >> 8);
|
||||
case M68K_REG_SP: return cpu->dar[15];
|
||||
case M68K_REG_USP: return cpu->s_flag ? cpu->sp[0] : cpu->dar[15];
|
||||
case M68K_REG_ISP: return cpu->s_flag && !cpu->m_flag ? cpu->dar[15] : cpu->sp[4];
|
||||
case M68K_REG_MSP: return cpu->s_flag && cpu->m_flag ? cpu->dar[15] : cpu->sp[6];
|
||||
case M68K_REG_SFC: return cpu->sfc;
|
||||
case M68K_REG_DFC: return cpu->dfc;
|
||||
case M68K_REG_VBR: return cpu->vbr;
|
||||
case M68K_REG_CACR: return cpu->cacr;
|
||||
case M68K_REG_CAAR: return cpu->caar;
|
||||
case M68K_REG_PREF_ADDR: return cpu->pref_addr;
|
||||
case M68K_REG_PREF_DATA: return cpu->pref_data;
|
||||
case M68K_REG_PPC: return MASK_OUT_ABOVE_32(cpu->ppc);
|
||||
case M68K_REG_IR: return cpu->ir;
|
||||
case M68K_REG_CPU_TYPE:
|
||||
switch(cpu->cpu_type)
|
||||
{
|
||||
case CPU_TYPE_000: return (unsigned int)M68K_CPU_TYPE_68000;
|
||||
case CPU_TYPE_010: return (unsigned int)M68K_CPU_TYPE_68010;
|
||||
case CPU_TYPE_EC020: return (unsigned int)M68K_CPU_TYPE_68EC020;
|
||||
case CPU_TYPE_020: return (unsigned int)M68K_CPU_TYPE_68020;
|
||||
}
|
||||
return M68K_CPU_TYPE_INVALID;
|
||||
default: return 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void m68k_set_reg(m68k_register_t regnum, unsigned int value)
|
||||
{
|
||||
switch(regnum)
|
||||
{
|
||||
case M68K_REG_D0: REG_D[0] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_D1: REG_D[1] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_D2: REG_D[2] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_D3: REG_D[3] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_D4: REG_D[4] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_D5: REG_D[5] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_D6: REG_D[6] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_D7: REG_D[7] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A0: REG_A[0] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A1: REG_A[1] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A2: REG_A[2] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A3: REG_A[3] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A4: REG_A[4] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A5: REG_A[5] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A6: REG_A[6] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_A7: REG_A[7] = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_PC: m68ki_jump(MASK_OUT_ABOVE_32(value)); return;
|
||||
case M68K_REG_SR: m68ki_set_sr(value); return;
|
||||
case M68K_REG_SP: REG_SP = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_USP: if(FLAG_S)
|
||||
REG_USP = MASK_OUT_ABOVE_32(value);
|
||||
else
|
||||
REG_SP = MASK_OUT_ABOVE_32(value);
|
||||
return;
|
||||
case M68K_REG_ISP: if(FLAG_S && !FLAG_M)
|
||||
REG_SP = MASK_OUT_ABOVE_32(value);
|
||||
else
|
||||
REG_ISP = MASK_OUT_ABOVE_32(value);
|
||||
return;
|
||||
case M68K_REG_MSP: if(FLAG_S && FLAG_M)
|
||||
REG_SP = MASK_OUT_ABOVE_32(value);
|
||||
else
|
||||
REG_MSP = MASK_OUT_ABOVE_32(value);
|
||||
return;
|
||||
case M68K_REG_VBR: REG_VBR = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_SFC: REG_SFC = value & 7; return;
|
||||
case M68K_REG_DFC: REG_DFC = value & 7; return;
|
||||
case M68K_REG_CACR: REG_CACR = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_CAAR: REG_CAAR = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_PPC: REG_PPC = MASK_OUT_ABOVE_32(value); return;
|
||||
case M68K_REG_IR: REG_IR = MASK_OUT_ABOVE_16(value); return;
|
||||
case M68K_REG_CPU_TYPE: m68k_set_cpu_type(value); return;
|
||||
default: return;
|
||||
}
|
||||
}
|
||||
|
||||
/* Set the callbacks */
|
||||
void m68k_set_int_ack_callback(int (*callback)(int int_level))
|
||||
{
|
||||
CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback;
|
||||
}
|
||||
|
||||
void m68k_set_bkpt_ack_callback(void (*callback)(unsigned int data))
|
||||
{
|
||||
CALLBACK_BKPT_ACK = callback ? callback : default_bkpt_ack_callback;
|
||||
}
|
||||
|
||||
void m68k_set_reset_instr_callback(void (*callback)(void))
|
||||
{
|
||||
CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback;
|
||||
}
|
||||
|
||||
void m68k_set_pc_changed_callback(void (*callback)(unsigned int new_pc))
|
||||
{
|
||||
CALLBACK_PC_CHANGED = callback ? callback : default_pc_changed_callback;
|
||||
}
|
||||
|
||||
void m68k_set_fc_callback(void (*callback)(unsigned int new_fc))
|
||||
{
|
||||
CALLBACK_SET_FC = callback ? callback : default_set_fc_callback;
|
||||
}
|
||||
|
||||
void m68k_set_instr_hook_callback(void (*callback)(void))
|
||||
{
|
||||
CALLBACK_INSTR_HOOK = callback ? callback : default_instr_hook_callback;
|
||||
}
|
||||
|
||||
#include <stdio.h>
|
||||
/* Set the CPU type. */
|
||||
void m68k_set_cpu_type(unsigned int cpu_type)
|
||||
{
|
||||
switch(cpu_type)
|
||||
{
|
||||
case M68K_CPU_TYPE_68000:
|
||||
CPU_TYPE = CPU_TYPE_000;
|
||||
CPU_ADDRESS_MASK = 0x00ffffff;
|
||||
CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
|
||||
CYC_INSTRUCTION = m68ki_cycles[0];
|
||||
CYC_EXCEPTION = m68ki_exception_cycle_table[0];
|
||||
CYC_BCC_NOTAKE_B = -2;
|
||||
CYC_BCC_NOTAKE_W = 2;
|
||||
CYC_DBCC_F_NOEXP = -2;
|
||||
CYC_DBCC_F_EXP = 2;
|
||||
CYC_SCC_R_FALSE = 2;
|
||||
CYC_MOVEM_W = 2;
|
||||
CYC_MOVEM_L = 3;
|
||||
CYC_SHIFT = 1;
|
||||
CYC_RESET = 132;
|
||||
return;
|
||||
case M68K_CPU_TYPE_68010:
|
||||
CPU_TYPE = CPU_TYPE_010;
|
||||
CPU_ADDRESS_MASK = 0x00ffffff;
|
||||
CPU_SR_MASK = 0xa71f; /* T1 -- S -- -- I2 I1 I0 -- -- -- X N Z V C */
|
||||
CYC_INSTRUCTION = m68ki_cycles[1];
|
||||
CYC_EXCEPTION = m68ki_exception_cycle_table[1];
|
||||
CYC_BCC_NOTAKE_B = -4;
|
||||
CYC_BCC_NOTAKE_W = 0;
|
||||
CYC_DBCC_F_NOEXP = 0;
|
||||
CYC_DBCC_F_EXP = 6;
|
||||
CYC_SCC_R_FALSE = 0;
|
||||
CYC_MOVEM_W = 2;
|
||||
CYC_MOVEM_L = 3;
|
||||
CYC_SHIFT = 1;
|
||||
CYC_RESET = 130;
|
||||
return;
|
||||
case M68K_CPU_TYPE_68EC020:
|
||||
CPU_TYPE = CPU_TYPE_EC020;
|
||||
CPU_ADDRESS_MASK = 0x00ffffff;
|
||||
CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
|
||||
CYC_INSTRUCTION = m68ki_cycles[2];
|
||||
CYC_EXCEPTION = m68ki_exception_cycle_table[2];
|
||||
CYC_BCC_NOTAKE_B = -2;
|
||||
CYC_BCC_NOTAKE_W = 0;
|
||||
CYC_DBCC_F_NOEXP = 0;
|
||||
CYC_DBCC_F_EXP = 4;
|
||||
CYC_SCC_R_FALSE = 0;
|
||||
CYC_MOVEM_W = 2;
|
||||
CYC_MOVEM_L = 2;
|
||||
CYC_SHIFT = 0;
|
||||
CYC_RESET = 518;
|
||||
return;
|
||||
case M68K_CPU_TYPE_68020:
|
||||
CPU_TYPE = CPU_TYPE_020;
|
||||
CPU_ADDRESS_MASK = 0xffffffff;
|
||||
CPU_SR_MASK = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
|
||||
CYC_INSTRUCTION = m68ki_cycles[2];
|
||||
CYC_EXCEPTION = m68ki_exception_cycle_table[2];
|
||||
CYC_BCC_NOTAKE_B = -2;
|
||||
CYC_BCC_NOTAKE_W = 0;
|
||||
CYC_DBCC_F_NOEXP = 0;
|
||||
CYC_DBCC_F_EXP = 4;
|
||||
CYC_SCC_R_FALSE = 0;
|
||||
CYC_MOVEM_W = 2;
|
||||
CYC_MOVEM_L = 2;
|
||||
CYC_SHIFT = 0;
|
||||
CYC_RESET = 518;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* Execute some instructions until we use up num_cycles clock cycles */
|
||||
/* ASG: removed per-instruction interrupt checks */
|
||||
int m68k_execute(int num_cycles)
|
||||
{
|
||||
/* Make sure we're not stopped */
|
||||
if(!CPU_STOPPED)
|
||||
{
|
||||
/* Set our pool of clock cycles available */
|
||||
SET_CYCLES(num_cycles);
|
||||
m68ki_initial_cycles = num_cycles;
|
||||
|
||||
/* ASG: update cycles */
|
||||
USE_CYCLES(CPU_INT_CYCLES);
|
||||
CPU_INT_CYCLES = 0;
|
||||
|
||||
/* Return point if we had an address error */
|
||||
m68ki_set_address_error_trap(); /* auto-disable (see m68kcpu.h) */
|
||||
|
||||
/* Main loop. Keep going until we run out of clock cycles */
|
||||
do
|
||||
{
|
||||
/* Set tracing accodring to T1. (T0 is done inside instruction) */
|
||||
m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
|
||||
|
||||
/* Set the address space for reads */
|
||||
m68ki_use_data_space(); /* auto-disable (see m68kcpu.h) */
|
||||
|
||||
/* Call external hook to peek at CPU */
|
||||
m68ki_instr_hook(); /* auto-disable (see m68kcpu.h) */
|
||||
|
||||
/* Record previous program counter */
|
||||
REG_PPC = REG_PC;
|
||||
|
||||
/* Read an instruction and call its handler */
|
||||
REG_IR = m68ki_read_imm_16();
|
||||
m68ki_instruction_jump_table[REG_IR]();
|
||||
USE_CYCLES(CYC_INSTRUCTION[REG_IR]);
|
||||
|
||||
/* Trace m68k_exception, if necessary */
|
||||
m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */
|
||||
} while(GET_CYCLES() > 0);
|
||||
|
||||
/* set previous PC to current PC for the next entry into the loop */
|
||||
REG_PPC = REG_PC;
|
||||
|
||||
/* ASG: update cycles */
|
||||
USE_CYCLES(CPU_INT_CYCLES);
|
||||
CPU_INT_CYCLES = 0;
|
||||
|
||||
/* return how many clocks we used */
|
||||
return m68ki_initial_cycles - GET_CYCLES();
|
||||
}
|
||||
|
||||
/* We get here if the CPU is stopped or halted */
|
||||
SET_CYCLES(0);
|
||||
CPU_INT_CYCLES = 0;
|
||||
|
||||
return num_cycles;
|
||||
}
|
||||
|
||||
|
||||
int m68k_cycles_run(void)
|
||||
{
|
||||
return m68ki_initial_cycles - GET_CYCLES();
|
||||
}
|
||||
|
||||
int m68k_cycles_remaining(void)
|
||||
{
|
||||
return GET_CYCLES();
|
||||
}
|
||||
|
||||
/* Change the timeslice */
|
||||
void m68k_modify_timeslice(int cycles)
|
||||
{
|
||||
m68ki_initial_cycles += cycles;
|
||||
ADD_CYCLES(cycles);
|
||||
}
|
||||
|
||||
|
||||
void m68k_end_timeslice(void)
|
||||
{
|
||||
m68ki_initial_cycles = GET_CYCLES();
|
||||
SET_CYCLES(0);
|
||||
}
|
||||
|
||||
|
||||
/* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */
|
||||
/* KS: Modified so that IPL* bits match with mask positions in the SR
|
||||
* and cleaned out remenants of the interrupt controller.
|
||||
*/
|
||||
void m68k_set_irq(unsigned int int_level)
|
||||
{
|
||||
uint old_level = CPU_INT_LEVEL;
|
||||
CPU_INT_LEVEL = int_level << 8;
|
||||
|
||||
/* A transition from < 7 to 7 always interrupts (NMI) */
|
||||
/* Note: Level 7 can also level trigger like a normal IRQ */
|
||||
if(old_level != 0x0700 && CPU_INT_LEVEL == 0x0700)
|
||||
m68ki_exception_interrupt(7); /* Edge triggered level 7 (NMI) */
|
||||
else
|
||||
m68ki_check_interrupts(); /* Level triggered (IRQ) */
|
||||
}
|
||||
|
||||
|
||||
/* Pulse the RESET line on the CPU */
|
||||
void m68k_pulse_reset(void)
|
||||
{
|
||||
static uint emulation_initialized = 0;
|
||||
|
||||
/* The first call to this function initializes the opcode handler jump table */
|
||||
if(!emulation_initialized)
|
||||
{
|
||||
m68ki_build_opcode_table();
|
||||
m68k_set_int_ack_callback(NULL);
|
||||
m68k_set_bkpt_ack_callback(NULL);
|
||||
m68k_set_reset_instr_callback(NULL);
|
||||
m68k_set_pc_changed_callback(NULL);
|
||||
m68k_set_fc_callback(NULL);
|
||||
m68k_set_instr_hook_callback(NULL);
|
||||
|
||||
emulation_initialized = 1;
|
||||
}
|
||||
|
||||
|
||||
if(CPU_TYPE == 0) /* KW 990319 */
|
||||
m68k_set_cpu_type(M68K_CPU_TYPE_68000);
|
||||
|
||||
/* Clear all stop levels and eat up all remaining cycles */
|
||||
CPU_STOPPED = 0;
|
||||
SET_CYCLES(0);
|
||||
|
||||
/* Turn off tracing */
|
||||
FLAG_T1 = FLAG_T0 = 0;
|
||||
m68ki_clear_trace();
|
||||
/* Interrupt mask to level 7 */
|
||||
FLAG_INT_MASK = 0x0700;
|
||||
/* Reset VBR */
|
||||
REG_VBR = 0;
|
||||
/* Go to supervisor mode */
|
||||
m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR);
|
||||
|
||||
/* Invalidate the prefetch queue */
|
||||
#if M68K_EMULATE_PREFETCH
|
||||
/* Set to arbitrary number since our first fetch is from 0 */
|
||||
CPU_PREF_ADDR = 0x1000;
|
||||
#endif /* M68K_EMULATE_PREFETCH */
|
||||
|
||||
/* Read the initial stack pointer and program counter */
|
||||
m68ki_jump(0);
|
||||
REG_SP = m68ki_read_imm_32();
|
||||
REG_PC = m68ki_read_imm_32();
|
||||
m68ki_jump(REG_PC);
|
||||
}
|
||||
|
||||
/* Pulse the HALT line on the CPU */
|
||||
void m68k_pulse_halt(void)
|
||||
{
|
||||
CPU_STOPPED |= STOP_LEVEL_HALT;
|
||||
}
|
||||
|
||||
|
||||
/* Get and set the current CPU context */
|
||||
/* This is to allow for multiple CPUs */
|
||||
unsigned int m68k_context_size()
|
||||
{
|
||||
return sizeof(m68ki_cpu_core);
|
||||
}
|
||||
|
||||
unsigned int m68k_get_context(void* dst)
|
||||
{
|
||||
if(dst) *(m68ki_cpu_core*)dst = m68ki_cpu;
|
||||
return sizeof(m68ki_cpu_core);
|
||||
}
|
||||
|
||||
void m68k_set_context(void* src)
|
||||
{
|
||||
if(src) m68ki_cpu = *(m68ki_cpu_core*)src;
|
||||
}
|
||||
|
||||
void m68k_save_context( void (*save_value)(char*, unsigned int))
|
||||
{
|
||||
if(!save_value)
|
||||
return;
|
||||
|
||||
save_value("CPU_TYPE" , m68k_get_reg(NULL, M68K_REG_CPU_TYPE));
|
||||
save_value("D0" , REG_D[0]);
|
||||
save_value("D1" , REG_D[1]);
|
||||
save_value("D2" , REG_D[2]);
|
||||
save_value("D3" , REG_D[3]);
|
||||
save_value("D4" , REG_D[4]);
|
||||
save_value("D5" , REG_D[5]);
|
||||
save_value("D6" , REG_D[6]);
|
||||
save_value("D7" , REG_D[7]);
|
||||
save_value("A0" , REG_A[0]);
|
||||
save_value("A1" , REG_A[1]);
|
||||
save_value("A2" , REG_A[2]);
|
||||
save_value("A3" , REG_A[3]);
|
||||
save_value("A4" , REG_A[4]);
|
||||
save_value("A5" , REG_A[5]);
|
||||
save_value("A6" , REG_A[6]);
|
||||
save_value("A7" , REG_A[7]);
|
||||
save_value("PPC" , REG_PPC);
|
||||
save_value("PC" , REG_PC);
|
||||
save_value("USP" , REG_USP);
|
||||
save_value("ISP" , REG_ISP);
|
||||
save_value("MSP" , REG_MSP);
|
||||
save_value("VBR" , REG_VBR);
|
||||
save_value("SFC" , REG_SFC);
|
||||
save_value("DFC" , REG_DFC);
|
||||
save_value("CACR" , REG_CACR);
|
||||
save_value("CAAR" , REG_CAAR);
|
||||
save_value("SR" , m68ki_get_sr());
|
||||
save_value("INT_LEVEL" , CPU_INT_LEVEL);
|
||||
save_value("INT_CYCLES", CPU_INT_CYCLES);
|
||||
save_value("STOPPED" , (CPU_STOPPED & STOP_LEVEL_STOP) != 0);
|
||||
save_value("HALTED" , (CPU_STOPPED & STOP_LEVEL_HALT) != 0);
|
||||
save_value("PREF_ADDR" , CPU_PREF_ADDR);
|
||||
save_value("PREF_DATA" , CPU_PREF_DATA);
|
||||
}
|
||||
|
||||
void m68k_load_context(unsigned int (*load_value)(char*))
|
||||
{
|
||||
unsigned int temp;
|
||||
|
||||
m68k_set_cpu_type(load_value("CPU_TYPE"));
|
||||
REG_PPC = load_value("PPC");
|
||||
REG_PC = load_value("PC");
|
||||
m68ki_jump(REG_PC);
|
||||
CPU_INT_LEVEL = 0;
|
||||
m68ki_set_sr_noint(load_value("SR"));
|
||||
REG_D[0] = load_value("D0");
|
||||
REG_D[1] = load_value("D1");
|
||||
REG_D[2] = load_value("D2");
|
||||
REG_D[3] = load_value("D3");
|
||||
REG_D[4] = load_value("D4");
|
||||
REG_D[5] = load_value("D5");
|
||||
REG_D[6] = load_value("D6");
|
||||
REG_D[7] = load_value("D7");
|
||||
REG_A[0] = load_value("A0");
|
||||
REG_A[1] = load_value("A1");
|
||||
REG_A[2] = load_value("A2");
|
||||
REG_A[3] = load_value("A3");
|
||||
REG_A[4] = load_value("A4");
|
||||
REG_A[5] = load_value("A5");
|
||||
REG_A[6] = load_value("A6");
|
||||
REG_A[7] = load_value("A7");
|
||||
REG_USP = load_value("USP");
|
||||
REG_ISP = load_value("ISP");
|
||||
REG_MSP = load_value("MSP");
|
||||
REG_VBR = load_value("VBR");
|
||||
REG_SFC = load_value("SFC");
|
||||
REG_DFC = load_value("DFC");
|
||||
REG_CACR = load_value("CACR");
|
||||
REG_CAAR = load_value("CAAR");
|
||||
CPU_INT_LEVEL = load_value("INT_LEVEL");
|
||||
CPU_INT_CYCLES = load_value("INT_CYCLES");
|
||||
|
||||
CPU_STOPPED = 0;
|
||||
temp = load_value("STOPPED");
|
||||
if(temp) CPU_STOPPED |= STOP_LEVEL_STOP;
|
||||
temp = load_value("HALTED");
|
||||
if(temp) CPU_STOPPED |= STOP_LEVEL_HALT;
|
||||
|
||||
CPU_PREF_ADDR = load_value("PREF_ADDR");
|
||||
CPU_PREF_DATA = load_value("PREF_DATA");
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* ============================== END OF FILE ============================= */
|
||||
/* ======================================================================== */
|
||||
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,24 @@
|
|||
|
||||
#ifndef _MACROS_H_
|
||||
#define _MACROS_H_
|
||||
|
||||
|
||||
#define READ_BYTE(BASE, ADDR) (BASE)[(ADDR)^1]
|
||||
#define READ_WORD(BASE, ADDR) (((BASE)[(ADDR)+1]<<8) | \
|
||||
(BASE)[(ADDR)])
|
||||
#define READ_LONG(BASE, ADDR) (((BASE)[(ADDR)+1]<<24) | \
|
||||
((BASE)[(ADDR)+0]<<16) | \
|
||||
((BASE)[(ADDR)+3]<<8) | \
|
||||
(BASE)[(ADDR)+2])
|
||||
|
||||
#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[(ADDR)^1] = (VAL)&0xff
|
||||
#define WRITE_WORD(BASE, ADDR, VAL) (BASE)[(ADDR)+1] = ((VAL)>>8) & 0xff; \
|
||||
(BASE)[ADDR] = (VAL)&0xff
|
||||
#define WRITE_LONG(BASE, ADDR, VAL) (BASE)[(ADDR)+1] = ((VAL)>>24) & 0xff; \
|
||||
(BASE)[(ADDR)+0] = ((VAL)>>16)&0xff; \
|
||||
(BASE)[(ADDR)+3] = ((VAL)>>8)&0xff; \
|
||||
(BASE)[(ADDR)+2] = (VAL)&0xff
|
||||
|
||||
|
||||
#endif /* _MACROS_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,715 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
unsigned int m68k_read_bus_8(unsigned int address)
|
||||
{
|
||||
uint16 temp = m68k_read_bus_16(address);
|
||||
return ((address & 1) ? (temp & 0xFF) : (temp >> 8));
|
||||
}
|
||||
|
||||
unsigned int m68k_read_bus_16(unsigned int address)
|
||||
{
|
||||
uint16 temp = 0x4e71;
|
||||
|
||||
if(address >= 0xC00000)
|
||||
{
|
||||
return (temp);
|
||||
}
|
||||
else
|
||||
{
|
||||
return (temp & 0xFF00);
|
||||
}
|
||||
}
|
||||
|
||||
void m68k_unused_w(unsigned int address, unsigned int value)
|
||||
{
|
||||
//error("Unused %08X = %08X (%08X)\n", address, value, Turbo68KReadPC());
|
||||
}
|
||||
|
||||
void m68k_unused_8_w(unsigned int address, unsigned int value)
|
||||
{
|
||||
//error("Unused %08X = %02X (%08X)\n", address, value, Turbo68KReadPC());
|
||||
}
|
||||
|
||||
void m68k_unused_16_w(unsigned int address, unsigned int value)
|
||||
{
|
||||
//error("Unused %08X = %04X (%08X)\n", address, value, Turbo68KReadPC());
|
||||
}
|
||||
|
||||
/*
|
||||
Functions to handle memory accesses which cause the Genesis to halt
|
||||
either temporarily (press RESET button to restart) or unrecoverably
|
||||
(cycle power to restart).
|
||||
*/
|
||||
|
||||
void m68k_lockup_w_8(unsigned int address, unsigned int value)
|
||||
{
|
||||
error("Lockup %08X = %02X (%08X)\n", address, value, m68k_get_reg(NULL, M68K_REG_PC));
|
||||
gen_running = 0;
|
||||
m68k_end_timeslice();
|
||||
}
|
||||
|
||||
void m68k_lockup_w_16(unsigned int address, unsigned int value)
|
||||
{
|
||||
error("Lockup %08X = %04X (%08X)\n", address, value, m68k_get_reg(NULL, M68K_REG_PC));
|
||||
gen_running = 0;
|
||||
m68k_end_timeslice();
|
||||
}
|
||||
|
||||
unsigned int m68k_lockup_r_8(unsigned int address)
|
||||
{
|
||||
error("Lockup %08X.b (%08X)\n", address, m68k_get_reg(NULL, M68K_REG_PC));
|
||||
gen_running = 0;
|
||||
m68k_end_timeslice();
|
||||
return -1;
|
||||
}
|
||||
|
||||
unsigned int m68k_lockup_r_16(unsigned int address)
|
||||
{
|
||||
error("Lockup %08X.w (%08X)\n", address, m68k_get_reg(NULL, M68K_REG_PC));
|
||||
gen_running = 0;
|
||||
m68k_end_timeslice();
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* 68000 memory handlers */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
unsigned int m68k_read_memory_8(unsigned int address)
|
||||
{
|
||||
switch((address >> 21) & 7)
|
||||
{
|
||||
case 0: /* ROM */
|
||||
case 1:
|
||||
return readb_swap_rom(address);
|
||||
|
||||
case 7: /* RAM */
|
||||
return READ_BYTE(work_ram, address & 0xFFFF);
|
||||
|
||||
case 5: /* Z80 & I/O */
|
||||
if(address <= 0xA0FFFF)
|
||||
{
|
||||
if(zbusack == 1)
|
||||
{
|
||||
/* Z80 controls Z bus */
|
||||
return (m68k_read_bus_8(address));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Read data from Z bus */
|
||||
switch(address & 0x6000)
|
||||
{
|
||||
case 0x0000: /* RAM */
|
||||
case 0x2000:
|
||||
return (zram[(address & 0x1FFF)]);
|
||||
|
||||
case 0x4000: /* YM2612 */
|
||||
return (fm_read(address & 3));
|
||||
|
||||
case 0x6000: /* Unused */
|
||||
switch(address & 0xFF00)
|
||||
{
|
||||
case 0x7F00: /* VDP */
|
||||
m68k_lockup_r_8(address);
|
||||
|
||||
default: /* Unused */
|
||||
return (0xFF);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch((address >> 8) & 0xFF)
|
||||
{
|
||||
case 0x00: /* I/O CHIP */
|
||||
if(address <= 0xA1001F)
|
||||
{
|
||||
return (gen_io_r((address >> 1) & 0x0F));
|
||||
}
|
||||
else
|
||||
{
|
||||
return (m68k_read_bus_8(address));
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x10: /* MEMORY MODE */
|
||||
return (m68k_read_bus_8(address));
|
||||
|
||||
case 0x11: /* BUSACK */
|
||||
if((address & 1) == 0)
|
||||
{
|
||||
return (gen_busack_r() | (m68k_read_bus_8(address) & 0xFE));
|
||||
}
|
||||
else
|
||||
return (m68k_read_bus_8(address));
|
||||
|
||||
case 0x12: /* RESET */
|
||||
return (m68k_read_bus_8(address));
|
||||
|
||||
case 0x13: /* TIME */
|
||||
return (m68k_read_bus_8(address));
|
||||
|
||||
case 0x20: /* UNKNOWN */
|
||||
return (m68k_read_bus_8(address));
|
||||
|
||||
case 0x30: /* UNKNOWN */
|
||||
return (m68k_read_bus_8(address));
|
||||
|
||||
default: /* Unused */
|
||||
return (m68k_lockup_r_8(address));
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 6: /* VDP */
|
||||
if((address & 0xE700E0) == 0xC00000)
|
||||
{
|
||||
switch(address & 0x1F)
|
||||
{
|
||||
case 0x00: /* DATA */
|
||||
case 0x02:
|
||||
return (vdp_data_r() >> 8);
|
||||
|
||||
case 0x01: /* DATA */
|
||||
case 0x03:
|
||||
return (vdp_data_r() & 0xFF);
|
||||
|
||||
case 0x04: /* CTRL */
|
||||
case 0x06:
|
||||
return ((m68k_read_bus_8(address) & 0xFC) | (vdp_ctrl_r() >> 8));
|
||||
|
||||
case 0x05: /* CTRL */
|
||||
case 0x07:
|
||||
return (vdp_ctrl_r() & 0xFF);
|
||||
|
||||
case 0x08: /* HVC */
|
||||
case 0x0A:
|
||||
case 0x0C:
|
||||
case 0x0E:
|
||||
return (vdp_hvc_r() >> 8);
|
||||
|
||||
case 0x09: /* HVC */
|
||||
case 0x0B:
|
||||
case 0x0D:
|
||||
case 0x0F:
|
||||
return (vdp_hvc_r() & 0xFF);
|
||||
|
||||
case 0x10: /* PSG */
|
||||
case 0x11:
|
||||
case 0x12:
|
||||
case 0x13:
|
||||
case 0x14:
|
||||
case 0x15:
|
||||
case 0x16:
|
||||
case 0x17:
|
||||
return (m68k_lockup_r_8(address));
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x19:
|
||||
case 0x1A:
|
||||
case 0x1B:
|
||||
case 0x1C:
|
||||
case 0x1D:
|
||||
case 0x1E:
|
||||
case 0x1F:
|
||||
return (m68k_read_bus_8(address));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Unused */
|
||||
return (m68k_lockup_r_8(address));
|
||||
}
|
||||
break;
|
||||
|
||||
case 2: /* Unused */
|
||||
case 3:
|
||||
return (m68k_read_bus_8(address));
|
||||
|
||||
case 4: /* Unused */
|
||||
return (m68k_lockup_r_8(address));
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
unsigned int m68k_read_memory_16(unsigned int address)
|
||||
{
|
||||
switch((address >> 21) & 7)
|
||||
{
|
||||
|
||||
case 0: /* ROM */
|
||||
case 1:
|
||||
return readw_swap_rom(address);
|
||||
|
||||
case 7: /* RAM */
|
||||
return READ_WORD(work_ram, address & 0xFFFF);
|
||||
|
||||
case 5: /* Z80 & I/O */
|
||||
if(address <= 0xA0FFFF)
|
||||
{
|
||||
if(zbusack == 1)
|
||||
{
|
||||
return (m68k_read_bus_16(address));
|
||||
}
|
||||
else
|
||||
{
|
||||
uint8 temp;
|
||||
|
||||
switch(address & 0x6000)
|
||||
{
|
||||
case 0x0000: /* RAM */
|
||||
case 0x2000:
|
||||
temp = zram[address & 0x1FFF];
|
||||
return (temp << 8 | temp);
|
||||
|
||||
case 0x4000: /* YM2612 */
|
||||
temp = fm_read(address & 3);
|
||||
return (temp << 8 | temp);
|
||||
|
||||
case 0x6000:
|
||||
switch(address & 0xFF00)
|
||||
{
|
||||
case 0x7F00: /* VDP */
|
||||
m68k_lockup_r_16(address);
|
||||
|
||||
default: /* Unused */
|
||||
return (0xFFFF);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(address <= 0xA1001F)
|
||||
{
|
||||
uint8 temp = gen_io_r((address >> 1) & 0x0F);
|
||||
return (temp << 8 | temp);
|
||||
}
|
||||
else
|
||||
{
|
||||
switch((address >> 8) & 0xFF)
|
||||
{
|
||||
case 0x10: /* MEMORY MODE */
|
||||
return (m68k_read_bus_16(address));
|
||||
|
||||
case 0x11: /* BUSACK */
|
||||
return ((m68k_read_bus_16(address) & 0xFEFF) | (gen_busack_r() << 8));
|
||||
|
||||
case 0x12: /* RESET */
|
||||
return (m68k_read_bus_16(address));
|
||||
|
||||
case 0x13: /* TIME */
|
||||
return (m68k_read_bus_16(address));
|
||||
|
||||
case 0x20: /* UNKNOWN */
|
||||
return (m68k_read_bus_16(address));
|
||||
|
||||
case 0x30: /* UNKNOWN */
|
||||
return (m68k_read_bus_16(address));
|
||||
|
||||
default: /* Unused */
|
||||
return (m68k_lockup_r_16(address));
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 6:
|
||||
if((address & 0xE700E0) == 0xC00000)
|
||||
{
|
||||
switch(address & 0x1F)
|
||||
{
|
||||
case 0x00: /* DATA */
|
||||
case 0x02:
|
||||
return (vdp_data_r());
|
||||
|
||||
case 0x04: /* CTRL */
|
||||
case 0x06:
|
||||
return (vdp_ctrl_r() | (m68k_read_bus_16(address) & 0xFC00));
|
||||
|
||||
case 0x08: /* HVC */
|
||||
case 0x0A:
|
||||
case 0x0C:
|
||||
case 0x0E:
|
||||
return (vdp_hvc_r());
|
||||
|
||||
case 0x10: /* PSG */
|
||||
case 0x12:
|
||||
case 0x14:
|
||||
case 0x16:
|
||||
return (m68k_lockup_r_16(address));
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x1A:
|
||||
case 0x1C:
|
||||
case 0x1E:
|
||||
return (m68k_read_bus_16(address));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
return (m68k_lockup_r_16(address));
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
case 3:
|
||||
return (m68k_read_bus_16(address));
|
||||
|
||||
case 4:
|
||||
return (m68k_lockup_r_16(address));
|
||||
}
|
||||
|
||||
return (0xA5A5);
|
||||
}
|
||||
|
||||
|
||||
unsigned int m68k_read_memory_32(unsigned int address)
|
||||
{
|
||||
/* Split into 2 reads */
|
||||
return (m68k_read_memory_16(address + 0) << 16 | m68k_read_memory_16(address + 2));
|
||||
}
|
||||
|
||||
|
||||
void m68k_write_memory_8(unsigned int address, unsigned int value)
|
||||
{
|
||||
switch((address >> 21) & 7)
|
||||
{
|
||||
case 7:
|
||||
WRITE_BYTE(work_ram, address & 0xFFFF, value);
|
||||
return;
|
||||
|
||||
case 6:
|
||||
if((address & 0xE700E0) == 0xC00000)
|
||||
{
|
||||
switch(address & 0x1F)
|
||||
{
|
||||
case 0x00: /* DATA */
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x03:
|
||||
vdp_data_w(value << 8 | value);
|
||||
return;
|
||||
|
||||
case 0x04: /* CTRL */
|
||||
case 0x05:
|
||||
case 0x06:
|
||||
case 0x07:
|
||||
vdp_ctrl_w(value << 8 | value);
|
||||
return;
|
||||
|
||||
case 0x08: /* HVC */
|
||||
case 0x09:
|
||||
case 0x0A:
|
||||
case 0x0B:
|
||||
case 0x0C:
|
||||
case 0x0D:
|
||||
case 0x0E:
|
||||
case 0x0F:
|
||||
m68k_lockup_w_8(address, value);
|
||||
return;
|
||||
|
||||
case 0x10: /* PSG */
|
||||
case 0x12:
|
||||
case 0x14:
|
||||
case 0x16:
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
|
||||
case 0x11: /* PSG */
|
||||
case 0x13:
|
||||
case 0x15:
|
||||
case 0x17:
|
||||
psg_write(value);
|
||||
return;
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x19:
|
||||
case 0x1A:
|
||||
case 0x1B:
|
||||
case 0x1C:
|
||||
case 0x1D:
|
||||
case 0x1E:
|
||||
case 0x1F:
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
m68k_lockup_w_8(address, value);
|
||||
return;
|
||||
}
|
||||
|
||||
case 5:
|
||||
if(address <= 0xA0FFFF)
|
||||
{
|
||||
if(zbusack == 1)
|
||||
{
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
switch(address & 0x6000)
|
||||
{
|
||||
case 0x0000:
|
||||
case 0x2000:
|
||||
zram[(address & 0x1FFF)] = value;
|
||||
return;
|
||||
|
||||
case 0x4000:
|
||||
fm_write(address & 3, value);
|
||||
return;
|
||||
|
||||
case 0x6000:
|
||||
switch(address & 0xFF00)
|
||||
{
|
||||
case 0x6000: /* BANK */
|
||||
gen_bank_w(value & 1);
|
||||
return;
|
||||
|
||||
case 0x7F00: /* VDP */
|
||||
m68k_lockup_w_8(address, value);
|
||||
return;
|
||||
|
||||
default: /* Unused */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(address <= 0xA1001F)
|
||||
{
|
||||
/* I/O chip only gets /LWR */
|
||||
if(address & 1)
|
||||
gen_io_w((address >> 1) & 0x0F, value);
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Bus control chip registers */
|
||||
switch((address >> 8) & 0xFF)
|
||||
{
|
||||
case 0x10: /* MEMORY MODE */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
|
||||
case 0x11: /* BUSREQ */
|
||||
if((address & 1) == 0)
|
||||
{
|
||||
gen_busreq_w(value & 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
m68k_unused_8_w(address, value);
|
||||
}
|
||||
return;
|
||||
|
||||
case 0x12: /* RESET */
|
||||
gen_reset_w(value & 1);
|
||||
return;
|
||||
|
||||
case 0x13: /* TIME */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
|
||||
case 0x20: /* UNKNOWN */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
|
||||
case 0x30: /* UNKNOWN */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
|
||||
default: /* Unused */
|
||||
m68k_lockup_w_8(address, value);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case 0: /* ROM */
|
||||
case 1: /* ROM */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
|
||||
case 2: /* Unused */
|
||||
case 3:
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
|
||||
case 4: /* Unused */
|
||||
m68k_lockup_w_8(address, value);
|
||||
return;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void m68k_write_memory_16(unsigned int address, unsigned int value)
|
||||
{
|
||||
switch((address >> 21) & 7)
|
||||
{
|
||||
case 0: /* ROM */
|
||||
case 1: /* ROM */
|
||||
m68k_unused_16_w(address, value);
|
||||
return;
|
||||
|
||||
case 2: /* Unused */
|
||||
case 3:
|
||||
m68k_unused_16_w(address, value);
|
||||
return;
|
||||
|
||||
case 4: /* Unused */
|
||||
m68k_lockup_w_16(address, value);
|
||||
return;
|
||||
|
||||
case 5: /* Z80 area, I/O chip, miscellaneous. */
|
||||
if(address <= 0xA0FFFF)
|
||||
{
|
||||
/* Writes are ignored when the Z80 hogs the Z-bus */
|
||||
if(zbusack == 1) {
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Write into Z80 address space */
|
||||
switch(address & 0x6000)
|
||||
{
|
||||
case 0x0000: /* Work RAM */
|
||||
case 0x2000: /* Work RAM */
|
||||
zram[(address & 0x1FFF)] = (value >> 8) & 0xFF;
|
||||
return;
|
||||
|
||||
case 0x4000: /* YM2612 */
|
||||
fm_write(address & 3, (value >> 8) & 0xFF);
|
||||
return;
|
||||
|
||||
case 0x6000: /* Bank register and VDP */
|
||||
switch(address & 0x7F00)
|
||||
{
|
||||
case 0x6000: /* Bank register */
|
||||
gen_bank_w((value >> 8) & 1);
|
||||
return;
|
||||
|
||||
case 0x7F00: /* VDP registers */
|
||||
m68k_lockup_w_16(address, value);
|
||||
return;
|
||||
|
||||
default: /* Unused */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* I/O chip */
|
||||
if(address <= 0xA1001F)
|
||||
{
|
||||
gen_io_w((address >> 1) & 0x0F, value & 0x00FF);
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Bus control chip registers */
|
||||
switch((address >> 8) & 0xFF)
|
||||
{
|
||||
case 0x10: /* MEMORY MODE */
|
||||
m68k_unused_16_w(address, value);
|
||||
return;
|
||||
|
||||
case 0x11: /* BUSREQ */
|
||||
gen_busreq_w((value >> 8) & 1);
|
||||
return;
|
||||
|
||||
case 0x12: /* RESET */
|
||||
gen_reset_w((value >> 8) & 1);
|
||||
return;
|
||||
|
||||
case 0x13: /* TIME */
|
||||
m68k_unused_16_w(address, value);
|
||||
return;
|
||||
|
||||
case 0x20: /* UNKNOWN */
|
||||
m68k_unused_16_w(address, value);
|
||||
return;
|
||||
|
||||
case 0x30: /* UNKNOWN */
|
||||
m68k_unused_16_w(address, value);
|
||||
return;
|
||||
|
||||
default: /* Unused */
|
||||
m68k_lockup_w_16(address, value);
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 6: /* VDP */
|
||||
if((address & 0xE700E0) == 0xC00000)
|
||||
{
|
||||
switch(address & 0x1C)
|
||||
{
|
||||
case 0x00: /* DATA */
|
||||
vdp_data_w(value);
|
||||
return;
|
||||
|
||||
case 0x04: /* CTRL */
|
||||
vdp_ctrl_w(value);
|
||||
return;
|
||||
|
||||
case 0x08: /* HV counter */
|
||||
case 0x0C: /* HV counter */
|
||||
m68k_lockup_w_16(address, value);
|
||||
return;
|
||||
|
||||
case 0x10: /* PSG */
|
||||
case 0x14: /* PSG */
|
||||
psg_write(value & 0xFF);
|
||||
return;
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x1C: /* Unused */
|
||||
m68k_unused_8_w(address, value);
|
||||
return;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Invalid address */
|
||||
m68k_lockup_w_16(address, value);
|
||||
}
|
||||
break;
|
||||
|
||||
case 7: /* Work RAM */
|
||||
WRITE_WORD(work_ram, address & 0xFFFF, value);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void m68k_write_memory_32(unsigned int address, unsigned int value)
|
||||
{
|
||||
/* Split into 2 writes */
|
||||
m68k_write_memory_16(address, (value >> 16) & 0xFFFF);
|
||||
m68k_write_memory_16(address + 2, value & 0xFFFF);
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
|
||||
#ifndef _MEM68K_H_
|
||||
#define _MEM68K_H_
|
||||
|
||||
/* Function prototypes */
|
||||
unsigned int m68k_read_bus_8(unsigned int address);
|
||||
unsigned int m68k_read_bus_16(unsigned int address);
|
||||
void m68k_unused_w(unsigned int address, unsigned int value);
|
||||
|
||||
void m68k_lockup_w_8(unsigned int address, unsigned int value);
|
||||
void m68k_lockup_w_16(unsigned int address, unsigned int value);
|
||||
unsigned int m68k_lockup_r_8(unsigned int address);
|
||||
unsigned int m68k_lockup_r_16(unsigned int address);
|
||||
|
||||
#endif /* _MEM68K_H_ */
|
||||
|
|
@ -0,0 +1,327 @@
|
|||
/*
|
||||
membnk.c --
|
||||
Memory handlers Z80 access to the banked V-bus address space.
|
||||
*/
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
|
||||
void z80_write_banked_memory(unsigned int address, unsigned int data)
|
||||
{
|
||||
switch((address >> 21) & 7)
|
||||
{
|
||||
case 0: /* Cartridge ROM */
|
||||
case 1:
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 2: /* Unused */
|
||||
case 3:
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 4: /* Unused (lockup) */
|
||||
z80bank_lockup_w(address, data);
|
||||
return;
|
||||
|
||||
case 5: /* Z80, I/O chip, etc. */
|
||||
if(address <= 0xA0FFFF)
|
||||
{
|
||||
z80bank_lockup_w(address, data);
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
switch((address >> 8) & 0xFF)
|
||||
{
|
||||
case 0x00: /* I/O chip */
|
||||
if(address <= 0xA1001F)
|
||||
gen_io_w((address >> 1) & 0x0F, data);
|
||||
else
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x10: /* DRAM refresh */
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x11: /* /BUSREQ */
|
||||
if(address & 1)
|
||||
z80bank_unused_w(address, data);
|
||||
else
|
||||
gen_busreq_w(data & 1);
|
||||
return;
|
||||
|
||||
case 0x12: /* /RESET (w) */
|
||||
if(address & 1)
|
||||
z80bank_unused_w(address, data);
|
||||
else
|
||||
gen_reset_w(data & 1);
|
||||
return;
|
||||
|
||||
case 0x13: /* /TIME region */
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x20: /* ? */
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x30: /* ? */
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
default: /* Invalid */
|
||||
z80bank_lockup_w(address, data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
return;
|
||||
|
||||
case 6: /* VDP */
|
||||
z80bank_vdp_w(address, data);
|
||||
return;
|
||||
|
||||
case 7: /* Work RAM */
|
||||
WRITE_BYTE(work_ram, address & 0xFFFF, data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int z80_read_banked_memory(unsigned int address)
|
||||
{
|
||||
switch((address >> 21) & 7)
|
||||
{
|
||||
case 0: /* Cartridge ROM */
|
||||
case 1:
|
||||
return readb_swap_rom(address);
|
||||
|
||||
case 2: /* Unused */
|
||||
case 3:
|
||||
return z80bank_unused_r(address);
|
||||
|
||||
case 4: /* Unused (lockup) */
|
||||
return z80bank_lockup_r(address);
|
||||
|
||||
case 5: /* Z80, I/O chip, etc.*/
|
||||
if(address <= 0xA0FFFF)
|
||||
{
|
||||
return z80bank_lockup_r(address);
|
||||
}
|
||||
else
|
||||
{
|
||||
switch((address >> 8) & 0xFF)
|
||||
{
|
||||
case 0x00: /* I/O chip */
|
||||
if(address <= 0xA1001F)
|
||||
return gen_io_r((address >> 1) & 0x0F);
|
||||
else
|
||||
return z80bank_unused_r(address);
|
||||
break;
|
||||
|
||||
case 0x10: /* Unused */
|
||||
return z80bank_unused_r(address);
|
||||
|
||||
case 0x11: /* /BUSACK from Z80 */
|
||||
/* The Z80 can't read this bit (it would be halted
|
||||
when the bit was zero) so we always return '1'. */
|
||||
return 0xFF;
|
||||
|
||||
case 0x12: /* Unused */
|
||||
return z80bank_unused_r(address);
|
||||
|
||||
case 0x13: /* /TIME region */
|
||||
return z80bank_unused_r(address);
|
||||
|
||||
case 0x20: /* Unused */
|
||||
return z80bank_unused_r(address);
|
||||
|
||||
case 0x30: /* Unused */
|
||||
return z80bank_unused_r(address);
|
||||
|
||||
default: /* Lockup */
|
||||
return z80bank_lockup_r(address);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 6: /* VDP */
|
||||
return z80bank_vdp_r(address);
|
||||
|
||||
case 7: /* Work RAM - can't be read on some Genesis models (!) */
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
return (-1);
|
||||
}
|
||||
|
||||
|
||||
void z80bank_vdp_w(int address, int data)
|
||||
{
|
||||
// if((address & 0xE700E0) == 0xC00000)
|
||||
if((address & 0xE700E0) == 0xC0000)
|
||||
{
|
||||
switch(address & 0x1F)
|
||||
{
|
||||
case 0x00: /* Data port */
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x03:
|
||||
vdp_data_w(data << 8 | data);
|
||||
return;
|
||||
|
||||
case 0x04: /* Control port */
|
||||
case 0x05:
|
||||
case 0x06:
|
||||
case 0x07:
|
||||
vdp_ctrl_w(data << 8 | data);
|
||||
return;
|
||||
|
||||
case 0x08: /* Lockup (HVC) */
|
||||
case 0x09:
|
||||
case 0x0A:
|
||||
case 0x0B:
|
||||
case 0x0C:
|
||||
case 0x0D:
|
||||
case 0x0E:
|
||||
case 0x0F:
|
||||
z80bank_lockup_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x10: /* Unused */
|
||||
case 0x12:
|
||||
case 0x14:
|
||||
case 0x16:
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x11: /* PSG */
|
||||
case 0x13:
|
||||
case 0x15:
|
||||
case 0x17:
|
||||
psg_write(data);
|
||||
return;
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x19:
|
||||
case 0x1A:
|
||||
case 0x1B:
|
||||
z80bank_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x1C: /* Test register */
|
||||
case 0x1D:
|
||||
case 0x1E:
|
||||
case 0x1F:
|
||||
vdp_test_w(data << 8 | data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Invalid VDP address */
|
||||
z80bank_lockup_w(address, data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int z80bank_vdp_r(int address)
|
||||
{
|
||||
// if((address & 0xE700E0) == 0xC00000)
|
||||
if((address & 0xE700E0) == 0xC0000)
|
||||
{
|
||||
switch(address & 0x1F)
|
||||
{
|
||||
case 0x00: /* Data */
|
||||
case 0x02:
|
||||
return (vdp_data_r() >> 8) & 0xFF;
|
||||
|
||||
case 0x01: /* Data */
|
||||
case 0x03:
|
||||
return vdp_data_r() & 0xFF;
|
||||
|
||||
case 0x04: /* Control */
|
||||
case 0x06:
|
||||
return (0xFC | (vdp_ctrl_r() >> 8)) & 0xFF;
|
||||
|
||||
case 0x05: /* Control */
|
||||
case 0x07:
|
||||
return vdp_ctrl_r() & 0xFF;
|
||||
|
||||
case 0x08: /* HVC */
|
||||
case 0x0A:
|
||||
case 0x0C:
|
||||
case 0x0E:
|
||||
return (vdp_hvc_r() >> 8) & 0xFF;
|
||||
|
||||
case 0x09: /* HVC */
|
||||
case 0x0B:
|
||||
case 0x0D:
|
||||
case 0x0F:
|
||||
return vdp_hvc_r() & 0xFF;
|
||||
|
||||
case 0x10: /* Lockup */
|
||||
case 0x11:
|
||||
case 0x12:
|
||||
case 0x13:
|
||||
case 0x14:
|
||||
case 0x15:
|
||||
case 0x16:
|
||||
case 0x17:
|
||||
return z80bank_lockup_r(address);
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x19:
|
||||
case 0x1A:
|
||||
case 0x1B:
|
||||
case 0x1C:
|
||||
case 0x1D:
|
||||
case 0x1E:
|
||||
case 0x1F:
|
||||
return (z80bank_unused_r(address) | 0xFF);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Invalid VDP address */
|
||||
return z80bank_lockup_r(address);
|
||||
}
|
||||
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
Handlers for access to unused addresses and those which make the
|
||||
machine lock up.
|
||||
*/
|
||||
void z80bank_unused_w(int address, int data)
|
||||
{
|
||||
error("Z80 bank unused write %06X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
|
||||
}
|
||||
|
||||
int z80bank_unused_r(int address)
|
||||
{
|
||||
error("Z80 bank unused read %06X (%04X)\n", address, z80_get_reg(Z80_PC));
|
||||
return (address & 1) ? 0x00 : 0xFF;
|
||||
}
|
||||
|
||||
void z80bank_lockup_w(int address, int data)
|
||||
{
|
||||
error("Z80 bank lockup write %06X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
|
||||
gen_running = 0;
|
||||
z80_end_timeslice();
|
||||
}
|
||||
|
||||
int z80bank_lockup_r(int address)
|
||||
{
|
||||
error("Z80 bank lockup read %06X (%04X)\n", address, z80_get_reg(Z80_PC));
|
||||
gen_running = 0;
|
||||
z80_end_timeslice();
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
|
||||
#ifndef _MEMBNK_H_
|
||||
#define _MEMBNK_H_
|
||||
|
||||
/* Function prototypes */
|
||||
void z80_write_banked_memory(unsigned int address, unsigned int data);
|
||||
int z80_read_banked_memory(unsigned int address);
|
||||
|
||||
void z80bank_vdp_w(int address, int data);
|
||||
int z80bank_vdp_r(int address);
|
||||
|
||||
void z80bank_unused_w(int address, int data);
|
||||
int z80bank_unused_r(int address);
|
||||
void z80bank_lockup_w(int address, int data);
|
||||
int z80bank_lockup_r(int address);
|
||||
|
||||
#endif /* _MEMBNK_H_ */
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
#include "shared.h"
|
||||
|
||||
|
||||
//uint8 lwork_ram[WORK_RAM_SIZE]; /* 68K work RAM */
|
||||
//uint8 lzram[Z_RAM_SIZE]; /* Z80 work RAM */
|
||||
|
||||
//uint8 lvram[VRAM_SIZE];
|
||||
uint8 lbg_name_dirty[BGNAMEDIRTY_SIZE];
|
||||
uint16 lbg_name_list[BGNAME_SIZE];
|
||||
//uint8 lbg_pattern_cache[BGPATTERN_CACH_SIZE];
|
||||
|
||||
uint8 * vram;// = &lvram[0];
|
||||
uint8 * bg_name_dirty = &lbg_name_dirty[0];
|
||||
uint16 * bg_name_list = &lbg_name_list[0];
|
||||
uint8 * bg_pattern_cache; // = &lbg_pattern_cache[0];
|
||||
|
||||
|
||||
uint8 * work_ram; // = &lwork_ram[0];
|
||||
uint8 * zram; // = &lzram[0];
|
||||
|
||||
|
||||
|
||||
void mem_init(void) {
|
||||
//bg_pattern_cache = emu_Malloc(BGPATTERN_CACH_SIZE+1)&0xFFFFFFFE;
|
||||
//vram = emu_Malloc(VRAM_SIZE+1)&0xFFFFFFFE;
|
||||
//work_ram = emu_Malloc(WORK_RAM_SIZE+1)&0xFFFFFFFE;
|
||||
//zram = emu_Malloc(Z_RAM_SIZE+1)&0xFFFFFFFE;
|
||||
}
|
||||
|
||||
|
||||
int mem_test(void) {
|
||||
// for (int i=0x40000;i<OBJ_CACHE_SIZE;i++) {
|
||||
// if (obj_pattern_cache[i] != 0) return 0;;
|
||||
// }
|
||||
return 1;
|
||||
}
|
||||
|
||||
void memcpy_rom(int dst, int src, int size) {
|
||||
while (size > 0) {
|
||||
write_rom(dst++, read_rom(src++));
|
||||
size--;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
#ifndef _MEMORY_H_
|
||||
#define _MEMORY_H_
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
#define WORK_RAM_SIZE 0x10000
|
||||
#define Z_RAM_SIZE 0x2000
|
||||
|
||||
#define VRAM_SIZE 0x10000
|
||||
#define BGNAMEDIRTY_SIZE 0x800
|
||||
#define BGNAME_SIZE 0x800
|
||||
#define BGPATTERN_CACH_SIZE 0x40000
|
||||
|
||||
|
||||
//extern uint8 * cart_rom;
|
||||
extern uint8 * work_ram; /* 68K work RAM */
|
||||
extern uint8 * zram; /* Z80 work RAM */
|
||||
|
||||
extern uint8 * vram;
|
||||
extern uint8 * bg_name_dirty;
|
||||
extern uint16 * bg_name_list;
|
||||
extern uint8 * bg_pattern_cache;
|
||||
|
||||
|
||||
extern void mem_init(void);
|
||||
extern int mem_test(void);
|
||||
extern uint8 rom_version(void);
|
||||
extern uint8 readb_rom(int address);
|
||||
extern uint8 readb_swap_rom(int address);
|
||||
extern uint16 readw_swap_rom(int address);
|
||||
extern void write_rom(int address, uint8 val);
|
||||
|
||||
extern void memcpy_rom(int dst, int src, int size);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
memvdp.c --
|
||||
Memory handlers for when the VDP reads the V-bus during DMA.
|
||||
*/
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
unsigned int vdp_dma_r(unsigned int address)
|
||||
{
|
||||
switch((address >> 21) & 7)
|
||||
{
|
||||
case 0: /* Cartridge ROM */
|
||||
case 1:
|
||||
return readw_swap_rom(address);
|
||||
|
||||
case 2: /* Unused */
|
||||
case 3:
|
||||
return 0xFF00;
|
||||
|
||||
case 4: /* Work RAM */
|
||||
case 6:
|
||||
case 7:
|
||||
return READ_WORD(work_ram, address & 0xFFFF);
|
||||
|
||||
case 5: /* Z80 area and I/O chip */
|
||||
|
||||
/* Z80 area always returns $FFFF */
|
||||
if(address <= 0xA0FFFF)
|
||||
{
|
||||
/* Return $FFFF only when the Z80 isn't hogging the Z-bus.
|
||||
(e.g. Z80 isn't reset and 68000 has the bus) */
|
||||
return (zbusack == 0)
|
||||
? 0xFFFF
|
||||
: READ_WORD(work_ram, address & 0xFFFF);
|
||||
}
|
||||
else
|
||||
|
||||
/* The I/O chip and work RAM try to drive the data bus which
|
||||
results in both values being combined in random ways when read.
|
||||
We return the I/O chip values which seem to have precedence, */
|
||||
if(address <= 0xA1001F)
|
||||
{
|
||||
uint8 temp = gen_io_r((address >> 1) & 0x0F);
|
||||
return (temp << 8 | temp);
|
||||
}
|
||||
else
|
||||
|
||||
/* All remaining locations access work RAM */
|
||||
return READ_WORD(work_ram, address & 0xFFFF);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
|
||||
#ifndef _MEMVDP_H_
|
||||
#define _MEMVDP_H_
|
||||
|
||||
/* Function prototypes */
|
||||
unsigned int vdp_dma_r(unsigned int address);
|
||||
|
||||
#endif /* _MEMVDP_H_ */
|
||||
|
|
@ -0,0 +1,250 @@
|
|||
/*
|
||||
memz80.c --
|
||||
Memory handlers for Z80 memory and port access, and the Z80 to
|
||||
VDP interface.
|
||||
*/
|
||||
|
||||
#define LOG_PORT 0 /* 1= Log Z80 I/O port accesses */
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
|
||||
unsigned int cpu_readmem16(unsigned int address)
|
||||
{
|
||||
switch((address >> 13) & 7)
|
||||
{
|
||||
case 0: /* Work RAM */
|
||||
case 1:
|
||||
return zram[address & 0x1FFF];
|
||||
|
||||
case 2: /* YM2612 */
|
||||
return fm_read(address & 3);
|
||||
|
||||
case 3: /* VDP */
|
||||
if((address & 0xFF00) == 0x7F00)
|
||||
return z80_vdp_r(address);
|
||||
return 0xFF;
|
||||
|
||||
default: /* V-bus bank */
|
||||
return z80_read_banked_memory(zbank | (address & 0x7FFF));
|
||||
}
|
||||
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
|
||||
void cpu_writemem16(unsigned int address, unsigned int data)
|
||||
{
|
||||
switch((address >> 13) & 7)
|
||||
{
|
||||
case 0: /* Work RAM */
|
||||
case 1:
|
||||
zram[address & 0x1FFF] = data;
|
||||
return;
|
||||
|
||||
case 2: /* YM2612 */
|
||||
fm_write(address & 3, data);
|
||||
return;
|
||||
|
||||
case 3: /* Bank register and VDP */
|
||||
switch(address & 0xFF00)
|
||||
{
|
||||
case 0x6000:
|
||||
gen_bank_w(data & 1);
|
||||
return;
|
||||
|
||||
case 0x7F00:
|
||||
z80_vdp_w(address, data);
|
||||
return;
|
||||
|
||||
default:
|
||||
z80_unused_w(address, data);
|
||||
return;
|
||||
}
|
||||
return;
|
||||
|
||||
default: /* V-bus bank */
|
||||
z80_write_banked_memory(zbank | (address & 0x7FFF), data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int z80_vdp_r(int address)
|
||||
{
|
||||
switch(address & 0xFF)
|
||||
{
|
||||
case 0x00: /* VDP data port */
|
||||
case 0x02:
|
||||
return (vdp_data_r() >> 8) & 0xFF;
|
||||
|
||||
case 0x01: /* VDP data port */
|
||||
case 0x03:
|
||||
return (vdp_data_r() & 0xFF);
|
||||
|
||||
case 0x04: /* VDP control port */
|
||||
case 0x06:
|
||||
return (0xFF | ((vdp_ctrl_r() >> 8) & 3));
|
||||
|
||||
case 0x05: /* VDP control port */
|
||||
case 0x07:
|
||||
return (vdp_ctrl_r() & 0xFF);
|
||||
|
||||
case 0x08: /* HV counter */
|
||||
case 0x0A:
|
||||
case 0x0C:
|
||||
case 0x0E:
|
||||
return (vdp_hvc_r() >> 8) & 0xFF;
|
||||
|
||||
case 0x09: /* HV counter */
|
||||
case 0x0B:
|
||||
case 0x0D:
|
||||
case 0x0F:
|
||||
return (vdp_hvc_r() & 0xFF);
|
||||
|
||||
case 0x10: /* Unused (PSG) */
|
||||
case 0x11:
|
||||
case 0x12:
|
||||
case 0x13:
|
||||
case 0x14:
|
||||
case 0x15:
|
||||
case 0x16:
|
||||
case 0x17:
|
||||
return z80_lockup_r(address);
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x19:
|
||||
case 0x1A:
|
||||
case 0x1B:
|
||||
return z80_unused_r(address);
|
||||
|
||||
case 0x1C: /* Unused (test register) */
|
||||
case 0x1D:
|
||||
case 0x1E:
|
||||
case 0x1F:
|
||||
return z80_unused_r(address);
|
||||
|
||||
default: /* Invalid VDP addresses */
|
||||
return z80_lockup_r(address);
|
||||
}
|
||||
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
|
||||
void z80_vdp_w(int address, int data)
|
||||
{
|
||||
switch(address & 0xFF)
|
||||
{
|
||||
case 0x00: /* VDP data port */
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x03:
|
||||
vdp_data_w(data << 8 | data);
|
||||
return;
|
||||
|
||||
case 0x04: /* VDP control port */
|
||||
case 0x05:
|
||||
case 0x06:
|
||||
case 0x07:
|
||||
vdp_ctrl_w(data << 8 | data);
|
||||
return;
|
||||
|
||||
case 0x08: /* Unused (HV counter) */
|
||||
case 0x09:
|
||||
case 0x0A:
|
||||
case 0x0B:
|
||||
case 0x0C:
|
||||
case 0x0D:
|
||||
case 0x0E:
|
||||
case 0x0F:
|
||||
z80_lockup_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x11: /* PSG */
|
||||
case 0x13:
|
||||
case 0x15:
|
||||
case 0x17:
|
||||
psg_write(data);
|
||||
return;
|
||||
|
||||
case 0x10: /* Unused */
|
||||
case 0x12:
|
||||
case 0x14:
|
||||
case 0x16:
|
||||
z80_unused_w(address, data);
|
||||
|
||||
case 0x18: /* Unused */
|
||||
case 0x19:
|
||||
case 0x1A:
|
||||
case 0x1B:
|
||||
z80_unused_w(address, data);
|
||||
return;
|
||||
|
||||
case 0x1C: /* Test register */
|
||||
case 0x1D:
|
||||
case 0x1E:
|
||||
case 0x1F:
|
||||
vdp_test_w(data << 8 | data);
|
||||
return;
|
||||
|
||||
default: /* Invalid VDP addresses */
|
||||
z80_lockup_w(address, data);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Port handlers. Ports are unused when not in Mark III compatability mode.
|
||||
|
||||
Games that access ports anyway:
|
||||
- Thunder Force IV reads port $BF in it's interrupt handler.
|
||||
*/
|
||||
|
||||
unsigned int cpu_readport16(unsigned int port)
|
||||
{
|
||||
#if LOG_PORT
|
||||
error("Z80 read port %04X (%04X)\n", port, z80_get_reg(Z80_PC));
|
||||
#endif
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
void cpu_writeport16(unsigned int port, unsigned int data)
|
||||
{
|
||||
#if LOG_PORT
|
||||
error("Z80 write %02X to port %04X (%04X)\n", data, port, z80_get_reg(Z80_PC));
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Handlers for access to unused addresses and those which make the
|
||||
machine lock up.
|
||||
*/
|
||||
void z80_unused_w(int address, int data)
|
||||
{
|
||||
error("Z80 unused write %04X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
|
||||
}
|
||||
|
||||
int z80_unused_r(int address)
|
||||
{
|
||||
error("Z80 unused read %04X (%04X)\n", address, z80_get_reg(Z80_PC));
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
void z80_lockup_w(int address, int data)
|
||||
{
|
||||
error("Z80 lockup write %04X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
|
||||
gen_running = 0;
|
||||
z80_end_timeslice();
|
||||
}
|
||||
|
||||
int z80_lockup_r(int address)
|
||||
{
|
||||
error("Z80 lockup read %04X (%04X)\n", address, z80_get_reg(Z80_PC));
|
||||
gen_running = 0;
|
||||
z80_end_timeslice();
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
|
||||
#ifndef _MEMZ80_H_
|
||||
#define _MEMZ80_H_
|
||||
|
||||
/* Function prototypes */
|
||||
unsigned int cpu_readmem16(unsigned int address);
|
||||
void cpu_writemem16(unsigned int address, unsigned int data);
|
||||
unsigned int cpu_readport16(unsigned int port);
|
||||
void cpu_writeport16(unsigned int port, unsigned int data);
|
||||
void z80_unused_w(int address, int data);
|
||||
int z80_unused_r(int address);
|
||||
void z80_lockup_w(int address, int data);
|
||||
int z80_lockup_r(int address);
|
||||
int z80_vdp_r(int address);
|
||||
void z80_vdp_w(int address, int data);
|
||||
|
||||
#endif /* _MEMZ80_H_ */
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
/*******************************************************************************
|
||||
* *
|
||||
* Define size independent data types and operations. *
|
||||
* *
|
||||
* The following types must be supported by all platforms: *
|
||||
* *
|
||||
* UINT8 - Unsigned 8-bit Integer INT8 - Signed 8-bit integer *
|
||||
* UINT16 - Unsigned 16-bit Integer INT16 - Signed 16-bit integer *
|
||||
* UINT32 - Unsigned 32-bit Integer INT32 - Signed 32-bit integer *
|
||||
* UINT64 - Unsigned 64-bit Integer INT64 - Signed 64-bit integer *
|
||||
* *
|
||||
* *
|
||||
* The macro names for the artithmatic operations are composed as follows: *
|
||||
* *
|
||||
* XXX_R_A_B, where XXX - 3 letter operation code (ADD, SUB, etc.) *
|
||||
* R - The type of the result *
|
||||
* A - The type of operand 1 *
|
||||
* B - The type of operand 2 (if binary operation) *
|
||||
* *
|
||||
* Each type is one of: U8,8,U16,16,U32,32,U64,64 *
|
||||
* *
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#ifndef OSD_CPU_H
|
||||
#define OSD_CPU_H
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
/* Combine two 32-bit integers into a 64-bit integer */
|
||||
#define COMBINE_64_32_32(A,B) ((((UINT64)(A))<<32) | (UINT32)(B))
|
||||
#define COMBINE_U64_U32_U32(A,B) COMBINE_64_32_32(A,B)
|
||||
|
||||
/* Return upper 32 bits of a 64-bit integer */
|
||||
#define HI32_32_64(A) (((UINT64)(A)) >> 32)
|
||||
#define HI32_U32_U64(A) HI32_32_64(A)
|
||||
|
||||
/* Return lower 32 bits of a 64-bit integer */
|
||||
#define LO32_32_64(A) ((A) & 0xffffffff)
|
||||
#define LO32_U32_U64(A) LO32_32_64(A)
|
||||
|
||||
#define DIV_64_64_32(A,B) ((A)/(B))
|
||||
#define DIV_U64_U64_U32(A,B) ((A)/(UINT32)(B))
|
||||
|
||||
#define MOD_32_64_32(A,B) ((A)%(B))
|
||||
#define MOD_U32_U64_U32(A,B) ((A)%(UINT32)(B))
|
||||
|
||||
#define MUL_64_32_32(A,B) ((A)*(INT64)(B))
|
||||
#define MUL_U64_U32_U32(A,B) ((A)*(UINT64)(UINT32)(B))
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Union of UINT8, UINT16 and UINT32 in native endianess of the target
|
||||
* This is used to access bytes and words in a machine independent manner.
|
||||
* The upper bytes h2 and h3 normally contain zero (16 bit CPU cores)
|
||||
* thus PAIR.d can be used to pass arguments to the memory system
|
||||
* which expects 'int' really.
|
||||
******************************************************************************/
|
||||
typedef union {
|
||||
#ifdef LSB_FIRST
|
||||
struct { UINT8 l,h,h2,h3; } b;
|
||||
struct { UINT16 l,h; } w;
|
||||
#else
|
||||
struct { UINT8 h3,h2,h,l; } b;
|
||||
struct { UINT16 h,l; } w;
|
||||
#endif
|
||||
UINT32 d;
|
||||
} PAIR;
|
||||
|
||||
#endif /* defined OSD_CPU_H */
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
#ifndef _PLATFORM_CONFIG_H_
|
||||
#define _PLATFORM_CONFIG_H_
|
||||
|
||||
#define TEECOMPUTER 1
|
||||
|
||||
#ifdef TEECOMPUTER
|
||||
//#define ILI9341 1
|
||||
//#define ST7789 1
|
||||
//#define TFTSPI1 1
|
||||
#define HAS_T4_VGA 1
|
||||
#define HAS_SND 1
|
||||
#define HAS_USBKEY 1
|
||||
//#define INVX 1
|
||||
#else
|
||||
|
||||
#define HAS_T4_VGA 1
|
||||
//#define INVX 1
|
||||
#define INVY 1
|
||||
#define HAS_SND 1
|
||||
#define HAS_USBKEY 1
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
//#define ILI9341 1
|
||||
//#define ST7789 1
|
||||
//#define SWAP_JOYSTICK 1
|
||||
//#define LOHRES 1
|
||||
//#define ROTATE_SCREEN 1
|
||||
//#define EXTERNAL_SD 1
|
||||
|
||||
|
||||
//#define USE_SDFAT 1
|
||||
//#define SD_FAT_TYPE 1
|
||||
//#define USE_SDFS 1
|
||||
//#define SDFSDEV "1:"
|
||||
|
||||
|
||||
#endif
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,39 @@
|
|||
|
||||
#ifndef _RENDER_H_
|
||||
#define _RENDER_H_
|
||||
|
||||
|
||||
/* Look-up pixel table information */
|
||||
#define LUT_MAX (5)
|
||||
#define LUT_SIZE (0x10000)
|
||||
|
||||
/* Clip structure */
|
||||
typedef struct
|
||||
{
|
||||
uint8 left;
|
||||
uint8 right;
|
||||
uint8 enable;
|
||||
}clip_t;
|
||||
|
||||
/* Function prototypes */
|
||||
int render_init(void);
|
||||
void render_reset(void);
|
||||
void render_shutdown(void);
|
||||
void render_line(int line);
|
||||
void render_obj(int line, uint8 *buf, uint8 *table);
|
||||
void render_obj_im2(int line, uint8 *buf, uint8 *table);
|
||||
void render_ntw(int line, uint8 *buf);
|
||||
void render_ntw_im2(int line, uint8 *buf);
|
||||
void render_ntx(int which, int line, uint8 *buf);
|
||||
void render_ntx_im2(int which, int line, uint8 *buf);
|
||||
void render_ntx_vs(int which, int line, uint8 *buf);
|
||||
void update_bg_pattern_cache(void);
|
||||
void get_hscroll(int line, uint16 *scrolla, uint16 *scrollb);
|
||||
void window_clip(int line);
|
||||
void remap_16(uint8 *src, uint16 *dst, uint16 *table, int length);
|
||||
void merge(uint8 *srca, uint8 *srcb, uint8 *dst, uint8 *table, int width);
|
||||
void color_update_16(int index, uint16 data);
|
||||
void make_name_lut(void);
|
||||
void parse_satb(int line);
|
||||
|
||||
#endif /* _RENDER_H_ */
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
|
||||
#ifndef _SHARED_H_
|
||||
#define _SHARED_H_
|
||||
|
||||
|
||||
#define LSB_FIRST 1
|
||||
#define SOUND_PRESENT 1
|
||||
//#define ALIGN_LONG 1
|
||||
#define GENESIS_HACKS 1
|
||||
|
||||
|
||||
typedef unsigned char uint8;
|
||||
typedef unsigned short int uint16;
|
||||
typedef unsigned long int uint32;
|
||||
|
||||
typedef signed char int8;
|
||||
typedef signed short int int16;
|
||||
typedef signed long int int32;
|
||||
|
||||
typedef unsigned char UINT8;
|
||||
typedef unsigned short int UINT16;
|
||||
typedef unsigned long int UINT32;
|
||||
|
||||
typedef signed char INT8;
|
||||
typedef signed short int INT16;
|
||||
typedef signed long int INT32;
|
||||
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
#include "macros.h"
|
||||
#include "m68k.h"
|
||||
#include "z80.h"
|
||||
#include "genesis.h"
|
||||
#include "vdp.h"
|
||||
#include "render.h"
|
||||
#include "mem68k.h"
|
||||
#include "memz80.h"
|
||||
#include "membnk.h"
|
||||
#include "memvdp.h"
|
||||
#include "system.h"
|
||||
#include "io.h"
|
||||
#include "sound.h"
|
||||
#include "fm.h"
|
||||
#include "sn76496.h"
|
||||
#include "memory.h"
|
||||
|
||||
#define __inline__
|
||||
#define error(...)
|
||||
|
||||
|
||||
|
||||
#endif /* _SHARED_H_ */
|
||||
|
|
@ -0,0 +1,273 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
#define MAX_OUTPUT 0x7fff
|
||||
#define STEP 0x10000
|
||||
#define FB_WNOISE 0x12000
|
||||
#define FB_PNOISE 0x08000
|
||||
#define NG_PRESET 0x0F35
|
||||
|
||||
struct SN76496
|
||||
{
|
||||
int SampleRate;
|
||||
unsigned int UpdateStep;
|
||||
int VolTable[16];
|
||||
int Register[8];
|
||||
int LastRegister;
|
||||
int Volume[4];
|
||||
unsigned int RNG;
|
||||
int NoiseFB;
|
||||
int Period[4];
|
||||
int Count[4];
|
||||
int Output[4];
|
||||
};
|
||||
|
||||
|
||||
struct SN76496 sn[MAX_76496];
|
||||
|
||||
|
||||
|
||||
void SN76496Write(int chip,int data)
|
||||
{
|
||||
struct SN76496 *R = &sn[chip];
|
||||
|
||||
if (data & 0x80)
|
||||
{
|
||||
int r = (data & 0x70) >> 4;
|
||||
int c = r/2;
|
||||
|
||||
R->LastRegister = r;
|
||||
R->Register[r] = (R->Register[r] & 0x3f0) | (data & 0x0f);
|
||||
switch (r)
|
||||
{
|
||||
case 0: /* tone 0 : frequency */
|
||||
case 2: /* tone 1 : frequency */
|
||||
case 4: /* tone 2 : frequency */
|
||||
R->Period[c] = R->UpdateStep * R->Register[r];
|
||||
if (R->Period[c] == 0) R->Period[c] = R->UpdateStep;
|
||||
if (r == 4)
|
||||
{
|
||||
/* update noise shift frequency */
|
||||
if ((R->Register[6] & 0x03) == 0x03)
|
||||
R->Period[3] = 2 * R->Period[2];
|
||||
}
|
||||
break;
|
||||
case 1: /* tone 0 : volume */
|
||||
case 3: /* tone 1 : volume */
|
||||
case 5: /* tone 2 : volume */
|
||||
case 7: /* noise : volume */
|
||||
R->Volume[c] = R->VolTable[data & 0x0f];
|
||||
break;
|
||||
case 6: /* noise : frequency, mode */
|
||||
{
|
||||
int n = R->Register[6];
|
||||
R->NoiseFB = (n & 4) ? FB_WNOISE : FB_PNOISE;
|
||||
n &= 3;
|
||||
/* N/512,N/1024,N/2048,Tone #3 output */
|
||||
R->Period[3] = (n == 3) ? 2 * R->Period[2] : (R->UpdateStep << (5+n));
|
||||
|
||||
/* reset noise shifter */
|
||||
R->RNG = NG_PRESET;
|
||||
R->Output[3] = R->RNG & 1;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
int r = R->LastRegister;
|
||||
int c = r/2;
|
||||
|
||||
switch (r)
|
||||
{
|
||||
case 0: /* tone 0 : frequency */
|
||||
case 2: /* tone 1 : frequency */
|
||||
case 4: /* tone 2 : frequency */
|
||||
R->Register[r] = (R->Register[r] & 0x0f) | ((data & 0x3f) << 4);
|
||||
R->Period[c] = R->UpdateStep * R->Register[r];
|
||||
if (R->Period[c] == 0) R->Period[c] = R->UpdateStep;
|
||||
if (r == 4)
|
||||
{
|
||||
/* update noise shift frequency */
|
||||
if ((R->Register[6] & 0x03) == 0x03)
|
||||
R->Period[3] = 2 * R->Period[2];
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void SN76496Update(int chip,signed short int *buffer,int length)
|
||||
{
|
||||
int i;
|
||||
struct SN76496 *R = &sn[chip];
|
||||
|
||||
|
||||
/* If the volume is 0, increase the counter */
|
||||
for (i = 0;i < 4;i++)
|
||||
{
|
||||
if (R->Volume[i] == 0)
|
||||
{
|
||||
/* note that I do count += length, NOT count = length + 1. You might think */
|
||||
/* it's the same since the volume is 0, but doing the latter could cause */
|
||||
/* interferencies when the program is rapidly modulating the volume. */
|
||||
if (R->Count[i] <= length*STEP) R->Count[i] += length*STEP;
|
||||
}
|
||||
}
|
||||
|
||||
while (length > 0)
|
||||
{
|
||||
int vol[4];
|
||||
unsigned int out;
|
||||
int left;
|
||||
|
||||
|
||||
/* vol[] keeps track of how long each square wave stays */
|
||||
/* in the 1 position during the sample period. */
|
||||
vol[0] = vol[1] = vol[2] = vol[3] = 0;
|
||||
|
||||
for (i = 0;i < 3;i++)
|
||||
{
|
||||
if (R->Output[i]) vol[i] += R->Count[i];
|
||||
R->Count[i] -= STEP;
|
||||
/* Period[i] is the half period of the square wave. Here, in each */
|
||||
/* loop I add Period[i] twice, so that at the end of the loop the */
|
||||
/* square wave is in the same status (0 or 1) it was at the start. */
|
||||
/* vol[i] is also incremented by Period[i], since the wave has been 1 */
|
||||
/* exactly half of the time, regardless of the initial position. */
|
||||
/* If we exit the loop in the middle, Output[i] has to be inverted */
|
||||
/* and vol[i] incremented only if the exit status of the square */
|
||||
/* wave is 1. */
|
||||
while (R->Count[i] <= 0)
|
||||
{
|
||||
R->Count[i] += R->Period[i];
|
||||
if (R->Count[i] > 0)
|
||||
{
|
||||
R->Output[i] ^= 1;
|
||||
if (R->Output[i]) vol[i] += R->Period[i];
|
||||
break;
|
||||
}
|
||||
R->Count[i] += R->Period[i];
|
||||
vol[i] += R->Period[i];
|
||||
}
|
||||
if (R->Output[i]) vol[i] -= R->Count[i];
|
||||
}
|
||||
|
||||
left = STEP;
|
||||
do
|
||||
{
|
||||
int nextevent;
|
||||
|
||||
|
||||
if (R->Count[3] < left) nextevent = R->Count[3];
|
||||
else nextevent = left;
|
||||
|
||||
if (R->Output[3]) vol[3] += R->Count[3];
|
||||
R->Count[3] -= nextevent;
|
||||
if (R->Count[3] <= 0)
|
||||
{
|
||||
if (R->RNG & 1) R->RNG ^= R->NoiseFB;
|
||||
R->RNG >>= 1;
|
||||
R->Output[3] = R->RNG & 1;
|
||||
R->Count[3] += R->Period[3];
|
||||
if (R->Output[3]) vol[3] += R->Period[3];
|
||||
}
|
||||
if (R->Output[3]) vol[3] -= R->Count[3];
|
||||
|
||||
left -= nextevent;
|
||||
} while (left > 0);
|
||||
|
||||
out = vol[0] * R->Volume[0] + vol[1] * R->Volume[1] +
|
||||
vol[2] * R->Volume[2] + vol[3] * R->Volume[3];
|
||||
|
||||
if (out > MAX_OUTPUT * STEP) out = MAX_OUTPUT * STEP;
|
||||
|
||||
*(buffer++) = out / STEP;
|
||||
|
||||
length--;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void SN76496_set_clock(int chip,int clock)
|
||||
{
|
||||
struct SN76496 *R = &sn[chip];
|
||||
|
||||
|
||||
/* the base clock for the tone generators is the chip clock divided by 16; */
|
||||
/* for the noise generator, it is clock / 256. */
|
||||
/* Here we calculate the number of steps which happen during one sample */
|
||||
/* at the given sample rate. No. of events = sample rate / (clock/16). */
|
||||
/* STEP is a multiplier used to turn the fraction into a fixed point */
|
||||
/* number. */
|
||||
R->UpdateStep = ((double)STEP * R->SampleRate * 16) / clock;
|
||||
}
|
||||
|
||||
|
||||
|
||||
void SN76496_set_gain(int chip,int gain)
|
||||
{
|
||||
struct SN76496 *R = &sn[chip];
|
||||
int i;
|
||||
double out;
|
||||
|
||||
|
||||
gain &= 0xff;
|
||||
|
||||
/* increase max output basing on gain (0.2 dB per step) */
|
||||
out = MAX_OUTPUT / 3;
|
||||
while (gain-- > 0)
|
||||
out *= 1.023292992; /* = (10 ^ (0.2/20)) */
|
||||
|
||||
/* build volume table (2dB per step) */
|
||||
for (i = 0;i < 15;i++)
|
||||
{
|
||||
/* limit volume to avoid clipping */
|
||||
if (out > MAX_OUTPUT / 3) R->VolTable[i] = MAX_OUTPUT / 3;
|
||||
else R->VolTable[i] = out;
|
||||
|
||||
out /= 1.258925412; /* = 10 ^ (2/20) = 2dB */
|
||||
}
|
||||
R->VolTable[15] = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int SN76496_init(int chip,int clock,int volume,int sample_rate)
|
||||
{
|
||||
int i;
|
||||
struct SN76496 *R = &sn[chip];
|
||||
|
||||
R->SampleRate = sample_rate;
|
||||
SN76496_set_clock(chip,clock);
|
||||
|
||||
for (i = 0;i < 4;i++) R->Volume[i] = 0;
|
||||
|
||||
R->LastRegister = 0;
|
||||
for (i = 0;i < 8;i+=2)
|
||||
{
|
||||
R->Register[i] = 0;
|
||||
R->Register[i + 1] = 0x0f; /* volume = 0 */
|
||||
}
|
||||
|
||||
for (i = 0;i < 4;i++)
|
||||
{
|
||||
R->Output[i] = 0;
|
||||
R->Period[i] = R->Count[i] = R->UpdateStep;
|
||||
}
|
||||
R->RNG = NG_PRESET;
|
||||
R->Output[3] = R->RNG & 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int SN76496_sh_start(int clock, int volume, int rate)
|
||||
{
|
||||
SN76496_init(0, clock, volume & 0xff, rate);
|
||||
SN76496_set_gain(0, (volume >> 8) & 0xff);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
#ifndef SN76496_H
|
||||
#define SN76496_H
|
||||
|
||||
#define MAX_76496 1
|
||||
|
||||
struct SN76496interface
|
||||
{
|
||||
int num;
|
||||
int baseclock[MAX_76496];
|
||||
int volume[MAX_76496];
|
||||
};
|
||||
|
||||
/* Function prototypes */
|
||||
void SN76496Write(int chip,int data);
|
||||
void SN76496Update(int chip,signed short int *buffer,int length);
|
||||
void SN76496_set_clock(int chip,int clock);
|
||||
void SN76496_set_gain(int chip,int gain);
|
||||
int SN76496_init(int chip,int clock,int volume,int sample_rate);
|
||||
int SN76496_sh_start(int clock, int volume, int rate);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
sound.c
|
||||
YM2612 and SN76489 emulation
|
||||
*/
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
/* YM2612 data */
|
||||
int fm_timera_tab[0x400]; /* Precalculated timer A values */
|
||||
int fm_timerb_tab[0x100]; /* Precalculated timer B values */
|
||||
uint8 fm_reg[2][0x100]; /* Register arrays (2x256) */
|
||||
uint8 fm_latch[2]; /* Register latches */
|
||||
uint8 fm_status; /* Read-only status flags */
|
||||
t_timer timer[2]; /* Timers A and B */
|
||||
|
||||
/* Initialize the YM2612 and SN76489 emulation */
|
||||
void sound_init(void)
|
||||
{
|
||||
/* Timers run at half the YM2612 input clock */
|
||||
float clock = ((53.693175 / 7) / 2);
|
||||
int i;
|
||||
|
||||
/* Make Timer A table */
|
||||
for(i = 0; i < 1024; i += 1)
|
||||
{
|
||||
/* Formula is "time(us) = 72 * (1024 - A) / clock" */
|
||||
fm_timera_tab[i] = ((int)(float)(72 * (1024 - i)) / (clock));
|
||||
}
|
||||
|
||||
/* Make Timer B table */
|
||||
for(i = 0; i < 256; i += 1)
|
||||
{
|
||||
/* Formula is "time(us) = 1152 * (256 - B) / clock" */
|
||||
fm_timerb_tab[i] = (int)(float)(1152 * (256 - i)) / clock;
|
||||
}
|
||||
}
|
||||
|
||||
void sound_reset(void)
|
||||
{
|
||||
if(snd.enabled)
|
||||
{
|
||||
YM2612ResetChip(0);
|
||||
}
|
||||
}
|
||||
|
||||
void fm_write(int address, int data)
|
||||
{
|
||||
int a0 = (address & 1);
|
||||
int a1 = (address >> 1) & 1;
|
||||
|
||||
if(a0)
|
||||
{
|
||||
/* Register data */
|
||||
fm_reg[a1][fm_latch[a1]] = data;
|
||||
|
||||
/* Timer control only in set A */
|
||||
if(a1 == 0)
|
||||
switch(fm_latch[a1])
|
||||
{
|
||||
case 0x24: /* Timer A (LSB) */
|
||||
timer[0].index = (timer[0].index & 0x0003) | (data << 2);
|
||||
timer[0].index &= 0x03FF;
|
||||
timer[0].base = fm_timera_tab[timer[0].index];
|
||||
break;
|
||||
|
||||
case 0x25: /* Timer A (MSB) */
|
||||
timer[0].index = (timer[0].index & 0x03FC) | (data & 3);
|
||||
timer[0].index &= 0x03FF;
|
||||
timer[0].base = fm_timera_tab[timer[0].index];
|
||||
break;
|
||||
|
||||
case 0x26: /* Timer B */
|
||||
timer[1].index = data;
|
||||
timer[1].base = timer[1].count = fm_timerb_tab[timer[1].index];
|
||||
break;
|
||||
|
||||
case 0x27: /* Timer Control */
|
||||
|
||||
/* LOAD */
|
||||
timer[0].running = (data >> 0) & 1;
|
||||
if(timer[0].running) timer[0].count = 0;
|
||||
timer[1].running = (data >> 1) & 1;
|
||||
if(timer[1].running) timer[1].count = 0;
|
||||
|
||||
/* ENABLE */
|
||||
timer[0].enable = (data >> 2) & 1;
|
||||
timer[1].enable = (data >> 3) & 1;
|
||||
|
||||
/* RESET */
|
||||
if(data & 0x10) fm_status &= ~1;
|
||||
if(data & 0x20) fm_status &= ~2;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Register latch */
|
||||
fm_latch[a1] = data;
|
||||
}
|
||||
|
||||
if(snd.enabled)
|
||||
{
|
||||
if(snd.fm.curStage - snd.fm.lastStage > 1)
|
||||
{
|
||||
int16 *tempBuffer[2];
|
||||
tempBuffer[0] = snd.fm.buffer[0] + snd.fm.lastStage;
|
||||
tempBuffer[1] = snd.fm.buffer[1] + snd.fm.lastStage;
|
||||
YM2612UpdateOne(0, (int16 **)tempBuffer, snd.fm.curStage - snd.fm.lastStage);
|
||||
snd.fm.lastStage = snd.fm.curStage;
|
||||
}
|
||||
|
||||
YM2612Write(0, address & 3, data);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int fm_read(int address)
|
||||
{
|
||||
return (fm_status);
|
||||
}
|
||||
|
||||
|
||||
void fm_update_timers(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Process YM2612 timers */
|
||||
for(i = 0; i < 2; i += 1)
|
||||
{
|
||||
/* Is the timer running? */
|
||||
if(timer[i].running)
|
||||
{
|
||||
/* Each scanline takes up roughly 64 microseconds */
|
||||
timer[i].count += 64;
|
||||
|
||||
/* Check if the counter overflowed */
|
||||
if(timer[i].count > timer[i].base)
|
||||
{
|
||||
/* Reload counter */
|
||||
timer[i].count = 0;
|
||||
|
||||
/* Disable timer */
|
||||
timer[i].running = 0;
|
||||
|
||||
/* Set overflow flag (if flag setting is enabled) */
|
||||
if(timer[i].enable)
|
||||
{
|
||||
fm_status |= (1 << i);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void psg_write(int data)
|
||||
{
|
||||
if(snd.enabled)
|
||||
{
|
||||
if(snd.psg.curStage - snd.psg.lastStage > 1)
|
||||
{
|
||||
int16 *tempBuffer;
|
||||
tempBuffer = snd.psg.buffer + snd.psg.lastStage;
|
||||
SN76496Update(0, tempBuffer, snd.psg.curStage - snd.psg.lastStage);
|
||||
snd.psg.lastStage = snd.psg.curStage;
|
||||
}
|
||||
|
||||
SN76496Write(0, data);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
|
||||
#ifndef _SOUND_H_
|
||||
#define _SOUND_H_
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int running;
|
||||
int enable;
|
||||
int count;
|
||||
int base;
|
||||
int index;
|
||||
} t_timer;
|
||||
|
||||
/* Global variables */
|
||||
extern int fm_timera_tab[1024];
|
||||
extern int fm_timerb_tab[256];
|
||||
extern uint8 fm_reg[2][0x100];
|
||||
extern uint8 fm_latch[2];
|
||||
extern int timer_status;
|
||||
extern t_timer timer[2];
|
||||
|
||||
/* Function prototypes */
|
||||
void sound_init(void);
|
||||
void sound_reset(void);
|
||||
void fm_write(int address, int data);
|
||||
int fm_read(int address);
|
||||
void fm_update_timers(void);
|
||||
void psg_write(int data);
|
||||
|
||||
#endif /* _SOUND_H_ */
|
||||
|
|
@ -0,0 +1,256 @@
|
|||
/*
|
||||
Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
t_bitmap gbitmap;
|
||||
t_input input;
|
||||
t_snd snd;
|
||||
static int sound_tbl[262];
|
||||
|
||||
#define SND_SIZE (snd.buffer_size * sizeof(int16))
|
||||
|
||||
|
||||
int audio_init(int rate)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* 68000 and YM2612 clock */
|
||||
float vclk = 53693175.0 / 7;
|
||||
|
||||
/* Z80 and SN76489 clock */
|
||||
float zclk = 3579545.0;
|
||||
|
||||
/* Clear the sound data context */
|
||||
memset(&snd, 0, sizeof(snd));
|
||||
|
||||
/* Make sure the requested sample rate is valid */
|
||||
if(!rate || ((rate < 8000) | (rate > 44100)))
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* Calculate the sound buffer size */
|
||||
snd.buffer_size = (rate / 60);
|
||||
snd.sample_rate = rate;
|
||||
|
||||
/* Allocate sound buffers */
|
||||
snd.fm.buffer[0] = emu_Malloc(SND_SIZE);
|
||||
snd.fm.buffer[1] = emu_Malloc(SND_SIZE);
|
||||
snd.psg.buffer = emu_Malloc(SND_SIZE);
|
||||
|
||||
/* Make sure we could allocate everything */
|
||||
if(!snd.fm.buffer[0] || !snd.fm.buffer[1] || !snd.psg.buffer)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
/* Initialize sound chip emulation */
|
||||
SN76496_sh_start(zclk, 100, rate);
|
||||
YM2612Init(1, vclk, rate, NULL, NULL);
|
||||
|
||||
/* Set audio enable flag */
|
||||
snd.enabled = 1;
|
||||
|
||||
/* Make sound table */
|
||||
for (i = 0; i < 262; i++)
|
||||
{
|
||||
float p = snd.buffer_size * i;
|
||||
p = p / 262;
|
||||
sound_tbl[i] = p;
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
void system_init(void)
|
||||
{
|
||||
gen_init();
|
||||
vdp_init();
|
||||
render_init();
|
||||
}
|
||||
|
||||
void system_reset(void)
|
||||
{
|
||||
gen_reset();
|
||||
vdp_reset();
|
||||
render_reset();
|
||||
|
||||
if(snd.enabled)
|
||||
{
|
||||
YM2612ResetChip(0);
|
||||
//memset(snd.buffer[0], 0, SND_SIZE);
|
||||
//memset(snd.buffer[1], 0, SND_SIZE);
|
||||
memset(snd.fm.buffer[0], 0, SND_SIZE);
|
||||
memset(snd.fm.buffer[1], 0, SND_SIZE);
|
||||
memset(snd.psg.buffer, 0, SND_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
void system_shutdown(void)
|
||||
{
|
||||
gen_shutdown();
|
||||
vdp_shutdown();
|
||||
render_shutdown();
|
||||
}
|
||||
|
||||
|
||||
int system_frame(int do_skip)
|
||||
{
|
||||
int line;
|
||||
|
||||
if(gen_running == 0)
|
||||
return 0;
|
||||
|
||||
/* Clear V-Blank flag */
|
||||
status &= ~0x0008;
|
||||
|
||||
/* Toggle even/odd flag (IM2 only) */
|
||||
if(im2_flag)
|
||||
status ^= 0x0010;
|
||||
|
||||
/* Point to start of sound buffer */
|
||||
snd.fm.lastStage = snd.fm.curStage = 0;
|
||||
snd.psg.lastStage = snd.psg.curStage = 0;
|
||||
|
||||
/* Parse sprites for line 0 (done on line 261) */
|
||||
parse_satb(0x80);
|
||||
|
||||
for(line = 0; line < 262; line += 1)
|
||||
{
|
||||
/* Used by HV counter */
|
||||
v_counter = line;
|
||||
|
||||
/* Run 68000 emulation */
|
||||
m68k_execute(487);
|
||||
if(!gen_running) break;
|
||||
|
||||
/* Run Z80 emulation (if enabled) */
|
||||
if(zreset == 1 && zbusreq == 0)
|
||||
{
|
||||
// z80_execute(228);
|
||||
if(!gen_running) break;
|
||||
}
|
||||
|
||||
/* If a Z80 interrupt is still pending after a scanline, cancel it */
|
||||
if(zirq == 1)
|
||||
{
|
||||
zirq = 0;
|
||||
z80_set_irq_line(0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
/* Render a line of the display */
|
||||
if(do_skip == 0)
|
||||
{
|
||||
if(line < frame_end ) render_line(line);
|
||||
if(line < frame_end-1 ) parse_satb(0x81 + line);
|
||||
}
|
||||
|
||||
/* Do H interrupt processing */
|
||||
if(line <= frame_end)
|
||||
{
|
||||
counter -= 1;
|
||||
if(counter == -1)
|
||||
{
|
||||
counter = reg[10];
|
||||
hint_pending = 1;
|
||||
if(reg[0] & 0x10)
|
||||
{
|
||||
m68k_set_irq(4);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
counter = reg[10];
|
||||
}
|
||||
|
||||
/* Do end of frame processing */
|
||||
if(line == frame_end)
|
||||
{
|
||||
status |= 0x0088;
|
||||
vint_pending = 1;
|
||||
|
||||
/* Give enough time to read the interrupt pending flag before
|
||||
the interrupt actually occurs. */
|
||||
m68k_execute(16);
|
||||
if(!gen_running) break;
|
||||
|
||||
if(reg[1] & 0x20)
|
||||
{
|
||||
m68k_set_irq(6);
|
||||
}
|
||||
|
||||
if(zreset == 1 && zbusreq == 0)
|
||||
{
|
||||
z80_set_irq_line(0, ASSERT_LINE);
|
||||
zirq = 1;
|
||||
}
|
||||
}
|
||||
|
||||
fm_update_timers();
|
||||
|
||||
snd.fm.curStage = sound_tbl[line];
|
||||
snd.psg.curStage = sound_tbl[line];
|
||||
}
|
||||
|
||||
if(snd.enabled)
|
||||
{
|
||||
audio_update();
|
||||
}
|
||||
|
||||
return gen_running;
|
||||
}
|
||||
|
||||
void audio_update(void)
|
||||
{
|
||||
}
|
||||
|
||||
void audio_play_sample(int16 *bufl, int16 *bufr, int length)
|
||||
{
|
||||
int i;
|
||||
int16 acc;
|
||||
|
||||
length = length/2;
|
||||
|
||||
|
||||
int16 *tempBuffer[2];
|
||||
tempBuffer[0] = snd.fm.buffer[0];
|
||||
tempBuffer[1] = snd.fm.buffer[1];
|
||||
YM2612UpdateOne(0, (int16 **)tempBuffer, length);
|
||||
|
||||
tempBuffer[0] = snd.psg.buffer;
|
||||
SN76496Update(0, tempBuffer[0], length);
|
||||
|
||||
for(i = 0; i < length /*snd.buffer_size*/; i += 1)
|
||||
{
|
||||
int16 psg = snd.psg.buffer[i] / 2;
|
||||
|
||||
acc = 0;
|
||||
acc += snd.fm.buffer[0][i];
|
||||
acc += psg;
|
||||
//snd.buffer[0][i] = acc;
|
||||
*bufl++ = acc;
|
||||
|
||||
acc = 0;
|
||||
acc += snd.fm.buffer[1][i];
|
||||
acc += psg;
|
||||
//snd.buffer[1][i] = acc;
|
||||
*bufl++ = acc;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
|
||||
#ifndef _SYSTEM_H_
|
||||
#define _SYSTEM_H_
|
||||
|
||||
/* Input devices */
|
||||
#define MAX_DEVICES (8) /* Unsure of maximum */
|
||||
#define DEVICE_2BUTTON (0) /* 2-button gamepad */
|
||||
#define DEVICE_3BUTTON (1) /* 3-button gamepad */
|
||||
#define DEVICE_6BUTTON (2) /* 6-button gamepad */
|
||||
|
||||
/* Input bitmasks */
|
||||
#define INPUT_MODE (0x00000800)
|
||||
#define INPUT_Z (0x00000400)
|
||||
#define INPUT_Y (0x00000200)
|
||||
#define INPUT_X (0x00000100)
|
||||
#define INPUT_START (0x00000080)
|
||||
#define INPUT_C (0x00000040)
|
||||
#define INPUT_B (0x00000020)
|
||||
#define INPUT_A (0x00000010)
|
||||
#define INPUT_LEFT (0x00000008)
|
||||
#define INPUT_RIGHT (0x00000004)
|
||||
#define INPUT_DOWN (0x00000002)
|
||||
#define INPUT_UP (0x00000001)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
// uint8 *data; /* Bitmap data */
|
||||
int width; /* Bitmap width (32+512+32) */
|
||||
int height; /* Bitmap height (256) */
|
||||
// int depth; /* Color depth (8 bits) */
|
||||
int pitch; /* Width of bitmap in bytes */
|
||||
// int granularity; /* Size of each pixel in bytes */
|
||||
// int remap; /* 1= Translate pixel data */
|
||||
struct {
|
||||
int x; /* X offset of viewport within bitmap */
|
||||
int y; /* Y offset of viewport within bitmap */
|
||||
int w; /* Width of viewport */
|
||||
int h; /* Height of viewport */
|
||||
int ow; /* Previous width of viewport */
|
||||
int oh; /* Previous height of viewport */
|
||||
int changed; /* 1= Viewport width or height have changed */
|
||||
}viewport;
|
||||
}t_bitmap;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 dev[MAX_DEVICES]; /* Can be any of the DEVICE_* values */
|
||||
uint32 pad[MAX_DEVICES]; /* Can be any of the INPUT_* bitmasks */
|
||||
uint32 system; /* Can be any of the SYSTEM_* bitmasks */
|
||||
}t_input;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int sample_rate; /* Sample rate (8000-44100) */
|
||||
int enabled; /* 1= sound emulation is enabled */
|
||||
int buffer_size; /* Size of sound buffer (in bytes) */
|
||||
int16 *buffer[2]; /* Signed 16-bit stereo sound data */
|
||||
struct {
|
||||
int curStage;
|
||||
int lastStage;
|
||||
int16 *buffer[2];
|
||||
} fm;
|
||||
struct {
|
||||
int curStage;
|
||||
int lastStage;
|
||||
int16 *buffer;
|
||||
} psg;
|
||||
}t_snd;
|
||||
|
||||
/* Global variables */
|
||||
extern t_bitmap gbitmap;
|
||||
extern t_input input;
|
||||
extern t_snd snd;
|
||||
|
||||
/* Function prototypes */
|
||||
void system_init(void);
|
||||
int system_frame(int skip);
|
||||
void system_reset(void);
|
||||
void system_shutdown(void);
|
||||
int audio_init(int rate);
|
||||
void audio_update(void);
|
||||
void audio_play_sample(int16 *bufl, int16 *bufr, int length);
|
||||
|
||||
#endif /* _SYSTEM_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,203 @@
|
|||
extern "C" {
|
||||
#include "iopins.h"
|
||||
#include "emuapi.h"
|
||||
}
|
||||
|
||||
#include "emu.h"
|
||||
#ifdef HAS_T4_VGA
|
||||
#include "vga_t_dma.h"
|
||||
TFT_T_DMA tft;
|
||||
#else
|
||||
#include "tft_t_dma.h"
|
||||
TFT_T_DMA tft = TFT_T_DMA(TFT_CS, TFT_DC, TFT_RST, TFT_MOSI, TFT_SCLK, TFT_MISO, TFT_TOUCH_CS, TFT_TOUCH_INT);
|
||||
#endif
|
||||
|
||||
bool vgaMode = false;
|
||||
|
||||
static unsigned char palette8[PALETTE_SIZE];
|
||||
static unsigned short palette16[PALETTE_SIZE];
|
||||
static IntervalTimer myTimer;
|
||||
volatile boolean vbl=true;
|
||||
static int skip=0;
|
||||
static elapsedMicros tius;
|
||||
|
||||
static void vblCount() {
|
||||
if (vbl) {
|
||||
vbl = false;
|
||||
} else {
|
||||
vbl = true;
|
||||
}
|
||||
}
|
||||
|
||||
void emu_SetPaletteEntry(unsigned char r, unsigned char g, unsigned char b, int index)
|
||||
{
|
||||
if (index<PALETTE_SIZE) {
|
||||
//Serial.println("%d: %d %d %d\n", index, r,g,b);
|
||||
palette8[index] = RGBVAL8(r,g,b);
|
||||
palette16[index] = RGBVAL16(r,g,b);
|
||||
}
|
||||
}
|
||||
|
||||
void emu_DrawVsync(void)
|
||||
{
|
||||
volatile boolean vb=vbl;
|
||||
skip += 1;
|
||||
skip &= VID_FRAME_SKIP;
|
||||
if (!vgaMode) {
|
||||
#ifdef HAS_T4_VGA
|
||||
tft.waitSync();
|
||||
#else
|
||||
while (vbl==vb) {};
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
void emu_DrawLine(unsigned char * VBuf, int width, int height, int line)
|
||||
{
|
||||
if (!vgaMode) {
|
||||
#ifdef HAS_T4_VGA
|
||||
tft.writeLine(width,1,line, VBuf, palette8);
|
||||
#else
|
||||
tft.writeLine(width,1,line, VBuf, palette16);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
void emu_DrawLine8(unsigned char * VBuf, int width, int height, int line)
|
||||
{
|
||||
if (!vgaMode) {
|
||||
if (skip==0) {
|
||||
#ifdef HAS_T4_VGA
|
||||
tft.writeLine(width,height,line, VBuf);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void emu_DrawLine16(unsigned short * VBuf, int width, int height, int line)
|
||||
{
|
||||
if (!vgaMode) {
|
||||
if (skip==0) {
|
||||
#ifdef HAS_T4_VGA
|
||||
tft.writeLine16(width,height,line, VBuf);
|
||||
#else
|
||||
tft.writeLine(width,height,line, VBuf);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void emu_DrawScreen(unsigned char * VBuf, int width, int height, int stride)
|
||||
{
|
||||
if (!vgaMode) {
|
||||
if (skip==0) {
|
||||
#ifdef HAS_T4_VGA
|
||||
tft.writeScreen(width,height-TFT_VBUFFER_YCROP,stride, VBuf+(TFT_VBUFFER_YCROP/2)*stride, palette8);
|
||||
#else
|
||||
tft.writeScreen(width,height-TFT_VBUFFER_YCROP,stride, VBuf+(TFT_VBUFFER_YCROP/2)*stride, palette16);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int emu_FrameSkip(void)
|
||||
{
|
||||
return skip;
|
||||
}
|
||||
|
||||
void * emu_LineBuffer(int line)
|
||||
{
|
||||
if (!vgaMode) {
|
||||
return (void*)tft.getLineBuffer(line);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// ****************************************************
|
||||
// the setup() method runs once, when the sketch starts
|
||||
// ****************************************************
|
||||
void setup() {
|
||||
|
||||
#ifdef HAS_T4_VGA
|
||||
tft.begin(VGA_MODE_320x240);
|
||||
// NVIC_SET_PRIORITY(IRQ_QTIMER3, 0);
|
||||
#else
|
||||
tft.begin();
|
||||
#endif
|
||||
|
||||
emu_init();
|
||||
}
|
||||
|
||||
|
||||
// ****************************************************
|
||||
// the loop() method runs continuously
|
||||
// ****************************************************
|
||||
void loop(void)
|
||||
{
|
||||
if (menuActive()) {
|
||||
uint16_t bClick = emu_DebounceLocalKeys();
|
||||
int action = handleMenu(bClick);
|
||||
char * filename = menuSelection();
|
||||
if (action == ACTION_RUN1) {
|
||||
toggleMenu(false);
|
||||
vgaMode = false;
|
||||
emu_start();
|
||||
emu_Init(filename);
|
||||
tft.fillScreenNoDma( RGBVAL16(0x00,0x00,0x00) );
|
||||
tft.startDMA();
|
||||
myTimer.begin(vblCount, 20000); //to run every 20ms
|
||||
}
|
||||
delay(20);
|
||||
}
|
||||
else {
|
||||
uint16_t bClick = emu_DebounceLocalKeys();
|
||||
emu_Input(bClick);
|
||||
emu_Step();
|
||||
delay(10);
|
||||
//uint16_t bClick = emu_DebounceLocalKeys();
|
||||
//if (bClick & MASK_KEY_USER1) {
|
||||
// emu_Input(bClick);
|
||||
//}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef HAS_SND
|
||||
|
||||
#include "AudioPlaySystem.h"
|
||||
|
||||
AudioPlaySystem mymixer;
|
||||
|
||||
|
||||
void emu_sndInit() {
|
||||
Serial.println("sound init");
|
||||
#ifdef HAS_T4_VGA
|
||||
tft.begin_audio(256, mymixer.snd_Mixer);
|
||||
#else
|
||||
mymixer.begin_audio(256, mymixer.snd_Mixer);
|
||||
#endif
|
||||
// sgtl5000_1.enable();
|
||||
// sgtl5000_1.volume(0.6);
|
||||
mymixer.start();
|
||||
}
|
||||
|
||||
void emu_sndPlaySound(int chan, int volume, int freq)
|
||||
{
|
||||
if (chan < 6) {
|
||||
mymixer.sound(chan, freq, volume);
|
||||
}
|
||||
/*
|
||||
Serial.print(chan);
|
||||
Serial.print(":" );
|
||||
Serial.print(volume);
|
||||
Serial.print(":" );
|
||||
Serial.println(freq);
|
||||
*/
|
||||
}
|
||||
|
||||
void emu_sndPlayBuzz(int size, int val) {
|
||||
mymixer.buzz(size,val);
|
||||
//Serial.print((val==1)?1:0);
|
||||
//Serial.print(":");
|
||||
//Serial.println(size);
|
||||
}
|
||||
#endif
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,234 @@
|
|||
/*
|
||||
Based on C64 ILI9341 dma driver from Frank Bösing, 2017
|
||||
*/
|
||||
|
||||
#ifndef _TFT_T_DMAH_
|
||||
#define _TFT_T_DMAH_
|
||||
|
||||
#ifdef __cplusplus
|
||||
#include <Arduino.h>
|
||||
#include <SPI.h>
|
||||
#include <DMAChannel.h>
|
||||
#endif
|
||||
|
||||
#include "tft_t_dma_config.h"
|
||||
|
||||
#define RGBVAL32(r,g,b) ( (r<<16) | (g<<8) | b )
|
||||
#define RGBVAL16(r,g,b) ( (((r>>3)&0x1f)<<11) | (((g>>2)&0x3f)<<5) | (((b>>3)&0x1f)<<0) )
|
||||
#define RGBVAL8(r,g,b) ( (((r>>5)&0x07)<<5) | (((g>>5)&0x07)<<2) | (((b>>6)&0x3)<<0) )
|
||||
#define R16(rgb) ((rgb>>8)&0xf8)
|
||||
#define G16(rgb) ((rgb>>3)&0xfc)
|
||||
#define B16(rgb) ((rgb<<3)&0xf8)
|
||||
|
||||
#define PAL_COLOR_MASK 0xff
|
||||
|
||||
#ifdef LOHRES
|
||||
#define TFT_WIDTH 240
|
||||
#define TFT_REALWIDTH 240
|
||||
#else
|
||||
#define TFT_WIDTH 320
|
||||
#define TFT_REALWIDTH 320
|
||||
#endif
|
||||
#define TFT_HEIGHT 240
|
||||
#define TFT_REALHEIGHT 240
|
||||
|
||||
//#define WIDTH 272
|
||||
//#define HEIGHT 228
|
||||
|
||||
#define LINES_PER_BLOCK 64
|
||||
#define NR_OF_BLOCK 4
|
||||
#define SCREEN_DMA_NUM_SETTINGS NR_OF_BLOCK
|
||||
|
||||
|
||||
#ifdef ILI9341
|
||||
|
||||
#define ILI9341_NOP 0x00
|
||||
#define ILI9341_SWRESET 0x01
|
||||
#define ILI9341_RDDID 0x04
|
||||
#define ILI9341_RDDST 0x09
|
||||
|
||||
#define ILI9341_SLPIN 0x10
|
||||
#define ILI9341_SLPOUT 0x11
|
||||
#define ILI9341_PTLON 0x12
|
||||
#define ILI9341_NORON 0x13
|
||||
|
||||
#define ILI9341_RDMODE 0x0A
|
||||
#define ILI9341_RDMADCTL 0x0B
|
||||
#define ILI9341_RDPIXFMT 0x0C
|
||||
#define ILI9341_RDIMGFMT 0x0D
|
||||
#define ILI9341_RDSELFDIAG 0x0F
|
||||
|
||||
#define ILI9341_INVOFF 0x20
|
||||
#define ILI9341_INVON 0x21
|
||||
#define ILI9341_GAMMASET 0x26
|
||||
#define ILI9341_DISPOFF 0x28
|
||||
#define ILI9341_DISPON 0x29
|
||||
|
||||
#define ILI9341_CASET 0x2A
|
||||
#define ILI9341_PASET 0x2B
|
||||
#define ILI9341_RAMWR 0x2C
|
||||
#define ILI9341_RAMRD 0x2E
|
||||
|
||||
#define ILI9341_PTLAR 0x30
|
||||
#define ILI9341_MADCTL 0x36
|
||||
#define ILI9341_VSCRSADD 0x37
|
||||
#define ILI9341_PIXFMT 0x3A
|
||||
|
||||
#define ILI9341_FRMCTR1 0xB1
|
||||
#define ILI9341_FRMCTR2 0xB2
|
||||
#define ILI9341_FRMCTR3 0xB3
|
||||
#define ILI9341_INVCTR 0xB4
|
||||
#define ILI9341_DFUNCTR 0xB6
|
||||
|
||||
#define ILI9341_PWCTR1 0xC0
|
||||
#define ILI9341_PWCTR2 0xC1
|
||||
#define ILI9341_PWCTR3 0xC2
|
||||
#define ILI9341_PWCTR4 0xC3
|
||||
#define ILI9341_PWCTR5 0xC4
|
||||
#define ILI9341_VMCTR1 0xC5
|
||||
#define ILI9341_VMCTR2 0xC7
|
||||
|
||||
#define ILI9341_RDID1 0xDA
|
||||
#define ILI9341_RDID2 0xDB
|
||||
#define ILI9341_RDID3 0xDC
|
||||
#define ILI9341_RDID4 0xDD
|
||||
|
||||
#define ILI9341_GMCTRP1 0xE0
|
||||
#define ILI9341_GMCTRN1 0xE1
|
||||
|
||||
#define ILI9341_MADCTL_MY 0x80
|
||||
#define ILI9341_MADCTL_MX 0x40
|
||||
#define ILI9341_MADCTL_MV 0x20
|
||||
#define ILI9341_MADCTL_ML 0x10
|
||||
#define ILI9341_MADCTL_RGB 0x00
|
||||
#define ILI9341_MADCTL_BGR 0x08
|
||||
#define ILI9341_MADCTL_MH 0x04
|
||||
|
||||
#define TFT_CASET ILI9341_CASET
|
||||
#define TFT_PASET ILI9341_PASET
|
||||
#define TFT_RAMWR ILI9341_RAMWR
|
||||
#define TFT_MADCTL ILI9341_MADCTL
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef ST7789
|
||||
|
||||
#define ST7735_NOP 0x00
|
||||
#define ST7735_SWRESET 0x01
|
||||
#define ST7735_RDDID 0x04
|
||||
#define ST7735_RDDST 0x09
|
||||
|
||||
#define ST7735_SLPIN 0x10
|
||||
#define ST7735_SLPOUT 0x11
|
||||
#define ST7735_PTLON 0x12
|
||||
#define ST7735_NORON 0x13
|
||||
|
||||
#define ST7735_INVOFF 0x20
|
||||
#define ST7735_INVON 0x21
|
||||
#define ST7735_DISPOFF 0x28
|
||||
#define ST7735_DISPON 0x29
|
||||
#define ST7735_CASET 0x2A
|
||||
#define ST7735_RASET 0x2B
|
||||
#define ST7735_RAMWR 0x2C
|
||||
#define ST7735_RAMRD 0x2E
|
||||
|
||||
#define ST7735_PTLAR 0x30
|
||||
#define ST7735_COLMOD 0x3A
|
||||
#define ST7735_MADCTL 0x36
|
||||
|
||||
#define ST7735_FRMCTR1 0xB1
|
||||
#define ST7735_FRMCTR2 0xB2
|
||||
#define ST7735_FRMCTR3 0xB3
|
||||
#define ST7735_INVCTR 0xB4
|
||||
#define ST7735_DISSET5 0xB6
|
||||
|
||||
#define ST7735_PWCTR1 0xC0
|
||||
#define ST7735_PWCTR2 0xC1
|
||||
#define ST7735_PWCTR3 0xC2
|
||||
#define ST7735_PWCTR4 0xC3
|
||||
#define ST7735_PWCTR5 0xC4
|
||||
#define ST7735_VMCTR1 0xC5
|
||||
|
||||
#define ST7735_RDID1 0xDA
|
||||
#define ST7735_RDID2 0xDB
|
||||
#define ST7735_RDID3 0xDC
|
||||
#define ST7735_RDID4 0xDD
|
||||
|
||||
#define ST7735_PWCTR6 0xFC
|
||||
|
||||
#define ST7735_GMCTRP1 0xE0
|
||||
#define ST7735_GMCTRN1 0xE1
|
||||
|
||||
#define ST77XX_MADCTL_MY 0x80
|
||||
#define ST77XX_MADCTL_MX 0x40
|
||||
#define ST77XX_MADCTL_MV 0x20
|
||||
#define ST77XX_MADCTL_ML 0x10
|
||||
#define ST77XX_MADCTL_RGB 0x00
|
||||
#define ST77XX_MADCTL_BGR 0x08
|
||||
#define ST77XX_MADCTL_MH 0x04
|
||||
|
||||
#define TFT_CASET ST7735_CASET
|
||||
#define TFT_PASET ST7735_RASET
|
||||
#define TFT_RAMWR ST7735_RAMWR
|
||||
#define TFT_MADCTL ST7735_MADCTL
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
class TFT_T_DMA
|
||||
{
|
||||
public:
|
||||
TFT_T_DMA(uint8_t _CS, uint8_t _DC, uint8_t _RST = 255, uint8_t _MOSI=11, uint8_t _SCLK=13, uint8_t _MISO=12, uint8_t touch_cs=38, uint8_t touch_irq=37);
|
||||
|
||||
void setArea(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2);
|
||||
void begin(void);
|
||||
void flipscreen(bool flip);
|
||||
boolean isflipped(void);
|
||||
void startDMA(void);
|
||||
void stopDMA();
|
||||
int get_frame_buffer_size(int *width, int *height);
|
||||
|
||||
// Touch screen functions
|
||||
#define TOUCH_ENABLED() ((_touch_cs != 255) && (_touch_irq != 255))
|
||||
bool isTouching(void) { return ((!TOUCH_ENABLED())?false:(digitalRead(_touch_irq) == LOW)); }
|
||||
void readRaw(uint16_t * oX, uint16_t * oY, uint16_t * oZ);
|
||||
void readCal(uint16_t * oX, uint16_t * oY, uint16_t * oZ);
|
||||
void callibrateTouch(uint16_t xMin,uint16_t yMin,uint16_t xMax,uint16_t yMax);
|
||||
|
||||
// NoDMA functions
|
||||
void writeScreenNoDma(const uint16_t *pcolors);
|
||||
void fillScreenNoDma(uint16_t color);
|
||||
void drawTextNoDma(int16_t x, int16_t y, const char * text, uint16_t fgcolor, uint16_t bgcolor, bool doublesize);
|
||||
void drawRectNoDma(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color);
|
||||
void drawSpriteNoDma(int16_t x, int16_t y, const uint16_t *bitmap);
|
||||
void drawSpriteNoDma(int16_t x, int16_t y, const uint16_t *bitmap, uint16_t croparx, uint16_t cropary, uint16_t croparw, uint16_t croparh);
|
||||
|
||||
// DMA functions
|
||||
uint16_t * getLineBuffer(int j);
|
||||
void writeScreen(int width, int height, int stride, uint8_t *buffer, uint16_t *palette16);
|
||||
void writeLine(int width, int height, int stride, uint8_t *buffer, uint16_t *palette16);
|
||||
void writeLine(int width, int height, int y, uint16_t *buf);
|
||||
void fillScreen(uint16_t color);
|
||||
void drawText(int16_t x, int16_t y, const char * text, uint16_t fgcolor, uint16_t bgcolor, bool doublesize);
|
||||
void drawRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color);
|
||||
void drawSprite(int16_t x, int16_t y, const uint16_t *bitmap);
|
||||
void drawSprite(int16_t x, int16_t y, const uint16_t *bitmap, uint16_t croparx, uint16_t cropary, uint16_t croparw, uint16_t croparh);
|
||||
|
||||
protected:
|
||||
uint8_t _rst, _cs, _dc;
|
||||
uint8_t _miso, _mosi, _sclk;
|
||||
uint8_t _touch_irq=255, _touch_cs=255;
|
||||
bool flipped=false;
|
||||
|
||||
void wait(void);
|
||||
void enableTouchIrq();
|
||||
};
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
#include "platform_config.h"
|
||||
|
||||
//#define ST7789 1
|
||||
//#define ILI9341 1
|
||||
|
||||
#define TFT_LINEARINT 1
|
||||
#define LINEARINT_HACK 1
|
||||
|
||||
//#define FLIP_SCREEN 1
|
||||
//#define TFT_DEBUG 1
|
||||
#if defined(__IMXRT1052__) || defined(__IMXRT1062__)
|
||||
//#define TFT_STATICFB 1
|
||||
#endif
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
|
||||
#ifndef _VCNT_H_
|
||||
#define _VCNT_H_
|
||||
|
||||
#include "arduinoproto.h"
|
||||
|
||||
PROGMEM static const char vc28[262] =
|
||||
{
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
|
||||
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
|
||||
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
|
||||
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
|
||||
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
|
||||
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
|
||||
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
|
||||
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
|
||||
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
|
||||
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
|
||||
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
|
||||
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
|
||||
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9,
|
||||
0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9,
|
||||
0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
|
||||
};
|
||||
|
||||
#endif /* _VCNT_H_ */
|
||||
|
|
@ -0,0 +1,557 @@
|
|||
|
||||
#include "shared.h"
|
||||
#include "vcnt.h"
|
||||
#include "hcnt.h"
|
||||
#include "hvc.h"
|
||||
|
||||
/* Pack and unpack CRAM data */
|
||||
#define PACK_CRAM(d) ((((d)&0xE00)>>9)|(((d)&0x0E0)>>2)|(((d)&0x00E)<<5))
|
||||
#define UNPACK_CRAM(d) ((((d)&0x1C0)>>5)|((d)&0x038)<<2|(((d)&0x007)<<9))
|
||||
|
||||
/* Mark a pattern as dirty */
|
||||
#define MARK_BG_DIRTY(addr) \
|
||||
{ \
|
||||
int name = (addr >> 5) & 0x7FF; \
|
||||
if(bg_name_dirty[name] == 0) \
|
||||
{ \
|
||||
bg_name_list[bg_list_index] = name; \
|
||||
bg_list_index += 1; \
|
||||
} \
|
||||
bg_name_dirty[name] |= (1 << ((addr >> 2) & 0x07)); \
|
||||
}
|
||||
|
||||
/* Tables that define the playfield layout */
|
||||
uint8 shift_table[] = {6, 7, 0, 8};
|
||||
uint8 col_mask_table[] = {0x1F, 0x3F, 0x1F, 0x7F};
|
||||
uint16 row_mask_table[] = {0x0FF, 0x1FF, 0x2FF, 0x3FF};
|
||||
uint32 y_mask_table[] = {0x1FC0, 0x1FC0, 0x1F80, 0x1F00};
|
||||
|
||||
uint8 sat[0x400]; /* Internal copy of sprite attribute table */
|
||||
//uint8 vram[0x10000]; /* Video RAM (64Kx8) */
|
||||
uint8 cram[0x80]; /* On-chip color RAM (64x9) */
|
||||
uint8 vsram[0x80]; /* On-chip vertical scroll RAM (40x11) */
|
||||
uint8 reg[0x20]; /* Internal VDP registers (23x8) */
|
||||
uint16 addr; /* Address register */
|
||||
uint16 addr_latch; /* Latched A15, A14 of address */
|
||||
uint8 code; /* Code register */
|
||||
uint8 pending; /* Pending write flag */
|
||||
uint16 buffer; /* Read buffer */
|
||||
uint16 status; /* VDP status flags */
|
||||
uint16 ntab; /* Name table A base address */
|
||||
uint16 ntbb; /* Name table B base address */
|
||||
uint16 ntwb; /* Name table W base address */
|
||||
uint16 satb; /* Sprite attribute table base address */
|
||||
uint16 hscb; /* Horizontal scroll table base address */
|
||||
uint16 sat_base_mask; /* Base bits of SAT */
|
||||
uint16 sat_addr_mask; /* Index bits of SAT */
|
||||
uint8 is_color_dirty; /* 1= One or more colors have changed */
|
||||
uint8 color_dirty[0x40]; /* 1= This color is dirty */
|
||||
uint8 border; /* Border color index */
|
||||
uint8 is_border_dirty; /* 1= The border color has changed */
|
||||
//uint8 bg_name_dirty[0x800]; /* 1= This pattern is dirty */
|
||||
//uint16 bg_name_list[0x800]; /* List of modified pattern indices */
|
||||
uint16 bg_list_index; /* # of modified patterns in list */
|
||||
//uint8 bg_pattern_cache[0x80000];/* Cached and flipped patterns */
|
||||
uint8 playfield_shift; /* Width of planes A, B (in bits) */
|
||||
uint8 playfield_col_mask; /* Vertical scroll mask */
|
||||
uint16 playfield_row_mask; /* Horizontal scroll mask */
|
||||
uint32 y_mask; /* Name table Y-index bits mask */
|
||||
int hint_pending; /* 0= Line interrupt is pending */
|
||||
int vint_pending; /* 1= Frame interrupt is pending */
|
||||
int counter; /* Raster counter */
|
||||
int dma_fill; /* 1= DMA fill has been requested */
|
||||
int im2_flag; /* 1= Interlace mode 2 is being used */
|
||||
int frame_end; /* End-of-frame (IRQ line) */
|
||||
int v_counter; /* VDP scan line counter */
|
||||
int v_update; /* 1= VC was updated by a ctrl or HV read */
|
||||
void (*color_update)(int index, uint16 data);
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* Init, reset, shutdown functions */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
void vdp_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void vdp_reset(void)
|
||||
{
|
||||
memset(sat, 0, sizeof(sat));
|
||||
memset(vram, 0, VRAM_SIZE);
|
||||
memset(cram, 0, sizeof(cram));
|
||||
memset(vsram, 0, sizeof(vsram));
|
||||
memset(reg, 0, sizeof(reg));
|
||||
|
||||
addr = addr_latch = code = pending = buffer = status = 0;
|
||||
ntab = ntbb = ntwb = satb = hscb = 0;
|
||||
sat_base_mask = 0xFE00;
|
||||
sat_addr_mask = 0x01FF;
|
||||
|
||||
/* Mark all colors as dirty to force a palette update */
|
||||
is_color_dirty = 1;
|
||||
memset(color_dirty, 1, 0x40);
|
||||
border = 0x00;
|
||||
is_border_dirty = 1;
|
||||
|
||||
memset(bg_name_dirty, 0, BGNAMEDIRTY_SIZE);
|
||||
memset(bg_name_list, 0, BGNAME_SIZE);
|
||||
bg_list_index = 0;
|
||||
memset(bg_pattern_cache, 0, BGPATTERN_CACH_SIZE);
|
||||
|
||||
playfield_shift = 6;
|
||||
playfield_col_mask = 0x1F;
|
||||
playfield_row_mask = 0x0FF;
|
||||
y_mask = 0x1FC0;
|
||||
|
||||
hint_pending = vint_pending = 0;
|
||||
counter = 0;
|
||||
frame_end = 0xE0;
|
||||
v_counter = v_update = 0;
|
||||
|
||||
/* Initialize viewport */
|
||||
gbitmap.viewport.x = 0x20;
|
||||
gbitmap.viewport.y = 0x20;
|
||||
gbitmap.viewport.w = 256;
|
||||
gbitmap.viewport.h = 224;
|
||||
gbitmap.viewport.oh = 256;
|
||||
gbitmap.viewport.ow = 224;
|
||||
gbitmap.viewport.changed = 1;
|
||||
}
|
||||
|
||||
void vdp_shutdown(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* Memory access functions */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
||||
void vdp_ctrl_w(uint16 data)
|
||||
{
|
||||
if(pending == 0)
|
||||
{
|
||||
if((data & 0xC000) == 0x8000)
|
||||
{
|
||||
uint8 r = (data >> 8) & 0x1F;
|
||||
uint8 d = (data >> 0) & 0xFF;
|
||||
vdp_reg_w(r, d);
|
||||
}
|
||||
else
|
||||
{
|
||||
pending = 1;
|
||||
}
|
||||
|
||||
addr = ((addr_latch & 0xC000) | (data & 0x3FFF)) & 0xFFFF;
|
||||
code = ((code & 0x3C) | ((data >> 14) & 0x03)) & 0x3F;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear pending flag */
|
||||
pending = 0;
|
||||
|
||||
/* Update address and code registers */
|
||||
addr = ((addr & 0x3FFF) | ((data & 3) << 14)) & 0xFFFF;
|
||||
code = ((code & 0x03) | ((data >> 2) & 0x3C)) & 0x3F;
|
||||
|
||||
/* Save address bits A15 and A14 */
|
||||
addr_latch = (addr & 0xC000);
|
||||
|
||||
if((code & 0x20) && (reg[1] & 0x10))
|
||||
{
|
||||
switch(reg[23] & 0xC0)
|
||||
{
|
||||
case 0x00: /* V bus to VDP DMA */
|
||||
case 0x40: /* V bus to VDP DMA */
|
||||
dma_vbus();
|
||||
break;
|
||||
|
||||
case 0x80: /* VRAM fill */
|
||||
dma_fill = 1;
|
||||
break;
|
||||
|
||||
case 0xC0: /* VRAM copy */
|
||||
dma_copy();
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
uint16 vdp_ctrl_r(void)
|
||||
{
|
||||
#if 0
|
||||
int cycles = m68k_cycles_run();
|
||||
uint16 temp = status;
|
||||
|
||||
/* Clear pending flag */
|
||||
pending = 0;
|
||||
|
||||
/* VBlank flag is set when the screen is disabled */
|
||||
if((reg[1] & 0x40) == 0x00)
|
||||
{
|
||||
temp |= 0x0008;
|
||||
}
|
||||
|
||||
/* Clear collision flag on reads */
|
||||
status &= ~0x0020;
|
||||
|
||||
/* Set HBlank flag based on H counter */
|
||||
if(reg[12] & 1)
|
||||
{
|
||||
int hc = cycle2hc40[(cycles % 487)];
|
||||
if((hc >= 0xB6) && (hc <= 0xFF)) temp |= 0x0004;
|
||||
}
|
||||
else
|
||||
{
|
||||
int hc = cycle2hc32[(cycles % 487)];
|
||||
if((hc >= 0x93) && (hc <= 0xFF)) temp |= 0x0004;
|
||||
}
|
||||
|
||||
/* Flag FIFO as empty */
|
||||
temp |= 0x0200;
|
||||
|
||||
/* Clear unused bits */
|
||||
temp &= 0x03FF;
|
||||
|
||||
return (temp);
|
||||
#else
|
||||
uint16 temp = (0x4e71 & 0xFC00);
|
||||
pending = 0;
|
||||
status &= ~0x0020; // clear sprite hit flag on reads
|
||||
status |= 0x0200; // fifo empty
|
||||
status ^= 0x0004; /* hack (red zone) */
|
||||
temp |= (status & 0x03BF); // clear spr over
|
||||
return (temp);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void vdp_data_w(uint16 data)
|
||||
{
|
||||
/* Clear pending flag */
|
||||
pending = 0;
|
||||
|
||||
switch(code & 0x0F)
|
||||
{
|
||||
case 0x01: /* VRAM */
|
||||
/* Byte-swap data if A0 is set */
|
||||
if(addr & 1) data = (data >> 8) | (data << 8);
|
||||
|
||||
/* Copy SAT data to the internal SAT */
|
||||
if((addr & sat_base_mask) == satb)
|
||||
{
|
||||
*(uint16 *)&sat[addr & sat_addr_mask] = data;
|
||||
}
|
||||
|
||||
/* Only write unique data to VRAM */
|
||||
if(data != *(uint16 *)&vram[addr & 0xFFFE])
|
||||
{
|
||||
/* Write data to VRAM */
|
||||
*(uint16 *)&vram[addr & 0xFFFE] = data;
|
||||
|
||||
/* Update the pattern cache */
|
||||
MARK_BG_DIRTY(addr);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x03: /* CRAM */
|
||||
{
|
||||
uint16 *p = (uint16 *)&cram[(addr & 0x7E)];
|
||||
data &= 0x0EEE;
|
||||
if(data != *p)
|
||||
{
|
||||
int index = (addr >> 1) & 0x3F;
|
||||
*p = PACK_CRAM(data);
|
||||
|
||||
if((index & 0x0F) != 0x00)
|
||||
{
|
||||
color_dirty[index] = is_color_dirty = 1;
|
||||
}
|
||||
|
||||
if(index == border)
|
||||
{
|
||||
is_border_dirty = 1;
|
||||
if(color_update)
|
||||
{
|
||||
color_update(0x00, *p);
|
||||
color_update(0x40, *p);
|
||||
color_update(0x80, *p);
|
||||
}
|
||||
}
|
||||
|
||||
if(color_update) color_update(index, *p);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x05: /* VSRAM */
|
||||
*(uint16 *)&vsram[(addr & 0x7E)] = data;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Bump address register */
|
||||
addr += reg[15];
|
||||
|
||||
if(dma_fill)
|
||||
{
|
||||
int length = (reg[20] << 8 | reg[19]) & 0xFFFF;
|
||||
if(!length) length = 0x10000;
|
||||
|
||||
do {
|
||||
vram[(addr & 0xFFFF)] = (data >> 8) & 0xFF;
|
||||
MARK_BG_DIRTY(addr);
|
||||
addr += reg[15];
|
||||
} while(--length);
|
||||
dma_fill = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
uint16 vdp_data_r(void)
|
||||
{
|
||||
uint16 temp = 0;
|
||||
|
||||
/* Clear pending flag */
|
||||
pending = 0;
|
||||
|
||||
switch(code & 0x0F)
|
||||
{
|
||||
case 0x00: /* VRAM */
|
||||
temp = *(uint16 *)&vram[(addr & 0xFFFE)];
|
||||
break;
|
||||
|
||||
case 0x08: /* CRAM */
|
||||
temp = *(uint16 *)&cram[(addr & 0x7E)];
|
||||
temp = UNPACK_CRAM(temp);
|
||||
break;
|
||||
|
||||
case 0x04: /* VSRAM */
|
||||
temp = *(uint16 *)&vsram[(addr & 0x7E)];
|
||||
break;
|
||||
}
|
||||
|
||||
/* Bump address register */
|
||||
addr += reg[15];
|
||||
|
||||
/* return data */
|
||||
return (temp);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
The reg[] array is updated at the *end* of this function, so the new
|
||||
register data can be compared with the previous data.
|
||||
*/
|
||||
void vdp_reg_w(uint8 r, uint8 d)
|
||||
{
|
||||
switch(r)
|
||||
{
|
||||
case 0x00: /* CTRL #1 */
|
||||
|
||||
if(hint_pending)
|
||||
{
|
||||
if(d & 0x10)
|
||||
{
|
||||
m68k_set_irq(4);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Cancel pending level 4 interrupt */
|
||||
m68k_set_irq(0);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x01: /* CTRL #2 */
|
||||
|
||||
if(vint_pending)
|
||||
{
|
||||
if(d & 0x20)
|
||||
{
|
||||
m68k_set_irq(6);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Cancel pending level 6 interrupt */
|
||||
m68k_set_irq(0);
|
||||
}
|
||||
}
|
||||
|
||||
/* Change the frame timing */
|
||||
frame_end = (d & 8) ? 0xF0 : 0xE0;
|
||||
|
||||
/* Check if the viewport height has actually been changed */
|
||||
if((reg[1] & 8) != (d & 8))
|
||||
{
|
||||
/* Update the height of the viewport */
|
||||
gbitmap.viewport.oh = gbitmap.viewport.h;
|
||||
gbitmap.viewport.h = (d & 8) ? 240 : 224;
|
||||
gbitmap.viewport.changed = 1;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x02: /* NTAB */
|
||||
ntab = (d << 10) & 0xE000;
|
||||
break;
|
||||
|
||||
case 0x03: /* NTWB */
|
||||
ntwb = (d << 10) & 0xF800;
|
||||
if(reg[12] & 1) ntwb &= 0xF000;
|
||||
break;
|
||||
|
||||
case 0x04: /* NTBB */
|
||||
ntbb = (d << 13) & 0xE000;
|
||||
break;
|
||||
|
||||
case 0x05: /* SATB */
|
||||
sat_base_mask = (reg[12] & 1) ? 0xFC00 : 0xFE00;
|
||||
sat_addr_mask = (reg[12] & 1) ? 0x03FF : 0x01FF;
|
||||
satb = (d << 9) & sat_base_mask;
|
||||
break;
|
||||
|
||||
case 0x07:
|
||||
d &= 0x3F;
|
||||
|
||||
/* Check if the border color has actually changed */
|
||||
if(border != d)
|
||||
{
|
||||
/* Mark the border color as modified */
|
||||
border = d;
|
||||
is_border_dirty = 1;
|
||||
if(color_update)
|
||||
{
|
||||
color_update(0x00, *(uint16 *)&cram[(border << 1)]);
|
||||
color_update(0x40, *(uint16 *)&cram[(border << 1)]);
|
||||
color_update(0x80, *(uint16 *)&cram[(border << 1)]);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x0C:
|
||||
|
||||
/* Check if the viewport width has actually been changed */
|
||||
if((reg[0x0C] & 1) != (d & 1))
|
||||
{
|
||||
/* Update the width of the viewport */
|
||||
gbitmap.viewport.ow = gbitmap.viewport.w;
|
||||
gbitmap.viewport.w = (d & 1) ? 320 : 256;
|
||||
gbitmap.viewport.changed = 1;
|
||||
}
|
||||
|
||||
/* See if the S/TE mode bit has changed */
|
||||
if((reg[0x0C] & 8) != (d & 8))
|
||||
{
|
||||
int i;
|
||||
reg[0x0C] = d;
|
||||
|
||||
/* Update colors */
|
||||
if(color_update)
|
||||
{
|
||||
for(i = 0; i < 0x40; i += 1)
|
||||
{
|
||||
color_update(i, *(uint16 *)&cram[i << 1]);
|
||||
}
|
||||
color_update(0x00, *(uint16 *)&cram[border << 1]);
|
||||
color_update(0x40, *(uint16 *)&cram[border << 1]);
|
||||
color_update(0x80, *(uint16 *)&cram[border << 1]);
|
||||
}
|
||||
/* Flush palette */
|
||||
is_color_dirty = is_border_dirty = 1;
|
||||
memset(color_dirty, 1, 0x40);
|
||||
}
|
||||
|
||||
/* Check interlace mode 2 setting */
|
||||
im2_flag = ((d & 0x06) == 0x06) ? 1 : 0;
|
||||
|
||||
/* The following register updates check this value */
|
||||
reg[0x0C] = d;
|
||||
|
||||
/* Update display-dependant registers */
|
||||
vdp_reg_w(0x03, reg[0x03]);
|
||||
vdp_reg_w(0x05, reg[0x05]);
|
||||
|
||||
break;
|
||||
|
||||
case 0x0D: /* HSCB */
|
||||
hscb = (d << 10) & 0xFC00;
|
||||
break;
|
||||
|
||||
case 0x10: /* Playfield size */
|
||||
playfield_shift = shift_table[(d & 3)];
|
||||
playfield_col_mask = col_mask_table[(d & 3)];
|
||||
playfield_row_mask = row_mask_table[(d >> 4) & 3];
|
||||
y_mask = y_mask_table[(d & 3)];
|
||||
break;
|
||||
}
|
||||
|
||||
/* Write new register value */
|
||||
reg[r] = d;
|
||||
}
|
||||
|
||||
|
||||
uint16 vdp_hvc_r(void)
|
||||
{
|
||||
int cycles = m68k_cycles_run();
|
||||
uint8 *hctab = (reg[12] & 1) ? cycle2hc40 : cycle2hc32;
|
||||
int vc = vc28[v_counter];
|
||||
int hc = hctab[(cycles % 487)];
|
||||
return (vc << 8 | hc);
|
||||
}
|
||||
|
||||
/*
|
||||
VRAM to VRAM copy
|
||||
Read byte from VRAM (source), write to VRAM (addr),
|
||||
bump source and add r15 to addr.
|
||||
|
||||
- see how source addr is affected
|
||||
(can it make high source byte inc?)
|
||||
*/
|
||||
void dma_copy(void)
|
||||
{
|
||||
int length = (reg[20] << 8 | reg[19]) & 0xFFFF;
|
||||
int source = (reg[22] << 8 | reg[21]) & 0xFFFF;
|
||||
if(!length) length = 0x10000;
|
||||
|
||||
do {
|
||||
uint8 temp = vram[source];
|
||||
vram[addr] = temp;
|
||||
MARK_BG_DIRTY(addr);
|
||||
source = (source + 1) & 0xFFFF;
|
||||
addr = (addr + reg[15]) & 0xFFFF;
|
||||
} while (--length);
|
||||
|
||||
reg[19] = (length >> 0) & 0xFF;
|
||||
reg[20] = (length >> 8) & 0xFF;
|
||||
}
|
||||
|
||||
|
||||
void dma_vbus(void)
|
||||
{
|
||||
uint32 base, source = ((reg[23] & 0x7F) << 17 | reg[22] << 9 | reg[21] << 1) & 0xFFFFFE;
|
||||
uint32 length = (reg[20] << 8 | reg[19]) & 0xFFFF;
|
||||
|
||||
if(!length) length = 0x10000;
|
||||
base = source;
|
||||
|
||||
do {
|
||||
uint16 temp = vdp_dma_r(source);
|
||||
source += 2;
|
||||
source = ((base & 0xFE0000) | (source & 0x1FFFF));
|
||||
vdp_data_w(temp);
|
||||
} while (--length);
|
||||
|
||||
reg[19] = (length >> 0) & 0xFF;
|
||||
reg[20] = (length >> 8) & 0xFF;
|
||||
|
||||
reg[21] = (source >> 1) & 0xFF;
|
||||
reg[22] = (source >> 9) & 0xFF;
|
||||
reg[23] = (reg[23] & 0x80) | ((source >> 17) & 0x7F);
|
||||
}
|
||||
|
||||
|
||||
void vdp_test_w(uint16 value)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
|
||||
#ifndef _VDP_H_
|
||||
#define _VDP_H_
|
||||
|
||||
/* Global variables */
|
||||
extern uint8 sat[0x400];
|
||||
//extern uint8 vram[0x10000];
|
||||
extern uint8 cram[0x80];
|
||||
extern uint8 vsram[0x80];
|
||||
extern uint8 reg[0x20];
|
||||
extern uint16 status;
|
||||
extern uint16 ntab;
|
||||
extern uint16 ntbb;
|
||||
extern uint16 ntwb;
|
||||
extern uint16 satb;
|
||||
extern uint16 hscb;
|
||||
extern uint8 is_color_dirty;
|
||||
extern uint8 color_dirty[0x40];
|
||||
extern uint8 border;
|
||||
extern uint8 is_border_dirty;
|
||||
//extern uint8 bg_name_dirty[0x800];
|
||||
//extern uint16 bg_name_list[0x800];
|
||||
extern uint16 bg_list_index;
|
||||
//extern uint8 bg_pattern_cache[0x80000];
|
||||
extern uint8 playfield_shift;
|
||||
extern uint8 playfield_col_mask;
|
||||
extern uint16 playfield_row_mask;
|
||||
extern uint32 y_mask;
|
||||
extern int vint_pending;
|
||||
extern int hint_pending;
|
||||
extern int scanline;
|
||||
extern int counter;
|
||||
extern int im2_flag;
|
||||
extern int frame_end;
|
||||
extern int v_counter, v_update;
|
||||
|
||||
extern void (*color_update)(int index, uint16 data);
|
||||
|
||||
/* Function prototypes */
|
||||
void vdp_init(void);
|
||||
void vdp_reset(void);
|
||||
void vdp_shutdown(void);
|
||||
void vdp_ctrl_w(uint16 data);
|
||||
uint16 vdp_ctrl_r(void);
|
||||
void vdp_data_w(uint16 data);
|
||||
uint16 vdp_data_r(void);
|
||||
void vdp_reg_w(uint8 r, uint8 d);
|
||||
uint16 vdp_hvc_r(void);
|
||||
void dma_copy(void);
|
||||
void dma_vbus(void);
|
||||
void vdp_test_w(uint16 value);
|
||||
|
||||
#endif /* _VDP_H_ */
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
Wrapping class to extend VGA_T4 to TFT_T_DMA
|
||||
*/
|
||||
|
||||
#ifndef _VGA_T_DMAH_
|
||||
#define _VGA_T_DMAH_
|
||||
|
||||
#ifdef __cplusplus
|
||||
#include <VGA_t4.h>
|
||||
#endif
|
||||
|
||||
|
||||
#define RGBVAL16(r,g,b) ( (((r>>5)&0x07)<<5) | (((g>>5)&0x07)<<2) | (((b>>6)&0x3)<<0) )
|
||||
#define RGBVAL8(r,g,b) ( (((r>>5)&0x07)<<5) | (((g>>5)&0x07)<<2) | (((b>>6)&0x3)<<0) )
|
||||
|
||||
|
||||
|
||||
|
||||
#define TFT_WIDTH 320
|
||||
#define TFT_REALWIDTH 320
|
||||
|
||||
#define TFT_HEIGHT 240
|
||||
#define TFT_REALHEIGHT 240
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
class TFT_T_DMA: public VGA_T4
|
||||
{
|
||||
public:
|
||||
// Fake touch screen functions
|
||||
bool isTouching(void) { return false; }
|
||||
void readRaw(uint16_t * oX, uint16_t * oY, uint16_t * oZ) { }
|
||||
void readCal(uint16_t * oX, uint16_t * oY, uint16_t * oZ) { };
|
||||
void callibrateTouch(uint16_t xMin,uint16_t yMin,uint16_t xMax,uint16_t yMax) { }
|
||||
|
||||
// fake DMA functions
|
||||
void startDMA(void) { };
|
||||
void stopDMA(void) { };
|
||||
|
||||
// fake no DMA functions
|
||||
void writeScreenNoDma(const vga_pixel *pcolors) { writeScreen(pcolors); }
|
||||
void fillScreenNoDma(vga_pixel color) { clear(color); }
|
||||
void drawTextNoDma(int16_t x, int16_t y, const char * text, vga_pixel fgcolor, vga_pixel bgcolor, bool doublesize) { drawText(x,y,text,fgcolor,bgcolor,doublesize); }
|
||||
void drawRectNoDma(int16_t x, int16_t y, int16_t w, int16_t h, vga_pixel color) { drawRect(x, y, w, h, color); }
|
||||
void drawSpriteNoDma(int16_t x, int16_t y, const uint16_t *bitmap) { drawSprite(x, y, bitmap); }
|
||||
void drawSpriteNoDma(int16_t x, int16_t y, const uint16_t *bitmap, uint16_t croparx, uint16_t cropary, uint16_t croparw, uint16_t croparh) { drawSprite(x, y, bitmap, croparx, cropary, croparw, croparh); }
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -0,0 +1,62 @@
|
|||
#ifndef Z80_H
|
||||
#define Z80_H
|
||||
|
||||
#include "cpuintrf.h"
|
||||
#include "osd_cpu.h"
|
||||
|
||||
enum {
|
||||
Z80_PC=1, Z80_SP, Z80_AF, Z80_BC, Z80_DE, Z80_HL,
|
||||
Z80_IX, Z80_IY, Z80_AF2, Z80_BC2, Z80_DE2, Z80_HL2,
|
||||
Z80_R, Z80_I, Z80_IM, Z80_IFF1, Z80_IFF2, Z80_HALT,
|
||||
Z80_NMI_STATE, Z80_IRQ_STATE, Z80_DC0, Z80_DC1, Z80_DC2, Z80_DC3
|
||||
};
|
||||
|
||||
enum {
|
||||
Z80_TABLE_op,
|
||||
Z80_TABLE_cb,
|
||||
Z80_TABLE_ed,
|
||||
Z80_TABLE_xy,
|
||||
Z80_TABLE_xycb,
|
||||
Z80_TABLE_ex /* cycles counts for taken jr/jp/call and interrupt latency (rst opcodes) */
|
||||
};
|
||||
|
||||
extern int z80_ICount; /* T-state count */
|
||||
|
||||
#define Z80_IGNORE_INT -1 /* Ignore interrupt */
|
||||
#define Z80_NMI_INT -2 /* Execute NMI */
|
||||
#define Z80_IRQ_INT -1000 /* Execute IRQ */
|
||||
|
||||
extern void z80_reset (void *param);
|
||||
extern void z80_exit (void);
|
||||
extern void z80_end_timeslice(void);
|
||||
extern int z80_execute(int cycles);
|
||||
extern void z80_burn(int cycles);
|
||||
extern unsigned z80_get_context (void *dst);
|
||||
extern void z80_set_context (void *src);
|
||||
extern void *z80_get_cycle_table (int which);
|
||||
extern void z80_set_cycle_table (int which, void *new_tbl);
|
||||
extern unsigned z80_get_pc (void);
|
||||
extern void z80_set_pc (unsigned val);
|
||||
extern unsigned z80_get_sp (void);
|
||||
extern void z80_set_sp (unsigned val);
|
||||
extern unsigned z80_get_reg (int regnum);
|
||||
extern void z80_set_reg (int regnum, unsigned val);
|
||||
extern void z80_set_nmi_line(int state);
|
||||
extern void z80_set_irq_line(int irqline, int state);
|
||||
extern void z80_set_irq_callback(int (*irq_callback)(int));
|
||||
extern void z80_state_save(void *file);
|
||||
extern void z80_state_load(void *file);
|
||||
extern const char *z80_info(void *context, int regnum);
|
||||
extern unsigned z80_dasm(char *buffer, unsigned pc);
|
||||
|
||||
#ifdef MAME_DEBUG
|
||||
extern unsigned DasmZ80(char *buffer, unsigned pc);
|
||||
#endif
|
||||
|
||||
unsigned int cpu_readport16(unsigned int port);
|
||||
void cpu_writeport16(unsigned int port, unsigned int data);
|
||||
unsigned int cpu_readmem16(unsigned int address);
|
||||
void cpu_writemem16(unsigned int address, unsigned int data);
|
||||
|
||||
#endif
|
||||
|
||||
Plik diff jest za duży
Load Diff
|
|
@ -1,125 +0,0 @@
|
|||
const uint16_t logo[] PROGMEM = {
|
||||
0x0140,0x007c,0x632c,0xbdd7,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce79,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce79,0xce79,0xce59,0xa514,0x2104,
|
||||
0xbdf7,0xd69a,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xdefb,0x9cd3,
|
||||
0xce79,0xce59,0xce79,0xce59,0xce79,0xce79,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce79,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce79,0xce59,0xce79,0xce79,0xce59,0xce59,0xce79,0xce79,0xce79,0xce79,0xce59,0xce79,0xce59,0xce79,0xce79,0xce79,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce79,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce79,0xce79,0xce59,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce79,0xce79,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce79,0xce79,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce79,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce59,0xce79,0xce59,0xce59,0xce79,0xce59,0xce79,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce59,0xce79,0xce79,0xce79,0xce79,0xce59,0xce59,0xce79,0xce79,0xce59,0xce59,0xce79,0xce79,0xce59,0xce79,0xce59,0xce79,0xce59,0xd69a,0xbdf7,
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||||
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Ładowanie…
Reference in New Issue