kopia lustrzana https://github.com/Jean-MarcHarvengt/MCUME
716 wiersze
22 KiB
C
716 wiersze
22 KiB
C
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#include "shared.h"
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unsigned int m68k_read_bus_8(unsigned int address)
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{
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uint16 temp = m68k_read_bus_16(address);
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return ((address & 1) ? (temp & 0xFF) : (temp >> 8));
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}
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unsigned int m68k_read_bus_16(unsigned int address)
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{
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uint16 temp = 0x4e71;
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if(address >= 0xC00000)
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{
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return (temp);
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}
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else
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{
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return (temp & 0xFF00);
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}
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}
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void m68k_unused_w(unsigned int address, unsigned int value)
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{
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//error("Unused %08X = %08X (%08X)\n", address, value, Turbo68KReadPC());
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}
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void m68k_unused_8_w(unsigned int address, unsigned int value)
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{
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//error("Unused %08X = %02X (%08X)\n", address, value, Turbo68KReadPC());
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}
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void m68k_unused_16_w(unsigned int address, unsigned int value)
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{
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//error("Unused %08X = %04X (%08X)\n", address, value, Turbo68KReadPC());
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}
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/*
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Functions to handle memory accesses which cause the Genesis to halt
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either temporarily (press RESET button to restart) or unrecoverably
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(cycle power to restart).
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*/
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void m68k_lockup_w_8(unsigned int address, unsigned int value)
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{
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error("Lockup %08X = %02X (%08X)\n", address, value, m68k_get_reg(NULL, M68K_REG_PC));
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gen_running = 0;
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m68k_end_timeslice();
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}
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void m68k_lockup_w_16(unsigned int address, unsigned int value)
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{
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error("Lockup %08X = %04X (%08X)\n", address, value, m68k_get_reg(NULL, M68K_REG_PC));
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gen_running = 0;
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m68k_end_timeslice();
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}
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unsigned int m68k_lockup_r_8(unsigned int address)
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{
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error("Lockup %08X.b (%08X)\n", address, m68k_get_reg(NULL, M68K_REG_PC));
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gen_running = 0;
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m68k_end_timeslice();
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return -1;
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}
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unsigned int m68k_lockup_r_16(unsigned int address)
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{
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error("Lockup %08X.w (%08X)\n", address, m68k_get_reg(NULL, M68K_REG_PC));
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gen_running = 0;
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m68k_end_timeslice();
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return -1;
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}
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/*--------------------------------------------------------------------------*/
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/* 68000 memory handlers */
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/*--------------------------------------------------------------------------*/
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unsigned int m68k_read_memory_8(unsigned int address)
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{
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switch((address >> 21) & 7)
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{
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case 0: /* ROM */
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case 1:
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return readb_swap_rom(address);
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case 7: /* RAM */
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return READ_BYTE(work_ram, address & 0xFFFF);
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case 5: /* Z80 & I/O */
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if(address <= 0xA0FFFF)
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{
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if(zbusack == 1)
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{
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/* Z80 controls Z bus */
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return (m68k_read_bus_8(address));
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}
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else
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{
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/* Read data from Z bus */
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switch(address & 0x6000)
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{
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case 0x0000: /* RAM */
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case 0x2000:
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return (zram[(address & 0x1FFF)]);
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case 0x4000: /* YM2612 */
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return (fm_read(address & 3));
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case 0x6000: /* Unused */
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switch(address & 0xFF00)
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{
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case 0x7F00: /* VDP */
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m68k_lockup_r_8(address);
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default: /* Unused */
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return (0xFF);
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}
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break;
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}
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}
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}
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else
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{
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switch((address >> 8) & 0xFF)
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{
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case 0x00: /* I/O CHIP */
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if(address <= 0xA1001F)
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{
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return (gen_io_r((address >> 1) & 0x0F));
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}
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else
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{
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return (m68k_read_bus_8(address));
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}
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break;
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case 0x10: /* MEMORY MODE */
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return (m68k_read_bus_8(address));
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case 0x11: /* BUSACK */
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if((address & 1) == 0)
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{
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return (gen_busack_r() | (m68k_read_bus_8(address) & 0xFE));
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}
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else
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return (m68k_read_bus_8(address));
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case 0x12: /* RESET */
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return (m68k_read_bus_8(address));
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case 0x13: /* TIME */
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return (m68k_read_bus_8(address));
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case 0x20: /* UNKNOWN */
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return (m68k_read_bus_8(address));
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case 0x30: /* UNKNOWN */
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return (m68k_read_bus_8(address));
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default: /* Unused */
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return (m68k_lockup_r_8(address));
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}
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}
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break;
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case 6: /* VDP */
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if((address & 0xE700E0) == 0xC00000)
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{
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switch(address & 0x1F)
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{
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case 0x00: /* DATA */
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case 0x02:
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return (vdp_data_r() >> 8);
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case 0x01: /* DATA */
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case 0x03:
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return (vdp_data_r() & 0xFF);
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case 0x04: /* CTRL */
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case 0x06:
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return ((m68k_read_bus_8(address) & 0xFC) | (vdp_ctrl_r() >> 8));
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case 0x05: /* CTRL */
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case 0x07:
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return (vdp_ctrl_r() & 0xFF);
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case 0x08: /* HVC */
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case 0x0A:
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case 0x0C:
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case 0x0E:
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return (vdp_hvc_r() >> 8);
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case 0x09: /* HVC */
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case 0x0B:
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case 0x0D:
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case 0x0F:
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return (vdp_hvc_r() & 0xFF);
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case 0x10: /* PSG */
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case 0x11:
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case 0x12:
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case 0x13:
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case 0x14:
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case 0x15:
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case 0x16:
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case 0x17:
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return (m68k_lockup_r_8(address));
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case 0x18: /* Unused */
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case 0x19:
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case 0x1A:
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case 0x1B:
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case 0x1C:
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case 0x1D:
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case 0x1E:
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case 0x1F:
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return (m68k_read_bus_8(address));
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}
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}
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else
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{
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/* Unused */
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return (m68k_lockup_r_8(address));
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}
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break;
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case 2: /* Unused */
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case 3:
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return (m68k_read_bus_8(address));
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case 4: /* Unused */
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return (m68k_lockup_r_8(address));
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}
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return -1;
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}
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unsigned int m68k_read_memory_16(unsigned int address)
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{
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switch((address >> 21) & 7)
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{
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case 0: /* ROM */
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case 1:
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return readw_swap_rom(address);
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case 7: /* RAM */
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return READ_WORD(work_ram, address & 0xFFFF);
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case 5: /* Z80 & I/O */
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if(address <= 0xA0FFFF)
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{
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if(zbusack == 1)
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{
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return (m68k_read_bus_16(address));
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}
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else
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{
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uint8 temp;
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switch(address & 0x6000)
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{
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case 0x0000: /* RAM */
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case 0x2000:
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temp = zram[address & 0x1FFF];
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return (temp << 8 | temp);
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case 0x4000: /* YM2612 */
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temp = fm_read(address & 3);
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return (temp << 8 | temp);
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case 0x6000:
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switch(address & 0xFF00)
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{
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case 0x7F00: /* VDP */
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m68k_lockup_r_16(address);
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default: /* Unused */
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return (0xFFFF);
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}
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break;
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}
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}
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}
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else
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{
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if(address <= 0xA1001F)
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{
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uint8 temp = gen_io_r((address >> 1) & 0x0F);
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return (temp << 8 | temp);
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}
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else
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{
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switch((address >> 8) & 0xFF)
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{
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case 0x10: /* MEMORY MODE */
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return (m68k_read_bus_16(address));
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case 0x11: /* BUSACK */
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return ((m68k_read_bus_16(address) & 0xFEFF) | (gen_busack_r() << 8));
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case 0x12: /* RESET */
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return (m68k_read_bus_16(address));
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case 0x13: /* TIME */
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return (m68k_read_bus_16(address));
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case 0x20: /* UNKNOWN */
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return (m68k_read_bus_16(address));
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case 0x30: /* UNKNOWN */
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return (m68k_read_bus_16(address));
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default: /* Unused */
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return (m68k_lockup_r_16(address));
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}
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}
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}
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break;
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case 6:
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if((address & 0xE700E0) == 0xC00000)
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{
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switch(address & 0x1F)
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{
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case 0x00: /* DATA */
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case 0x02:
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return (vdp_data_r());
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case 0x04: /* CTRL */
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case 0x06:
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return (vdp_ctrl_r() | (m68k_read_bus_16(address) & 0xFC00));
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case 0x08: /* HVC */
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case 0x0A:
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case 0x0C:
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case 0x0E:
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return (vdp_hvc_r());
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case 0x10: /* PSG */
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case 0x12:
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case 0x14:
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case 0x16:
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return (m68k_lockup_r_16(address));
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case 0x18: /* Unused */
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case 0x1A:
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case 0x1C:
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case 0x1E:
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return (m68k_read_bus_16(address));
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}
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}
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else
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{
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return (m68k_lockup_r_16(address));
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}
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break;
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case 2:
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case 3:
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return (m68k_read_bus_16(address));
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case 4:
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return (m68k_lockup_r_16(address));
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}
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return (0xA5A5);
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}
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unsigned int m68k_read_memory_32(unsigned int address)
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{
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/* Split into 2 reads */
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return (m68k_read_memory_16(address + 0) << 16 | m68k_read_memory_16(address + 2));
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}
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void m68k_write_memory_8(unsigned int address, unsigned int value)
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{
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switch((address >> 21) & 7)
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{
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case 7:
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WRITE_BYTE(work_ram, address & 0xFFFF, value);
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return;
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case 6:
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if((address & 0xE700E0) == 0xC00000)
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{
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switch(address & 0x1F)
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{
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case 0x00: /* DATA */
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case 0x01:
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case 0x02:
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case 0x03:
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vdp_data_w(value << 8 | value);
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return;
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case 0x04: /* CTRL */
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case 0x05:
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case 0x06:
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case 0x07:
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vdp_ctrl_w(value << 8 | value);
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return;
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case 0x08: /* HVC */
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case 0x09:
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case 0x0A:
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case 0x0B:
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case 0x0C:
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case 0x0D:
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case 0x0E:
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case 0x0F:
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m68k_lockup_w_8(address, value);
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return;
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case 0x10: /* PSG */
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case 0x12:
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case 0x14:
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case 0x16:
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m68k_unused_8_w(address, value);
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return;
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case 0x11: /* PSG */
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case 0x13:
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case 0x15:
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case 0x17:
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psg_write(value);
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return;
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case 0x18: /* Unused */
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case 0x19:
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case 0x1A:
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case 0x1B:
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case 0x1C:
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case 0x1D:
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case 0x1E:
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case 0x1F:
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m68k_unused_8_w(address, value);
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return;
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}
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}
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else
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{
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m68k_lockup_w_8(address, value);
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return;
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}
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case 5:
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if(address <= 0xA0FFFF)
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{
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if(zbusack == 1)
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{
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m68k_unused_8_w(address, value);
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return;
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}
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else
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{
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switch(address & 0x6000)
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{
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case 0x0000:
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case 0x2000:
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zram[(address & 0x1FFF)] = value;
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return;
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case 0x4000:
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fm_write(address & 3, value);
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return;
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case 0x6000:
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switch(address & 0xFF00)
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{
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case 0x6000: /* BANK */
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gen_bank_w(value & 1);
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return;
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case 0x7F00: /* VDP */
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m68k_lockup_w_8(address, value);
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return;
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default: /* Unused */
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m68k_unused_8_w(address, value);
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return;
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}
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break;
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}
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}
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}
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else
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{
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if(address <= 0xA1001F)
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{
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/* I/O chip only gets /LWR */
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if(address & 1)
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gen_io_w((address >> 1) & 0x0F, value);
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return;
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}
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else
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{
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/* Bus control chip registers */
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switch((address >> 8) & 0xFF)
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{
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case 0x10: /* MEMORY MODE */
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m68k_unused_8_w(address, value);
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return;
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case 0x11: /* BUSREQ */
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if((address & 1) == 0)
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{
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gen_busreq_w(value & 1);
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}
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else
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{
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m68k_unused_8_w(address, value);
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}
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return;
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case 0x12: /* RESET */
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gen_reset_w(value & 1);
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return;
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case 0x13: /* TIME */
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m68k_unused_8_w(address, value);
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return;
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case 0x20: /* UNKNOWN */
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m68k_unused_8_w(address, value);
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return;
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case 0x30: /* UNKNOWN */
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m68k_unused_8_w(address, value);
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return;
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default: /* Unused */
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m68k_lockup_w_8(address, value);
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return;
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}
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}
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}
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break;
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case 0: /* ROM */
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case 1: /* ROM */
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m68k_unused_8_w(address, value);
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return;
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case 2: /* Unused */
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case 3:
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m68k_unused_8_w(address, value);
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return;
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case 4: /* Unused */
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m68k_lockup_w_8(address, value);
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return;
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}
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}
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void m68k_write_memory_16(unsigned int address, unsigned int value)
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{
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switch((address >> 21) & 7)
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{
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case 0: /* ROM */
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case 1: /* ROM */
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m68k_unused_16_w(address, value);
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return;
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case 2: /* Unused */
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case 3:
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m68k_unused_16_w(address, value);
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return;
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case 4: /* Unused */
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m68k_lockup_w_16(address, value);
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return;
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case 5: /* Z80 area, I/O chip, miscellaneous. */
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if(address <= 0xA0FFFF)
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{
|
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/* Writes are ignored when the Z80 hogs the Z-bus */
|
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if(zbusack == 1) {
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m68k_unused_8_w(address, value);
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return;
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}
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|
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/* Write into Z80 address space */
|
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switch(address & 0x6000)
|
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{
|
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case 0x0000: /* Work RAM */
|
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case 0x2000: /* Work RAM */
|
|
zram[(address & 0x1FFF)] = (value >> 8) & 0xFF;
|
|
return;
|
|
|
|
case 0x4000: /* YM2612 */
|
|
fm_write(address & 3, (value >> 8) & 0xFF);
|
|
return;
|
|
|
|
case 0x6000: /* Bank register and VDP */
|
|
switch(address & 0x7F00)
|
|
{
|
|
case 0x6000: /* Bank register */
|
|
gen_bank_w((value >> 8) & 1);
|
|
return;
|
|
|
|
case 0x7F00: /* VDP registers */
|
|
m68k_lockup_w_16(address, value);
|
|
return;
|
|
|
|
default: /* Unused */
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* I/O chip */
|
|
if(address <= 0xA1001F)
|
|
{
|
|
gen_io_w((address >> 1) & 0x0F, value & 0x00FF);
|
|
return;
|
|
}
|
|
else
|
|
{
|
|
/* Bus control chip registers */
|
|
switch((address >> 8) & 0xFF)
|
|
{
|
|
case 0x10: /* MEMORY MODE */
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
|
|
case 0x11: /* BUSREQ */
|
|
gen_busreq_w((value >> 8) & 1);
|
|
return;
|
|
|
|
case 0x12: /* RESET */
|
|
gen_reset_w((value >> 8) & 1);
|
|
return;
|
|
|
|
case 0x13: /* TIME */
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
|
|
case 0x20: /* UNKNOWN */
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
|
|
case 0x30: /* UNKNOWN */
|
|
m68k_unused_16_w(address, value);
|
|
return;
|
|
|
|
default: /* Unused */
|
|
m68k_lockup_w_16(address, value);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
|
|
case 6: /* VDP */
|
|
if((address & 0xE700E0) == 0xC00000)
|
|
{
|
|
switch(address & 0x1C)
|
|
{
|
|
case 0x00: /* DATA */
|
|
vdp_data_w(value);
|
|
return;
|
|
|
|
case 0x04: /* CTRL */
|
|
vdp_ctrl_w(value);
|
|
return;
|
|
|
|
case 0x08: /* HV counter */
|
|
case 0x0C: /* HV counter */
|
|
m68k_lockup_w_16(address, value);
|
|
return;
|
|
|
|
case 0x10: /* PSG */
|
|
case 0x14: /* PSG */
|
|
psg_write(value & 0xFF);
|
|
return;
|
|
|
|
case 0x18: /* Unused */
|
|
case 0x1C: /* Unused */
|
|
m68k_unused_8_w(address, value);
|
|
return;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Invalid address */
|
|
m68k_lockup_w_16(address, value);
|
|
}
|
|
break;
|
|
|
|
case 7: /* Work RAM */
|
|
WRITE_WORD(work_ram, address & 0xFFFF, value);
|
|
return;
|
|
}
|
|
}
|
|
|
|
|
|
void m68k_write_memory_32(unsigned int address, unsigned int value)
|
|
{
|
|
/* Split into 2 writes */
|
|
m68k_write_memory_16(address, (value >> 16) & 0xFFFF);
|
|
m68k_write_memory_16(address + 2, value & 0xFFFF);
|
|
}
|
|
|