Restored support for STM32-Clones

-> CKS devices with Core ID 0x2ba01477
(Closes #756 #757 #761 #766 #769 #805)

include/stm32.h

@@ -9,6 +9,7 @@
 
 // cortex core ids
 #define STM32VL_CORE_ID 0x1ba01477
+#define CS32VL_CORE_ID 0x2ba01477
 #define STM32F7_CORE_ID 0x5ba02477
 
 // Constant STM32 memory map figures

src/common.c

@@ -2262,7 +2262,10 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t
         uint32_t flash_regs_base;
         uint32_t pagesize;
 
-        if (sl->chip_id == STLINK_CHIPID_STM32_L0 || sl->chip_id == STLINK_CHIPID_STM32_L0_CAT5 || sl->chip_id == STLINK_CHIPID_STM32_L0_CAT2 || sl->chip_id == STLINK_CHIPID_STM32_L011) {
+        if (sl->chip_id == STLINK_CHIPID_STM32_L0 ||
+            sl->chip_id == STLINK_CHIPID_STM32_L0_CAT5 ||
+            sl->chip_id == STLINK_CHIPID_STM32_L0_CAT2 ||
+            sl->chip_id == STLINK_CHIPID_STM32_L011) {
             flash_regs_base = STM32L0_FLASH_REGS_ADDR;
             pagesize = L0_WRITE_BLOCK_SIZE;
         } else {

src/flash_loader.c

@@ -267,6 +267,7 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
         loader_code = loader_code_stm32l;
         loader_size = sizeof(loader_code_stm32l);
     } else if (sl->core_id == STM32VL_CORE_ID ||
+               sl->core_id == CS32VL_CORE_ID ||
                sl->chip_id == STLINK_CHIPID_STM32_F1_MEDIUM ||
                sl->chip_id == STLINK_CHIPID_STM32_F3 ||
                sl->chip_id == STLINK_CHIPID_STM32_F3_SMALL ||