2011-10-06 23:22:33 +00:00
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#include <stdio.h>
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2020-04-25 20:34:18 +00:00
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2016-05-20 22:23:23 +00:00
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#include <stlink.h>
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2011-10-06 23:22:33 +00:00
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2020-04-16 22:37:03 +00:00
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int main(int ac, char** av) {
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(void)ac;
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(void)av;
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2011-10-06 23:22:33 +00:00
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stlink_t* sl;
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2016-06-02 15:41:15 +00:00
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struct stlink_reg regs;
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2011-10-06 23:22:33 +00:00
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2020-05-07 10:16:07 +00:00
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sl = stlink_open_usb(10, 1, NULL, 0);
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2011-10-06 23:22:33 +00:00
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if (sl != NULL) {
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printf("-- version\n");
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stlink_version(sl);
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2014-07-10 05:31:11 +00:00
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2011-10-12 01:45:28 +00:00
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printf("mode before doing anything: %d\n", stlink_current_mode(sl));
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2011-10-06 23:22:33 +00:00
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if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
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printf("-- exit_dfu_mode\n");
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stlink_exit_dfu_mode(sl);
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}
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printf("-- enter_swd_mode\n");
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stlink_enter_swd_mode(sl);
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2011-10-12 01:45:28 +00:00
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printf("-- mode after entering swd mode: %d\n", stlink_current_mode(sl));
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2011-10-06 23:22:33 +00:00
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2011-10-29 22:17:46 +00:00
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printf("-- chip id: %#x\n", sl->chip_id);
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printf("-- core_id: %#x\n", sl->core_id);
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2011-10-12 20:40:24 +00:00
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cortex_m3_cpuid_t cpuid;
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2020-04-20 06:39:00 +00:00
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if (stlink_cpu_id(sl, &cpuid)) {
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printf("Failed reading stlink_cpu_id\n");
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} else {
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printf("cpuid:impl_id = %0#x, variant = %#x\n", cpuid.implementer_id, cpuid.variant);
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printf("cpuid:part = %#x, rev = %#x\n", cpuid.part, cpuid.revision);
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}
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2011-10-06 23:22:33 +00:00
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printf("-- read_sram\n");
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2016-05-20 22:23:23 +00:00
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static const uint32_t sram_base = STM32_SRAM_BASE;
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2011-10-06 23:22:33 +00:00
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uint32_t off;
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for (off = 0; off < 16; off += 4)
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stlink_read_mem32(sl, sram_base + off, 4);
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2011-10-12 21:24:33 +00:00
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printf("FP_CTRL\n");
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2016-05-20 22:23:23 +00:00
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stlink_read_mem32(sl, STLINK_REG_CM3_FP_CTRL, 4);
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2014-07-10 05:31:11 +00:00
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2020-04-16 22:37:03 +00:00
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// no idea what reg this is...
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//stlink_read_mem32(sl, 0xe000ed90, 4);
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2011-10-12 20:54:03 +00:00
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// no idea what register this is...
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2020-04-16 22:37:03 +00:00
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//stlink_read_mem32(sl, 0xe000edf0, 4);
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2011-10-12 20:54:03 +00:00
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// offset 0xC into TIM11 register? TIMx_DIER?
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2020-04-16 22:37:03 +00:00
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//stlink_read_mem32(sl, 0x4001100c, 4);
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2011-10-13 14:33:29 +00:00
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2011-10-13 17:27:38 +00:00
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/* Test 32 bit Write */
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2011-10-13 14:33:29 +00:00
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write_uint32(sl->q_buf,0x01234567);
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stlink_write_mem32(sl,0x200000a8,4);
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write_uint32(sl->q_buf,0x89abcdef);
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stlink_write_mem32(sl,0x200000ac, 4);
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stlink_read_mem32(sl, 0x200000a8, 4);
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stlink_read_mem32(sl, 0x200000ac, 4);
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2014-07-10 05:31:11 +00:00
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2011-10-13 17:27:38 +00:00
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/* Test 8 bit write */
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2011-10-13 14:33:29 +00:00
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write_uint32(sl->q_buf,0x01234567);
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stlink_write_mem8(sl,0x200001a8,3);
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write_uint32(sl->q_buf,0x89abcdef);
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stlink_write_mem8(sl, 0x200001ac, 3);
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stlink_read_mem32(sl, 0x200001a8, 4);
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stlink_read_mem32(sl, 0x200001ac, 4);
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2011-10-06 23:22:33 +00:00
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printf("-- status\n");
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stlink_status(sl);
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printf("-- reset\n");
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stlink_reset(sl);
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2011-10-13 17:27:38 +00:00
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stlink_force_debug(sl);
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2020-04-16 22:37:03 +00:00
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/* Test reg write */
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2011-10-13 17:27:38 +00:00
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stlink_write_reg(sl, 0x01234567, 3);
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stlink_write_reg(sl, 0x89abcdef, 4);
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stlink_write_reg(sl, 0x12345678, 15);
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for (off = 0; off < 21; off += 1)
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stlink_read_reg(sl, off, ®s);
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2014-07-10 05:31:11 +00:00
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2011-10-13 17:27:38 +00:00
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stlink_read_all_regs(sl, ®s);
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2011-10-06 23:22:33 +00:00
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printf("-- status\n");
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stlink_status(sl);
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printf("-- step\n");
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stlink_step(sl);
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printf("-- run\n");
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stlink_run(sl);
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printf("-- exit_debug_mode\n");
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stlink_exit_debug_mode(sl);
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stlink_close(sl);
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}
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return 0;
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}
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