kopia lustrzana https://github.com/stlink-org/stlink
More debug in prepration for working out writemem32
rodzic
8ff74b175e
commit
59162a0b5c
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@ -75,7 +75,7 @@ int main(int argc, char** argv) {
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}
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// FIXME - hardcoded to usb....
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stlink_t *sl =stlink_open_usb(argv[2], 10);
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stlink_t *sl = stlink_open_usb(argv[2], 10);
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if (sl == NULL)
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return 1;
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@ -297,12 +297,14 @@ struct code_hw_breakpoint code_breaks[CODE_BREAK_NUM];
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static void init_code_breakpoints(stlink_t *sl) {
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memset(sl->q_buf, 0, 4);
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sl->q_buf[0] = 0x03; // KEY | ENABLE
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stlink_write_mem32(sl, 0xe0002000, 4);
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stlink_write_mem32(sl, CM3_REG_FP_CTRL, 4);
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printf("KARL - should read back as 0x03, not 60 02 00 00\n");
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stlink_read_mem32(sl, CM3_REG_FP_CTRL, 4);
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memset(sl->q_buf, 0, 4);
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for(int i = 0; i < CODE_BREAK_NUM; i++) {
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code_breaks[i].type = 0;
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stlink_write_mem32(sl, 0xe0002008 + i * 4, 4);
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stlink_write_mem32(sl, CM3_REG_FP_COMP0 + i * 4, 4);
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}
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}
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@ -73,6 +73,8 @@ extern "C" {
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// cortex m3 technical reference manual
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#define CM3_REG_CPUID 0xE000ED00
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#define CM3_REG_FP_CTRL 0xE0002000
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#define CM3_REG_FP_COMP0 0xE0002008
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typedef struct {
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uint32_t r[16];
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@ -36,8 +36,9 @@ int main(int ac, char** av) {
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for (off = 0; off < 16; off += 4)
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stlink_read_mem32(sl, sram_base + off, 4);
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printf("-- read_mem, cpuid\n");
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stlink_read_mem32(sl, 0xe000e008, 4); // ACTLR
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printf("FP_CTRL\n");
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stlink_read_mem32(sl, CM3_REG_FP_CTRL, 4);
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// no idea what reg this is.. */
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/* stlink_read_mem32(sl, 0xe000ed90, 4);
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// no idea what register this is...
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