stlink/config/chips/F03x.chip

# Chip-ID file for STM32F03x device
#
dev_type STM32F03x
ref_manual_id 0091
chip_id 0x444                // STM32_CHIPID_F0xx_SMALL
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x400         // 1 KB
sram_size 0x1000             // 4 KB
bootrom_base 0x1fffec00
bootrom_size 0xc00           // 3 KB
option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
option_size 0x10             // 16 B
flags none
[refactoring] Clean-up & update for chipid files - F0, F1, F2, F3, F4, F7 - G0, G4 - H7 - L0, L5, U5 - WB, WL 2022-01-06 18:30:49 +00:00			`# Chip-ID file for STM32F03x device`
Chips files in the right place in the sources 2021-04-28 15:31:34 +00:00			`#`
[refactoring] Clean-up & update for chipid files - F0, F1, F2, F3, F4, F7 - G0, G4 - H7 - L0, L5, U5 - WB, WL 2022-01-06 18:30:49 +00:00			`dev_type STM32F03x`
			`ref_manual_id 0091`
[refactoring] Clean-up for headers & defines - Removed additional extern "C" linkage specs - Removed commented sections - Moved out further device specific defines - Renamed defines STM32_CHIP_ID_* 2022-01-16 18:31:22 +00:00			`chip_id 0x444 // STM32_CHIPID_F0xx_SMALL`
Updated device parametres - Human-readable FLASH_TYPE in .chip files - Added enum for STM32_CORE_IDs 2022-01-20 22:19:10 +00:00			`flash_type F0_F1_F3`
[refactoring] Clean-up & update for chipid files - F0, F1, F2, F3, F4, F7 - G0, G4 - H7 - L0, L5, U5 - WB, WL 2022-01-06 18:30:49 +00:00			`flash_size_reg 0x1ffff7cc`
			`flash_pagesize 0x400 // 1 KB`
			`sram_size 0x1000 // 4 KB`
cleanup integer handling in chipid and text flags 2021-05-23 08:50:43 +00:00			`bootrom_base 0x1fffec00`
[refactoring] Clean-up & update for chipid files - F0, F1, F2, F3, F4, F7 - G0, G4 - H7 - L0, L5, U5 - WB, WL 2022-01-06 18:30:49 +00:00			`bootrom_size 0xc00 // 3 KB`
			`option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE`
			`option_size 0x10 // 16 B`
cleanup integer handling in chipid and text flags 2021-05-23 08:50:43 +00:00			`flags none`