scale up to 24 MHz only for register

pull/121/head
Conor Patrick 2019-02-26 01:51:07 -05:00
rodzic 54b7f42056
commit a195408a11
2 zmienionych plików z 6 dodań i 5 usunięć

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@ -49,7 +49,7 @@
#include APP_CONFIG #include APP_CONFIG
// KHz // KHz
#define CLOCK_RATE 24000 #define CLOCK_RATE 16000
USBD_HandleTypeDef Solo_USBD_Device; USBD_HandleTypeDef Solo_USBD_Device;
@ -360,7 +360,7 @@ void SystemClock_Config_LF16(void)
{ {
Error_Handler(); Error_Handler();
} }
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2);
LL_RCC_LSI_Enable(); LL_RCC_LSI_Enable();
@ -423,7 +423,7 @@ void SystemClock_Config_LF24(void)
{ {
Error_Handler(); Error_Handler();
} }
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2);
LL_RCC_LSI_Enable(); LL_RCC_LSI_Enable();
@ -927,7 +927,7 @@ void init_spi(void)
SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2; SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
SPI_InitStruct.CRCPoly = 7; SPI_InitStruct.CRCPoly = 7;

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@ -485,8 +485,9 @@ void nfc_process_iblock(uint8_t * buf, int len)
// WTX_on(WTX_TIME_DEFAULT); // WTX_on(WTX_TIME_DEFAULT);
// SystemClock_Config_LF32(); // SystemClock_Config_LF32();
// delay(300); // delay(300);
SystemClock_Config_LF24();
u2f_request_nfc(&buf[1], len, &ctap_resp); u2f_request_nfc(&buf[1], len, &ctap_resp);
// SystemClock_Config_LF16(); SystemClock_Config_LF16();
// if (!WTX_off()) // if (!WTX_off())
// return; // return;