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5 927 Commity
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Wykres commitów

21 Commity (03d39f848301c2eb3f2840586e74c548f5c49518)

Autor SHA1 Wiadomość Data
f4exb 03d39f8483 LimeSDR: use constant instead of define for buffer size 2020-04-09 06:49:16 +02:00
f4exb 3b74153ec6 SampleSourceFifo refactoring and Tx code reorganization 2019-11-15 01:05:32 +01:00
f4exb e6a929470f Renamed SampleSourceFifo to SampleSourceFifoDB to mark double buffered nature of FIFO 2019-11-02 11:03:07 +01:00
f4exb 4949e1fd04 Tx plugins: corrected FIFO begin iterator vs number of samples read 2019-10-27 08:03:32 +01:00
f4exb ef15157a50 Fixed incomplete copyright headers (1) 2019-04-11 06:39:30 +02:00
f4exb c458f0647c Removed Fc pos references in Sample Sink side 2018-05-10 14:33:17 +02:00
f4exb 2e5cfcafee PVS-Studio static analysis corrections (3) issue #137 2018-02-24 10:29:27 +01:00
f4exb b226c594df LimeSDR: increased start/stop stream wait time to 50ms to fixed possible stability issues when changes are applied 2017-11-11 06:02:09 +01:00
f4exb 2deccbc259 LimeSDR: have still a 1ms delay after start/stop stream as it makes the Tx gain setting a bit more fluid 2017-10-30 03:02:45 +01:00
f4exb e8fb70096c LimeSDR: fixed lockup problem by moving start/stop stream from thread run method to start/stop work methods 2017-10-29 18:38:04 +01:00
f4exb 83e5dc5951 LimeSDR: reduced delay after LMS_StartStream and LMS_StopStream to 0.1s 2017-10-27 01:10:22 +02:00
f4exb 8ddc852239 LimeSDR: introduced a 0.5s delay after LMS_StartStream and LMS_StopStream and cleaned up some commented code 2017-10-27 00:53:34 +02:00
f4exb a61348948a LimeSDR and BladeRF output: do not resize sample FIFO to a fixed value in the thread constructor 2017-10-15 17:37:53 +02:00
f4exb 54a6bc6b62 LimeSDR output: removed useless update of sample rate 2017-08-07 23:22:29 +02:00
f4exb 3a3d8e3dcb activated compiler warnings 2017-05-25 20:13:34 +02:00
f4exb 10cbfb3b44 LimeSDR: added soft decimation/interpolation by 64 2017-05-08 17:30:08 +02:00
f4exb 6f884d02c2 LimeSDR output: fixed send stream timeout (set to 1s) 2017-05-08 04:35:29 +02:00
f4exb d1e16b6ab0 LimeSDR output: regulate Tx output 2017-04-24 03:12:02 +02:00
f4exb 098f8d8af2 LimeSDR output: debug (1) 2017-04-22 12:08:15 +02:00
f4exb e07a730c4f LimeSDR output: compilation succesful 2017-04-22 11:33:41 +02:00
f4exb f447c9f9bd LimeSDR output (1) 2017-04-22 06:40:12 +02:00