Xael South
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139633fa0b
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rearranging frequencies translation
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2021-02-15 20:18:07 +00:00 |
Xael South
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f9f42caafb
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trailing spaces
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2021-02-15 20:22:26 +01:00 |
Xael South
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f361385d40
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inaccurate atan (not by default)
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2021-02-15 20:21:02 +01:00 |
Xael South
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f53fd26781
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run length algo for s1
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2021-02-15 19:10:50 +01:00 |
Xael South
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7459c7e30a
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use conjf instead of conj (which is for double)
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2021-02-12 17:42:07 +00:00 |
Xael South
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d03089ffa0
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moving average slightly optimized
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2021-02-12 17:22:42 +00:00 |
Xael South
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686356d201
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typos
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2021-02-08 08:20:53 +00:00 |
Xael South
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73b67b5c66
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s1 decoder small fixes
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2021-02-06 12:01:52 +00:00 |
Xael South
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02a46cb826
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fixing rssi=0 S1 mode; rssi filtering done right again
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2021-02-06 10:36:14 +00:00 |
Xael South
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b32ee02e4c
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Merge pull request #18 from weetmuts/ImproveREADME
Add information about column meanings.
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2021-02-06 11:08:37 +01:00 |
Fredrik Öhrström
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d603a3b4ce
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Add information about column meanings.
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2021-02-06 08:22:07 +01:00 |
Xael South
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9ab45b4866
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droppped one freq shift
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2021-02-05 21:48:05 +00:00 |
Xael South
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284dd6cc0e
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simultaneously rx T1, C1 ans S1, but the latter is untested
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2021-02-05 14:33:16 +00:00 |
Xael South
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2d02db273a
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simultaneously rx T1, C1 ans S1, but the latter is untested
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2021-02-05 14:30:20 +00:00 |
Xael South
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ae5d8f818f
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simultaneously rx T1, C1 ans S1, but the latter is untested
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2021-02-05 12:56:22 +00:00 |
Xael South
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8ac790dc16
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C1 receiver with better filtering
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2021-02-04 14:20:04 +00:00 |
Xael South
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8bec4a2b08
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C1 mode improvements; S1 mode implemented
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2021-02-02 17:29:08 +00:00 |
Xael South
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a517da71d1
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C1 mode improvements; S1 mode implemented
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2021-02-02 17:27:50 +00:00 |
Xael South
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cec199312e
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clock recovering for time2 method only if latter selected
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2021-02-02 08:28:24 +00:00 |
Xael South
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6d92d1b3f1
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rx_sdr
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2021-01-28 14:26:50 +00:00 |
Xael South
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4098aa84bb
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configurable decimation rate
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2021-01-28 13:32:59 +00:00 |
Xael South
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683c99e1d8
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Some checks around the L field
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2021-01-27 22:44:27 +01:00 |
Xael South
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a75bd89d7b
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16 byte alignment on decoder->packet
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2021-01-26 20:21:46 +01:00 |
Xael South
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0dc6a61c92
|
Get rid of some compiler warnings.
|
2021-01-26 12:44:57 +01:00 |
Xael South
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4aceda56d6
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Fix warnings for g++ 7.5.0
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2021-01-26 12:36:34 +01:00 |
Xael South
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355ba64a57
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- run length algorithm for picking datagrams out of the bit stream implemented.
- L(ength) field fixed for C1 Mode B datagrams.
- Allow to redefine CFLAGS and OUTPUT directory.
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2021-01-26 11:50:05 +01:00 |
Xael South
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f213753a98
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Merge pull request #8 from dwrobel/dw-1
Allow to redefine CFLAGS* and OUTPUT directory
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2021-01-26 11:09:42 +01:00 |
Damian Wrobel
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80af0e0057
|
Allow to redefine CFLAGS* and OUTPUT directory
Signed-off-by: Damian Wrobel <dwrobel@ertelnet.rybnik.pl>
|
2020-03-01 18:27:05 +01:00 |
Xael South
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6a04c45482
|
Mode C1 datagram type B is supported now
|
2019-12-13 22:32:15 +01:00 |
Xael South
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2453cd8c0f
|
#define SSE4.2
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2018-02-05 19:30:44 +01:00 |
xaelsouth
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9bfaa9bc72
|
Added some pictures of demodulated signal.
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2018-01-27 19:37:24 +00:00 |
Xael South
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150201060f
|
Typo
|
2018-01-22 21:34:10 +01:00 |
Xael South
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e145466bb2
|
Removed compiler options: -msse4.2
|
2018-01-22 21:25:19 +01:00 |
Xael South
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9830c25ac0
|
Update README.md
|
2017-04-22 18:00:15 +02:00 |
xaelsouth
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ebe0a8bef6
|
initial commit
|
2017-04-04 20:29:40 +00:00 |