kopia lustrzana https://github.com/pimoroni/pimoroni-pico
157 wiersze
8.1 KiB
C++
157 wiersze
8.1 KiB
C++
#pragma once
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#include <stdint.h>
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namespace pimoroni {
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/***** Device registers and masks here *****/
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enum reg {
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// Bank 1
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AUXID = 0x58, // AUXID = 0b00001111
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REVID = 0x59, // REVID = 0b00000111
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ID = 0x5A, // ID = 0b11111111
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CFG12 = 0x66, // SP_TH_CH = 0b00000111
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// Bank 0
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ENABLE = 0x80, // FDEN = 0b01000000
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// SMUXEN = 0b00010000
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// WEN = 0b00001000
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// SP_EN = 0b00000010
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// PON = 0b00000001
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ATIME = 0x81, // ATIME = 0b11111111
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// Integration Time Step Size
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// 0 = 2.87us
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// n 2.87us x (n + 1)
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ASTEP = 0xD4, // STEP = 0xFFFF
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// Spectral Measurement Wait Time
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// 0 = 1 cycle = 2.78ms
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// n = 2.78ms x (n + 1)
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WTIME = 0x83, // WTIME = 0b11111111
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SP_TH = 0x84, // SP_TH_L = 0xFFFF0000 Spectral Low Threshold
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// SP_TH_H = 0x0000FFFF Spectral High Threshold
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STATUS = 0x93, // ASAT = 0b10000000 Spectral Saturation (if ASIEN set)
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// AINT = 0b00001000 Spectral Channel Interrupt (if SP_IEN set)
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// FINT = 0b00000100 FIFO Buffer Interrupt
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// SINT = 0b00000001 System Interrupt
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ASTATUS = 0x94,// ASAT = 0b10000000 Saturation Status
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// AGAIN = 0b00000111 Gain Status
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DATA = 0x95, // 36 bytes, fields 0 to 17 (2 bytes eac)
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STATUS2 = 0x90,// AVALID = 0b01000000 Spectral Data Valid
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// ASAT_DIG = 0b00010000 Digital Saturation
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// ASAT_ANA = 0b00001000 Analog Saturation
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// FDSAT_ANA= 0b00000010 Flicker Analog Saturation
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// FDSAT_DIG= 0b00000001 Flicker Digital Saturation
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STATUS3 = 0x91,// INT_SP_H = 0b00100000 Spectral Above High Threshold
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// INT_SP_L = 0b00010000 Spectral Below Low Threshold
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STATUS5 = 0xBB,// SINT_FD = 0b00001000 Flicker Detect Interrupt (if SIEN_FD set)
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// SINT_SMUX= 0b00000100 SMUS Operation Interrupt (SMUX exec finished)
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STATUS4 = 0xBC,// FIFO_OV = 0b10000000 FIFO Buffer Overflow
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// OVTEMP = 0b00100000 Over Temperature
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// FD_TRIG = 0b00010000 Flicker Detect Trigger Error
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// SD_TRIG = 0b00000100 Spectral Trigger Error
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// SAI_ACT = 0b00000010 Sleep After Interrupt Active
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// INT_BUSY = 0b00000001 Initialization busy (1 for ~300us after power on)
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CFG0 = 0xBF, // LOW_POWER= 0b00100000
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// REG_BANK = 0b00010000 0 - Register 0x80 and above
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// 1 - Register 0x20 to 0x7f
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// WLONG = 0b00000100 Increase WTIME by factor of 16
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// Spectral Engines Gain Setting
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// 0 = 0.5x, # 1 = 1x, 2 = 2x, 12 = 2048x
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// GAINx = 1 << (n - 1)
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CFG1 = 0xC6,
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CFG3 = 0xC7, // SAI = 0b00100000 Sleep after interrupt
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CFG6 = 0xF5, // SMUS_CMD = 0b00011000 0 - ROM_init
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// 1 - Read_SMUX
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// 2 - Write_SMUX
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CFG8 = 0xC9, // FIFO_TH = 0b11000000 0b00, 0b01, 0b10, 0b11
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CFG9 = 0xCA, // SIEN_FD = 0b01000000 System Interrupt Flicker Detection
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// SIEN_SMUX= 0b00010000 System Interrupt SMUX Operation
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CFG10 = 0x65, // FD_PERS = 0b00000111 Flicker Detect Persistence
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// Number of results that must differ before status change
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PERS = 0xCF, // APERS = 0b00001111
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GPIO = 0x6B, // GPIO_INV = 0b00001000 Invert GPIO output
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// GPIO_IN_EN=0b00000100 Enable GPIO input
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// GPIO_OUT = 0b00000010 GPIO Output
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// GPIO_IN = 0b00000001 GPIO Input
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CFG20 = 0xD6, // FD_FIFO_8b=0b10000000 Enable 8bit FIFO mode for Flicker Detect (FD_TIME < 256)
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// auto_SMUX= 0b01100000 Auto channel read-out
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LED = 0xCD, // LED_ACT = 0b10000000 External LED (LDR) Control
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// LED_DRIVE= 0b01111111 External LED drive strength (N - 4) >> 1
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// Flicker Detection AGC Gain Max
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// Max = 2^N (0 = 0.5x)
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AGC_GAIN_MAX = 0xD7, // ADC_FD_GAIN_MAX = 0b11110000
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AZ_CONFIG = 0xDE, // AT_NTH_ITERATION = 0b11111111 Auto-zero Frequency
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// 0 - Never (Not Recommended)
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// n - Every n integration cycles
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// 255 - only before first measurement cycle
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FD_TIME_1 = 0xE0, // FD_TIME=0b11111111 Flicker Detection Integration Time (Do not change if FDEN = 1 & PON = 1)
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FD_TIME_2 = 0xE2, // FD_GAIN=0b11111000 Flicker Detection Gain (0 = 0.5x, 1 = 1x, 2 = 2x, 12 = 2048x)
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// FD_TIME=0b00000111 Flicker Detection Time (Do not change if FDEN = 1 & PON = 1)
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FD_CFG0 = 0xDF, // FIFO_WRITE_FD = 0b10000000 Write flicker raw data to FIFO (1 byte per sample)
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FD_STATUS = 0xE3, // FD_VALID=0b00100000
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// FD_SAT = 0b00010000
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// FD_120HZ_VALID = 0b00001000
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// FD_100HZ_VALID = 0b00000100
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// FD_120HZ = 0b00000010
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// FD_100HZ = 0b00000001
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INTERNAB = 0xF9, // ASIEN = 0b10000000 Saturation Interrupt Enable
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// SP_IEN = 0b00001000 Spectral Interrupt Enable
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// FIEN = 0b00000100 FIFO Buffer Interrupt Enable
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// SIEN = 0b00000001 System Interrupt Enable
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CONTROL = 0xFA, // SW_RESET = 0b00001000 Software Reset
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// SP_MAN_AZ= 0b00000100 Spectral Manual Auto-zero
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// FIFO_CLR = 0b00000010 FIFO Buffer Clear
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// CLEAR_SAI_ACT = 0b00000001 Clear sleep-after-interrupt
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FIFO_MAP = 0xFC, // CH5 = 0b01000000
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// CH4 = 0b00100000
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// CH3 = 0b00010000
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// CH2 = 0b00001000
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// CH1 = 0b00000100
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// CH0 = 0b00000010
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// ASTATUS = 0b00000001
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FIFO_LVL = 0xFD,
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FDATA = 0xFE // 0xFFFF
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};
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constexpr uint8_t HARDWARE_ID = 0b10000001;
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constexpr uint8_t CFG0_LOW_POWER = 0b00100000;
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constexpr uint8_t CFG0_BANK = 0b00010000;
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constexpr uint8_t CFG0_WLONG = 0b00000100;
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constexpr uint8_t CFG20_6_CH = 0b00000000;
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constexpr uint8_t CFG20_12_CH = 0b01000000;
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constexpr uint8_t CFG20_18_CH = 0b01100000;
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constexpr uint8_t ENABLE_FDEN = 0b01000000;
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constexpr uint8_t ENABLE_SMUXEN = 0b00010000;
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constexpr uint8_t ENABLE_WEN = 0b00001000;
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constexpr uint8_t ENABLE_SP_EN = 0b00000010;
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constexpr uint8_t ENABLE_PON = 0b00000001;
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constexpr uint8_t FD_CFG0_FIFO_WRITE = 0b10000000;
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constexpr uint8_t FD_VALID = 0b00100000;
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constexpr uint8_t FD_SAT = 0b00010000;
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constexpr uint8_t FD_120HZ_VALID = 0b00001000;
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constexpr uint8_t FD_100HZ_VALID = 0b00000100;
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constexpr uint8_t FD_120HZ = 0b00000010;
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constexpr uint8_t FD_100HZ = 0b00000001;
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constexpr uint8_t INTERNAB_ASIEN = 0b10000000;
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constexpr uint8_t INTERNAB_SP_IEN = 0b00001000;
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constexpr uint8_t INTERNAB_FIEN = 0b00000100;
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constexpr uint8_t INTERNAB_SIEN = 0b00000001;
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constexpr uint8_t CONTROL_SW_RESET = 0b00001000;
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constexpr uint8_t CONTROL_SP_MAN_AZ = 0b00000100;
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constexpr uint8_t CONTROL_FIFO_CLR = 0b00000010;
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constexpr uint8_t CONTROL_CLEAR_SAI_ACT = 0b00000001;
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constexpr uint8_t FIFO_MAP_CH5 = 0b01000000;
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constexpr uint8_t FIFO_MAP_CH4 = 0b00100000;
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constexpr uint8_t FIFO_MAP_CH3 = 0b00010000;
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constexpr uint8_t FIFO_MAP_CH2 = 0b00001000;
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constexpr uint8_t FIFO_MAP_CH1 = 0b00000100;
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constexpr uint8_t FIFO_MAP_CH0 = 0b00000010;
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constexpr uint8_t FIFO_MAP_ASTATUS = 0b00000001;
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} |