kopia lustrzana https://github.com/bristol-seds/pico-tracker
49 wiersze
1.8 KiB
Markdown
49 wiersze
1.8 KiB
Markdown
---
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title: ARM Cortex M0+
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tagline: Atmel SAM D20 E
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linkname: armcortex
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x: 49%
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y: 47%
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---
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The board is centred around the [Atmel SAM D20][samd]
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microcontroller. We use the smallest **E** variant in a QFN-32 package (_-M_)
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The firmware is written in C and can be built using
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[GNU Tools for ARM Embedded Processors][gnutools] See
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[README-samd20-gcc-blackmagic.md][gcc-blackmagic-readme] for more
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details.
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From the [datasheet][datasheet] we can see there's a few RAM/ROM size
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options:
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|~~Variant~~|~~Flash (KBytes)~~|~~SRAM KBytes~~
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|:-:|:-:|:-:
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|-14|16 KBytes|2 KBytes
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|-15|32 KBytes|4 KBytes
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|-16|64 KBytes|8 KBytes
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|_-17_|_128 KBytes_|_16 KBytes_
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|-18|256 KBytes|32 KBytes
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We've been using the _-17_ variant so far, but may upgrade to the
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_-18_ variant if we need more Flash for [geofencing](#geofence) or
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SRAM for [backlog](#backlog).
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The SAM D series implements Generic Clocks (GCLKs) which allow us to
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divide, route and disable clock signals internally as required. These
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are used particularly for [APRS](#aprs).
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Thanks to an error in Revision C silicon we can't configure the
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correct pin layout for the SERCOM used to talk to the radio. Currently
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it's just being [bit-banged][bitbang] as both Mouser and Farnell
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appear to have bought large quantities of Revision C silicon. **TODO:
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Fix in future board revision??**
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[armcortexm0+]: http://www.arm.com/products/processors/cortex-m/cortex-m0plus.php
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[samd]: http://www.atmel.com/products/microcontrollers/arm/sam-d.aspx
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[datasheet]: http://www.atmel.com/Images/atmel-42129-sam-d20_datasheet.pdf
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[bitbang]: https://github.com/bristol-seds/pico-tracker/blob/master/firmware/src/spi_bitbang.c#L78
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[gnutools]: https://launchpad.net/gcc-arm-embedded/
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[gcc-blackmagic-readme]: https://github.com/bristol-seds/pico-tracker/blob/master/firmware/README-samd20-gcc-blackmagic.md
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