kopia lustrzana https://github.com/DL7AD/pecanpico9
Fixed syntax bug in OV5640
Implemented OV5640 configurations which work for sure without HREF (tested on PP7 with DCMI) Adjusted clocking for cameraDevelop
Sven Steudte
rodzic
d1ac86b8aa
commit
28eb8bcf1d
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@ -463,7 +463,7 @@ void start_user_modules(void)
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config[4].ssdv_conf.ram_size = sizeof(ssdv_buffer); // Buffer size
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config[4].ssdv_conf.res = RES_VGA; // Resolution VGA
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config[4].ssdv_conf.quality = 4; // Image quality
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start_image_thread(&config[4]);
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//start_image_thread(&config[4]);
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// Module IMAGE, SSDV 2m 2FSK
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config[5].power = 127; // Transmission Power
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@ -21,7 +21,7 @@ struct regval_list {
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static const struct regval_list OV5640YUV_Sensor_Dvp_Init[] =
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{
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{ 0x4740, 0x04 },
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{ 0x4740, 0x24 },
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{ 0x4050, 0x6e },
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{ 0x4051, 0x8f },
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@ -31,7 +31,7 @@ static const struct regval_list OV5640YUV_Sensor_Dvp_Init[] =
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{ 0x3017, 0x7f },
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{ 0x3018, 0xff },
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{ 0x302c, 0x02 },
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{ 0x3108, 0x21 }, // PCLK root divider [5:4]
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{ 0x3108, 0x31 },
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{ 0x3630, 0x2e },//2e
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{ 0x3632, 0xe2 },
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{ 0x3633, 0x23 },//23
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@ -69,7 +69,7 @@ static const struct regval_list OV5640YUV_Sensor_Dvp_Init[] =
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{ 0x3c0a, 0x9c },
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{ 0x3c0b, 0x40 },
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{ 0x3820, 0x46 },
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{ 0x3820, 0x41 },
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{ 0x3821, 0x01 }, //07
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//windows setup
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@ -92,12 +92,12 @@ static const struct regval_list OV5640YUV_Sensor_Dvp_Init[] =
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{ 0x3814, 0x31 },
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{ 0x3815, 0x31 },
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{ 0x3034, 0x1a }, // PLL charge pump control [7:4]
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{ 0x3035, 0x11 }, // System clock divider [7:4]
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{ 0x3036, 0x46 }, // PLL multiplier [7:0]
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{ 0x3037, 0x14 }, // PLL root divider [4], PLL pre-divider [3:0]
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{ 0x3038, 0x00 }, // System control registers (changing not recommended)
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{ 0x3039, 0x00 }, // PLL bypass [7]
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{ 0x3034, 0x1a },
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{ 0x3035, 0x21 }, //15fps
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{ 0x3036, 0x46 },
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{ 0x3037, 0x03 },
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{ 0x3038, 0x00 },
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{ 0x3039, 0x00 },
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{ 0x380c, 0x07 },
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{ 0x380d, 0x68 },
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@ -136,7 +136,6 @@ static const struct regval_list OV5640YUV_Sensor_Dvp_Init[] =
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{ 0x4300, 0x30 },
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{ 0x501f, 0x00 },
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{ 0x4713, 0x03 },
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{ 0x4404, 0x34 },
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{ 0x4407, 0x04 },
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{ 0x460b, 0x35 },
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{ 0x460c, 0x22 },//add by bright
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@ -324,81 +323,11 @@ static const struct regval_list OV5640YUV_Sensor_Dvp_Init[] =
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static const struct regval_list ov5640_vga_preview[] =
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{
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// YUV VGA 30fps, night mode 5fps
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// Input Clock = 24Mhz, PCLK = 56MHz
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{ 0x3035, 0x11 }, // PLL
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{ 0x3036, 0x46 }, // PLL
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{ 0x3c07, 0x08 }, // light meter 1 threshold [7:0]
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{ 0x3820, 0x46 }, // Sensor flip off, ISP flip on
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{ 0x3821, 0x01 }, // Sensor mirror on, ISP mirror on, H binning on
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{ 0x3814, 0x31 }, // X INC
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{ 0x3815, 0x31 }, // Y INC
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{ 0x3800, 0x00 }, // HS
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{ 0x3801, 0x00 }, // HS
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{ 0x3802, 0x00 }, // VS
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{ 0x3803, 0x04 }, // VS
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{ 0x3804, 0x0a }, // HW (HE)
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{ 0x3805, 0x3f }, // HW (HE)
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{ 0x3806, 0x07 }, // VH (VE)
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{ 0x3807, 0x9b }, // VH (VE)
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{ 0x3808, 0x02 }, // DVPHO
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{ 0x3809, 0x80 }, // DVPHO
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{ 0x380a, 0x01 }, // DVPVO
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{ 0x380b, 0xe0 }, // DVPVO
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{ 0x380c, 0x07 }, // HTS
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{ 0x380d, 0x68 }, // HTS
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{ 0x380e, 0x03 }, // VTS
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{ 0x380f, 0xd8 }, // VTS
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{ 0x3813, 0x06 }, // Timing Voffset
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{ 0x3618, 0x00 },
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{ 0x3612, 0x29 },
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{ 0x3709, 0x52 },
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{ 0x370c, 0x03 },
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{ 0x3a02, 0x17 }, // 60Hz max exposure, night mode 5fps
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{ 0x3a03, 0x10 }, // 60Hz max exposure
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// banding filters are calculated automatically in camera driver
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//{ 0x3a08, 0x01 }, // B50 step
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//{ 0x3a09, 0x27 }, // B50 step
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//{ 0x3a0a, 0x00 }, // B60 step
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//{ 0x3a0b, 0xf6 }, // B60 step
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//{ 0x3a0e, 0x03 }, // 50Hz max band
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//{ 0x3a0d, 0x04 }, // 60Hz max band
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{ 0x3a14, 0x17 }, // 50Hz max exposure, night mode 5fps
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{ 0x3a15, 0x10 }, // 50Hz max exposure
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{ 0x4004, 0x02 }, // BLC 2 lines
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{ 0x3002, 0x1c }, // reset JFIFO, SFIFO, JPEG
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{ 0x3006, 0xc3 }, // disable clock of JPEG2x, JPEG
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{ 0x4713, 0x03 }, // JPEG mode 3
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{ 0x4407, 0x04 }, // Quantization scale
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{ 0x460b, 0x35 },
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{ 0x460c, 0x22 },
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{ 0x4837, 0x22 }, // DVP CLK divider
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{ 0x3824, 0x02 }, // DVP CLK divider
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{ 0x5001, 0xa3 }, // SDE on, scale on, UV average off, color matrix on, AWB on
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{ 0x3503, 0x00 }, // AEC/AGC on
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};
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static const struct regval_list OV5640_RGB_QVGA[] =
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{
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{0x3008, 0x02},
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{0x3035, 0x11},
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{0x4740, 0x21},
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{0x4300, 0x61},
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{0x3808, 0x01},
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{0x3809, 0x40},
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{0x380a, 0x00},
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{0x380b, 0xf0},
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{0x501f, 0x01},
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{0xffff, 0xff},
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};
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//2592x1944 QSXGA
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static const struct regval_list OV5640_JPEG_QSXGA[] =
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{
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{0x3820 ,0x46},
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{0x3821 ,0x20},
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{0x3820 ,0x40},
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{0x3821 ,0x26},
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{0x3814 ,0x11},
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{0x3815 ,0x11},
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{0x3803 ,0x00},
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@ -430,7 +359,7 @@ static const struct regval_list OV5640_JPEG_QSXGA[] =
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{0x3824 ,0x04},
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{0x5001 ,0x83},
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{0x3036 ,0x69},
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{0x3035 ,0x12},
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{0x3035 ,0x31},
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{0x4005 ,0x1A},
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{0xffff, 0xff},
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};
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@ -1015,7 +944,7 @@ static void dma_interrupt(void *p, uint32_t flags) {
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dma_flags = flags;
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dmaStreamClearInterrupt(dmastp);
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if (flags & (STM32_DMA_ISR_FEIF | STM32_DMA_ISR_TEIF } STM32_DMA_ISR_DMEIF)) {
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if (flags & (STM32_DMA_ISR_FEIF | STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) {
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/*
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* DMA transfer error, FIFO error or Direct mode error.
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* See 9.34.19 of RM0430.
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@ -1144,7 +1073,7 @@ bool OV5640_Capture(uint8_t* buffer, uint32_t size)
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/* Setup DMA for transfer on TIM1_TRIG - DMA2 stream 0, channel 6 */
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dmastp = STM32_DMA_STREAM(STM32_DMA_STREAM_ID(2, 0));
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uint32_t dmamode = STM32_DMA_CR_CHSEL(6) |
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STM32_DMA_CR_PL(3) |
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STM32_DMA_CR_PL(1) |
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STM32_DMA_CR_DIR_P2M |
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STM32_DMA_CR_MSIZE_WORD |
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STM32_DMA_CR_MBURST_INCR4 |
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@ -1158,7 +1087,7 @@ bool OV5640_Capture(uint8_t* buffer, uint32_t size)
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#endif
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STM32_DMA_CR_TCIE;
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dmaStreamAllocate(dmastp, 2, (stm32_dmaisr_t)dma_interrupt, NULL);
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dmaStreamAllocate(dmastp, 1, (stm32_dmaisr_t)dma_interrupt, NULL);
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dmaStreamSetPeripheral(dmastp, &GPIOA->IDR); // We want to read the data from here
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@ -9,7 +9,7 @@
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#include "hal.h"
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#include "types.h"
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#define OV5640_USE_DMA_DBM TRUE
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#define OV5640_USE_DMA_DBM FALSE
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uint32_t OV5640_Snapshot2RAM(uint8_t* buffer, uint32_t size, resolution_t resolution, bool enableJpegValidation);
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bool OV5640_Capture(uint8_t* buffer, uint32_t size);
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@ -152,7 +152,7 @@ void pac1720_init(void)
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I2C_write8(PAC1720_ADDRESS, PAC1720_CH2_VSENSE_SAMP_CONFIG, 0x5F);
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I2C_write8(PAC1720_ADDRESS, PAC1720_V_SOURCE_SAMP_CONFIG, 0xFF);
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//TRACE_INFO("PAC > Init PAC1720 continuous measurement");
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TRACE_INFO("PAC > Init PAC1720 continuous measurement");
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chThdCreateFromHeap(NULL, THD_WORKING_AREA_SIZE(512), "PAC1720", NORMALPRIO, pac1720_thd, NULL);
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}
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@ -60,7 +60,7 @@
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#define STM32_RTCSEL STM32_RTCSEL_LSI
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#define STM32_RTCPRE_VALUE 8
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#define STM32_MCO1SEL STM32_MCO1SEL_PLL
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#define STM32_MCO1PRE STM32_MCO1PRE_DIV4
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#define STM32_MCO1PRE STM32_MCO1PRE_DIV2
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#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
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#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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@ -218,7 +218,7 @@ void start_position_thread(module_conf_t *conf)
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// Start position thread
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TRACE_INFO("POS > Startup position thread");
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chsnprintf(conf->name, sizeof(conf->name), "POS");
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thread_t *th = chThdCreateFromHeap(NULL, THD_WORKING_AREA_SIZE(10*1024), "POS", NORMALPRIO, posThread, conf);
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thread_t *th = chThdCreateFromHeap(NULL, THD_WORKING_AREA_SIZE(20*1024), "POS", NORMALPRIO, posThread, conf);
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if(!th) {
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// Print startup error, do not start watchdog for this thread
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TRACE_ERROR("POS > Could not startup thread (not enough memory available)");
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