kopia lustrzana https://github.com/DL7AD/pecanpico9
Removed OV2640, implemented testimage
Sven Steudte
rodzic
94aaa434cf
commit
136540414b
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@ -135,7 +135,6 @@ CSRC = $(STARTUPSRC) \
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drivers/si4464.c \
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drivers/bme280.c \
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drivers/pac1720.c \
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drivers/ov2640.c \
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drivers/ov5640.c \
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drivers/flash/flash.c \
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drivers/flash/helper.c \
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@ -282,9 +282,9 @@ void start_user_modules(void)
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chsnprintf(config[5].ssdv_conf.callsign, 7, "DL7AD2"); // SSDV Callsign
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config[5].ssdv_conf.ram_buffer = ssdv_buffer; // Camera buffer
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config[5].ssdv_conf.ram_size = sizeof(ssdv_buffer); // Buffer size
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config[5].ssdv_conf.res = RES_VGA; // Resolution XGA
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config[5].ssdv_conf.res = RES_QVGA; // Resolution XGA
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//config[5].ssdv_conf.redundantTx = true; // Transmit packets twice
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//start_image_thread(&config[5]);
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start_image_thread(&config[5]);
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// Module IMAGE, SSDV 2m 2FSK
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/*config[6].power = 127; // Power 20 dBm
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@ -15,8 +15,8 @@
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#define LOG_FLASH_ADDR2 0x080E0000 /* Log flash memory address 2 */
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#define LOG_SECTOR_SIZE 0x20000 /* Log flash memory size */
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#define GPS_ON_VBAT 7000 /* Battery voltage threshold at which GPS is switched on */
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#define GPS_OFF_VBAT 7000 /* Battery voltage threshold at which GPS is switched off */
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#define GPS_ON_VBAT 3000 /* Battery voltage threshold at which GPS is switched on */
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#define GPS_OFF_VBAT 2500 /* Battery voltage threshold at which GPS is switched off */
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#define TRACE_TIME TRUE /* Enables time tracing on debugging port */
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#define TRACE_FILE FALSE /* Enables file and line tracing on debugging port */
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@ -1,836 +0,0 @@
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/**
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* This is the OV2640 driver
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* I2C configuring concept has been taken from
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* https://github.com/iqyx/ov2640-stm32/blob/master/F4discovery/main.c
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*/
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/*
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* ov2640 Camera Driver
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*
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* Copyright (C) 2010 Alberto Panizzo <maramaopercheseimorto@gmail.com>
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*
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* Based on ov772x, ov9640 drivers and previous non merged implementations.
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*
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* Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright (C) 2006, OmniVision
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "ch.h"
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#include "hal.h"
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#include "ov2640.h"
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#include "pi2c.h"
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#include "board.h"
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#include "defines.h"
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#include "debug.h"
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#include <string.h>
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#define OV2640_I2C_ADR 0x30
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#define VAL_SET(x, mask, rshift, lshift) \
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((((x) >> rshift) & mask) << lshift)
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/*
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* DSP registers
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* register offset for BANK_SEL == BANK_SEL_DSP
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*/
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#define R_BYPASS 0x05 /* Bypass DSP */
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#define R_BYPASS_DSP_BYPAS 0x01 /* Bypass DSP, sensor out directly */
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#define R_BYPASS_USE_DSP 0x00 /* Use the internal DSP */
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#define QS 0x44 /* Quantization Scale Factor */
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#define CTRLI 0x50
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#define CTRLI_LP_DP 0x80
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#define CTRLI_ROUND 0x40
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#define CTRLI_V_DIV_SET(x) VAL_SET(x, 0x3, 0, 3)
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#define CTRLI_H_DIV_SET(x) VAL_SET(x, 0x3, 0, 0)
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#define HSIZE 0x51 /* H_SIZE[7:0] (real/4) */
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#define HSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
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#define VSIZE 0x52 /* V_SIZE[7:0] (real/4) */
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#define VSIZE_SET(x) VAL_SET(x, 0xFF, 2, 0)
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#define XOFFL 0x53 /* OFFSET_X[7:0] */
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#define XOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
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#define YOFFL 0x54 /* OFFSET_Y[7:0] */
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#define YOFFL_SET(x) VAL_SET(x, 0xFF, 0, 0)
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#define VHYX 0x55 /* Offset and size completion */
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#define VHYX_VSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 7)
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#define VHYX_HSIZE_SET(x) VAL_SET(x, 0x1, (8+2), 3)
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#define VHYX_YOFF_SET(x) VAL_SET(x, 0x3, 8, 4)
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#define VHYX_XOFF_SET(x) VAL_SET(x, 0x3, 8, 0)
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#define DPRP 0x56
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#define TEST 0x57 /* Horizontal size completion */
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#define TEST_HSIZE_SET(x) VAL_SET(x, 0x1, (9+2), 7)
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#define ZMOW 0x5A /* Zoom: Out Width OUTW[7:0] (real/4) */
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#define ZMOW_OUTW_SET(x) VAL_SET(x, 0xFF, 2, 0)
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#define ZMOH 0x5B /* Zoom: Out Height OUTH[7:0] (real/4) */
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#define ZMOH_OUTH_SET(x) VAL_SET(x, 0xFF, 2, 0)
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#define ZMHH 0x5C /* Zoom: Speed and H&W completion */
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#define ZMHH_ZSPEED_SET(x) VAL_SET(x, 0x0F, 0, 4)
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#define ZMHH_OUTH_SET(x) VAL_SET(x, 0x1, (8+2), 2)
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#define ZMHH_OUTW_SET(x) VAL_SET(x, 0x3, (8+2), 0)
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#define BPADDR 0x7C /* SDE Indirect Register Access: Address */
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#define BPDATA 0x7D /* SDE Indirect Register Access: Data */
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#define CTRL2 0x86 /* DSP Module enable 2 */
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#define CTRL2_DCW_EN 0x20
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#define CTRL2_SDE_EN 0x10
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#define CTRL2_UV_ADJ_EN 0x08
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#define CTRL2_UV_AVG_EN 0x04
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#define CTRL2_CMX_EN 0x01
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#define CTRL3 0x87 /* DSP Module enable 3 */
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#define CTRL3_BPC_EN 0x80
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#define CTRL3_WPC_EN 0x40
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#define SIZEL 0x8C /* Image Size Completion */
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#define SIZEL_HSIZE8_11_SET(x) VAL_SET(x, 0x1, 11, 6)
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#define SIZEL_HSIZE8_SET(x) VAL_SET(x, 0x7, 0, 3)
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#define SIZEL_VSIZE8_SET(x) VAL_SET(x, 0x7, 0, 0)
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#define HSIZE8 0xC0 /* Image Horizontal Size HSIZE[10:3] */
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#define HSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
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#define VSIZE8 0xC1 /* Image Vertical Size VSIZE[10:3] */
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#define VSIZE8_SET(x) VAL_SET(x, 0xFF, 3, 0)
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#define CTRL0 0xC2 /* DSP Module enable 0 */
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#define CTRL0_AEC_EN 0x80
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#define CTRL0_AEC_SEL 0x40
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#define CTRL0_STAT_SEL 0x20
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#define CTRL0_VFIRST 0x10
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#define CTRL0_YUV422 0x08
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#define CTRL0_YUV_EN 0x04
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#define CTRL0_RGB_EN 0x02
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#define CTRL0_RAW_EN 0x01
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#define CTRL1 0xC3 /* DSP Module enable 1 */
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#define CTRL1_CIP 0x80
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#define CTRL1_DMY 0x40
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#define CTRL1_RAW_GMA 0x20
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#define CTRL1_DG 0x10
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#define CTRL1_AWB 0x08
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#define CTRL1_AWB_GAIN 0x04
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#define CTRL1_LENC 0x02
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#define CTRL1_PRE 0x01
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#define R_DVP_SP 0xD3 /* DVP output speed control */
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#define R_DVP_SP_AUTO_MODE 0x80
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#define R_DVP_SP_DVP_MASK 0x3F /* DVP PCLK = sysclk (48)/[6:0] (YUV0);
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* = sysclk (48)/(2*[6:0]) (RAW);*/
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#define IMAGE_MODE 0xDA /* Image Output Format Select */
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#define IMAGE_MODE_Y8_DVP_EN 0x40
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#define IMAGE_MODE_JPEG_EN 0x10
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#define IMAGE_MODE_YUV422 0x00
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#define IMAGE_MODE_RAW10 0x04 /* (DVP) */
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#define IMAGE_MODE_RGB565 0x08
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#define IMAGE_MODE_HREF_VSYNC 0x02 /* HREF timing select in DVP JPEG output
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* mode (0 for HREF is same as sensor) */
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#define IMAGE_MODE_LBYTE_FIRST 0x01 /* Byte swap enable for DVP
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* 1: Low byte first UYVY (C2[4] =0)
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* VYUY (C2[4] =1)
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* 0: High byte first YUYV (C2[4]=0)
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* YVYU (C2[4] = 1) */
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#define RESET 0xE0 /* Reset */
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#define RESET_MICROC 0x40
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#define RESET_SCCB 0x20
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#define RESET_JPEG 0x10
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#define RESET_DVP 0x04
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#define RESET_IPU 0x02
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#define RESET_CIF 0x01
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#define REGED 0xED /* Register ED */
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#define REGED_CLK_OUT_DIS 0x10
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#define MS_SP 0xF0 /* SCCB Master Speed */
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#define SS_ID 0xF7 /* SCCB Slave ID */
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#define SS_CTRL 0xF8 /* SCCB Slave Control */
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#define SS_CTRL_ADD_AUTO_INC 0x20
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#define SS_CTRL_EN 0x08
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#define SS_CTRL_DELAY_CLK 0x04
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#define SS_CTRL_ACC_EN 0x02
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#define SS_CTRL_SEN_PASS_THR 0x01
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#define MC_BIST 0xF9 /* Microcontroller misc register */
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#define MC_BIST_RESET 0x80 /* Microcontroller Reset */
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#define MC_BIST_BOOT_ROM_SEL 0x40
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#define MC_BIST_12KB_SEL 0x20
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#define MC_BIST_12KB_MASK 0x30
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#define MC_BIST_512KB_SEL 0x08
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#define MC_BIST_512KB_MASK 0x0C
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#define MC_BIST_BUSY_BIT_R 0x02
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#define MC_BIST_MC_RES_ONE_SH_W 0x02
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#define MC_BIST_LAUNCH 0x01
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#define BANK_SEL 0xFF /* Register Bank Select */
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#define BANK_SEL_DSP 0x00
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#define BANK_SEL_SENS 0x01
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/*
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* Sensor registers
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* register offset for BANK_SEL == BANK_SEL_SENS
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*/
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#define GAIN 0x00 /* AGC - Gain control gain setting */
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#define COM1 0x03 /* Common control 1 */
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#define COM1_1_DUMMY_FR 0x40
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#define COM1_3_DUMMY_FR 0x80
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#define COM1_7_DUMMY_FR 0xC0
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#define COM1_VWIN_LSB_UXGA 0x0F
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#define COM1_VWIN_LSB_SVGA 0x0A
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#define COM1_VWIN_LSB_CIF 0x06
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#define REG04 0x04 /* Register 04 */
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#define REG04_DEF 0x20 /* Always set */
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#define REG04_HFLIP_IMG 0x80 /* Horizontal mirror image ON/OFF */
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#define REG04_VFLIP_IMG 0x40 /* Vertical flip image ON/OFF */
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#define REG04_VREF_EN 0x10
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#define REG04_HREF_EN 0x08
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#define REG04_AEC_SET(x) VAL_SET(x, 0x3, 0, 0)
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#define REG08 0x08 /* Frame Exposure One-pin Control Pre-charge Row Num */
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#define COM2 0x09 /* Common control 2 */
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#define COM2_SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
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/* Output drive capability */
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#define COM2_OCAP_Nx_SET(N) (((N) - 1) & 0x03) /* N = [1x .. 4x] */
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#define PID 0x0A /* Product ID Number MSB */
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#define VER 0x0B /* Product ID Number LSB */
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#define COM3 0x0C /* Common control 3 */
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#define COM3_BAND_50H 0x04 /* 0 For Banding at 60H */
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#define COM3_BAND_AUTO 0x02 /* Auto Banding */
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#define COM3_SING_FR_SNAPSH 0x01 /* 0 For enable live video output after the
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* snapshot sequence*/
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#define AEC 0x10 /* AEC[9:2] Exposure Value */
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#define CLKRC 0x11 /* Internal clock */
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#define CLKRC_EN 0x80
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#define CLKRC_DIV_SET(x) (((x) - 1) & 0x1F) /* CLK = XVCLK/(x) */
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#define COM7 0x12 /* Common control 7 */
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#define COM7_SRST 0x80 /* Initiates system reset. All registers are
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* set to factory default values after which
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* the chip resumes normal operation */
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#define COM7_RES_UXGA 0x00 /* Resolution selectors for UXGA */
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#define COM7_RES_SVGA 0x40 /* SVGA */
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#define COM7_RES_CIF 0x20 /* CIF */
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#define COM7_ZOOM_EN 0x04 /* Enable Zoom mode */
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#define COM7_COLOR_BAR_TEST 0x02 /* Enable Color Bar Test Pattern */
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#define COM8 0x13 /* Common control 8 */
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#define COM8_DEF 0xC0 /* Banding filter ON/OFF */
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#define COM8_BNDF_EN 0x20 /* Banding filter ON/OFF */
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#define COM8_AGC_EN 0x04 /* AGC Auto/Manual control selection */
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#define COM8_AEC_EN 0x01 /* Auto/Manual Exposure control */
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#define COM9 0x14 /* Common control 9
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* Automatic gain ceiling - maximum AGC value [7:5]*/
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#define COM9_AGC_GAIN_2x 0x00 /* 000 : 2x */
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#define COM9_AGC_GAIN_4x 0x20 /* 001 : 4x */
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#define COM9_AGC_GAIN_8x 0x40 /* 010 : 8x */
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#define COM9_AGC_GAIN_16x 0x60 /* 011 : 16x */
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#define COM9_AGC_GAIN_32x 0x80 /* 100 : 32x */
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#define COM9_AGC_GAIN_64x 0xA0 /* 101 : 64x */
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#define COM9_AGC_GAIN_128x 0xC0 /* 110 : 128x */
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#define COM10 0x15 /* Common control 10 */
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#define COM10_PCLK_HREF 0x20 /* PCLK output qualified by HREF */
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#define COM10_PCLK_RISE 0x10 /* Data is updated at the rising edge of
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* PCLK (user can latch data at the next
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* falling edge of PCLK).
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* 0 otherwise. */
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#define COM10_HREF_INV 0x08 /* Invert HREF polarity:
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* HREF negative for valid data*/
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#define COM10_VSYNC_INV 0x02 /* Invert VSYNC polarity */
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#define HSTART 0x17 /* Horizontal Window start MSB 8 bit */
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#define HEND 0x18 /* Horizontal Window end MSB 8 bit */
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#define VSTART 0x19 /* Vertical Window start MSB 8 bit */
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#define VEND 0x1A /* Vertical Window end MSB 8 bit */
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#define MIDH 0x1C /* Manufacturer ID byte - high */
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#define MIDL 0x1D /* Manufacturer ID byte - low */
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#define AEW 0x24 /* AGC/AEC - Stable operating region (upper limit) */
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#define AEB 0x25 /* AGC/AEC - Stable operating region (lower limit) */
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#define VV 0x26 /* AGC/AEC Fast mode operating region */
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#define VV_HIGH_TH_SET(x) VAL_SET(x, 0xF, 0, 4)
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#define VV_LOW_TH_SET(x) VAL_SET(x, 0xF, 0, 0)
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#define REG2A 0x2A /* Dummy pixel insert MSB */
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#define FRARL 0x2B /* Dummy pixel insert LSB */
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#define ADDVFL 0x2D /* LSB of insert dummy lines in Vertical direction */
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#define ADDVFH 0x2E /* MSB of insert dummy lines in Vertical direction */
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#define YAVG 0x2F /* Y/G Channel Average value */
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#define REG32 0x32 /* Common Control 32 */
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#define REG32_PCLK_DIV_2 0x80 /* PCLK freq divided by 2 */
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#define REG32_PCLK_DIV_4 0xC0 /* PCLK freq divided by 4 */
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#define ARCOM2 0x34 /* Zoom: Horizontal start point */
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#define REG45 0x45 /* Register 45 */
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#define FLL 0x46 /* Frame Length Adjustment LSBs */
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#define FLH 0x47 /* Frame Length Adjustment MSBs */
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#define COM19 0x48 /* Zoom: Vertical start point */
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#define ZOOMS 0x49 /* Zoom: Vertical start point */
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#define COM22 0x4B /* Flash light control */
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#define COM25 0x4E /* For Banding operations */
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#define BD50 0x4F /* 50Hz Banding AEC 8 LSBs */
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#define BD60 0x50 /* 60Hz Banding AEC 8 LSBs */
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#define REG5D 0x5D /* AVGsel[7:0], 16-zone average weight option */
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#define REG5E 0x5E /* AVGsel[15:8], 16-zone average weight option */
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#define REG5F 0x5F /* AVGsel[23:16], 16-zone average weight option */
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#define REG60 0x60 /* AVGsel[31:24], 16-zone average weight option */
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#define HISTO_LOW 0x61 /* Histogram Algorithm Low Level */
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#define HISTO_HIGH 0x62 /* Histogram Algorithm High Level */
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#define MANUFACTURER_ID 0x7FA2
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#define PID_OV2640 0x2626
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#define VERSION(pid, ver) ((pid << 8) | (ver & 0xFF))
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struct regval_list {
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uint8_t reg;
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uint8_t val;
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};
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/* Supported resolutions */
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enum ov2640_width {
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W_QCIF = 176,
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W_QVGA = 320,
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W_CIF = 352,
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W_VGA = 640,
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W_SVGA = 800,
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W_XGA = 1024,
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W_SXGA = 1280,
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W_UXGA = 1600,
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};
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enum ov2640_height {
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H_QCIF = 144,
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H_QVGA = 240,
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H_CIF = 288,
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H_VGA = 480,
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H_SVGA = 600,
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H_XGA = 768,
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H_SXGA = 1024,
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H_UXGA = 1200,
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};
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struct ov2640_win_size {
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char *name;
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enum ov2640_width width;
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enum ov2640_height height;
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const struct regval_list *regs;
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};
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/*
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* Registers settings. Most of them are undocumented. Some documentation is
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* is available in the OV2640 datasheet, the OV2640 hardware app notes and
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* the OV2640 software app notes documents.
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*/
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#define ENDMARKER { 0xff, 0xff }
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static const struct regval_list ov2640_init_regs[] = {
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{ BANK_SEL, BANK_SEL_DSP },
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{ 0x2c, 0xff },
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{ 0x2e, 0xdf },
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{ BANK_SEL, BANK_SEL_SENS },
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{ 0x3c, 0x32 },
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{ CLKRC, CLKRC_DIV_SET(8) },
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{ COM2, COM2_OCAP_Nx_SET(3) },
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{ REG04, REG04_DEF | REG04_HREF_EN },
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{ COM8, COM8_DEF | COM8_AGC_EN | COM8_AEC_EN | COM8_BNDF_EN },
|
||||
//~ { AEC, 0x00 },
|
||||
{ COM9, COM9_AGC_GAIN_8x | 0x08},
|
||||
//{ COM10, COM10_PCLK_RISE },
|
||||
{ 0x2c, 0x0c },
|
||||
{ 0x33, 0x78 },
|
||||
{ 0x3a, 0x33 },
|
||||
{ 0x3b, 0xfb },
|
||||
{ 0x3e, 0x00 },
|
||||
{ 0x43, 0x11 },
|
||||
{ 0x16, 0x10 },
|
||||
{ 0x39, 0x02 },
|
||||
{ 0x35, 0x88 },
|
||||
{ 0x22, 0x0a },
|
||||
{ 0x37, 0x40 },
|
||||
{ 0x23, 0x00 },
|
||||
{ ARCOM2, 0xa0 },
|
||||
{ 0x06, 0x02 },
|
||||
{ 0x06, 0x88 },
|
||||
{ 0x07, 0xc0 },
|
||||
{ 0x0d, 0xb7 },
|
||||
{ 0x0e, 0x01 },
|
||||
{ 0x4c, 0x00 },
|
||||
{ 0x4a, 0x81 },
|
||||
{ 0x21, 0x99 },
|
||||
{ AEW, 0x40 },
|
||||
{ AEB, 0x38 },
|
||||
{ VV, VV_HIGH_TH_SET(0x08) | VV_LOW_TH_SET(0x02) },
|
||||
{ 0x5c, 0x00 },
|
||||
{ 0x63, 0x00 },
|
||||
{ FLL, 0x22 },
|
||||
{ COM3, 0x38 | COM3_BAND_AUTO },
|
||||
{ REG5D, 0x55 },
|
||||
{ REG5E, 0x7d },
|
||||
{ REG5F, 0x7d },
|
||||
{ REG60, 0x55 },
|
||||
{ HISTO_LOW, 0x70 },
|
||||
{ HISTO_HIGH, 0x80 },
|
||||
{ 0x7c, 0x05 },
|
||||
{ 0x20, 0x80 },
|
||||
{ 0x28, 0x30 },
|
||||
{ 0x6c, 0x00 },
|
||||
{ 0x6d, 0x80 },
|
||||
{ 0x6e, 0x00 },
|
||||
{ 0x70, 0x02 },
|
||||
{ 0x71, 0x94 },
|
||||
{ 0x73, 0xc1 },
|
||||
{ 0x3d, 0x34 },
|
||||
{ COM7, COM7_RES_UXGA | COM7_ZOOM_EN },
|
||||
{ 0x5a, 0x57 },
|
||||
{ BD50, 0xbb },
|
||||
{ BD60, 0x9c },
|
||||
{ BANK_SEL, BANK_SEL_DSP },
|
||||
{ 0xe5, 0x7f },
|
||||
{ MC_BIST, MC_BIST_RESET | MC_BIST_BOOT_ROM_SEL },
|
||||
{ 0x41, 0x24 },
|
||||
{ RESET, RESET_JPEG | RESET_DVP },
|
||||
{ 0x76, 0xff },
|
||||
{ 0x33, 0xa0 },
|
||||
{ 0x42, 0x20 },
|
||||
{ 0x43, 0x18 },
|
||||
{ 0x4c, 0x00 },
|
||||
{ CTRL3, CTRL3_BPC_EN | CTRL3_WPC_EN | 0x10 },
|
||||
{ 0x88, 0x3f },
|
||||
{ 0xd7, 0x03 },
|
||||
{ 0xd9, 0x10 },
|
||||
{ R_DVP_SP , R_DVP_SP_AUTO_MODE | 0x2 },
|
||||
{ 0xc8, 0x08 },
|
||||
{ 0xc9, 0x80 },
|
||||
{ BPADDR, 0x00 },
|
||||
{ BPDATA, 0x00 },
|
||||
{ BPADDR, 0x03 },
|
||||
{ BPDATA, 0x48 },
|
||||
{ BPDATA, 0x48 },
|
||||
{ BPADDR, 0x08 },
|
||||
{ BPDATA, 0x20 },
|
||||
{ BPDATA, 0x10 },
|
||||
{ BPDATA, 0x0e },
|
||||
{ 0x90, 0x00 },
|
||||
{ 0x91, 0x0e },
|
||||
{ 0x91, 0x1a },
|
||||
{ 0x91, 0x31 },
|
||||
{ 0x91, 0x5a },
|
||||
{ 0x91, 0x69 },
|
||||
{ 0x91, 0x75 },
|
||||
{ 0x91, 0x7e },
|
||||
{ 0x91, 0x88 },
|
||||
{ 0x91, 0x8f },
|
||||
{ 0x91, 0x96 },
|
||||
{ 0x91, 0xa3 },
|
||||
{ 0x91, 0xaf },
|
||||
{ 0x91, 0xc4 },
|
||||
{ 0x91, 0xd7 },
|
||||
{ 0x91, 0xe8 },
|
||||
{ 0x91, 0x20 },
|
||||
{ 0x92, 0x00 },
|
||||
{ 0x93, 0x06 },
|
||||
{ 0x93, 0xe3 },
|
||||
{ 0x93, 0x03 },
|
||||
{ 0x93, 0x03 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x93, 0x02 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x93, 0x00 },
|
||||
{ 0x96, 0x00 },
|
||||
{ 0x97, 0x08 },
|
||||
{ 0x97, 0x19 },
|
||||
{ 0x97, 0x02 },
|
||||
{ 0x97, 0x0c },
|
||||
{ 0x97, 0x24 },
|
||||
{ 0x97, 0x30 },
|
||||
{ 0x97, 0x28 },
|
||||
{ 0x97, 0x26 },
|
||||
{ 0x97, 0x02 },
|
||||
{ 0x97, 0x98 },
|
||||
{ 0x97, 0x80 },
|
||||
{ 0x97, 0x00 },
|
||||
{ 0x97, 0x00 },
|
||||
{ 0xa4, 0x00 },
|
||||
{ 0xa8, 0x00 },
|
||||
{ 0xc5, 0x11 },
|
||||
{ 0xc6, 0x51 },
|
||||
{ 0xbf, 0x80 },
|
||||
{ 0xc7, 0x10 }, /* white balance */
|
||||
{ 0xb6, 0x66 },
|
||||
{ 0xb8, 0xA5 },
|
||||
{ 0xb7, 0x64 },
|
||||
{ 0xb9, 0x7C },
|
||||
{ 0xb3, 0xaf },
|
||||
{ 0xb4, 0x97 },
|
||||
{ 0xb5, 0xFF },
|
||||
{ 0xb0, 0xC5 },
|
||||
{ 0xb1, 0x94 },
|
||||
{ 0xb2, 0x0f },
|
||||
{ 0xc4, 0x5c },
|
||||
{ 0xa6, 0x00 },
|
||||
{ 0xa7, 0x20 },
|
||||
{ 0xa7, 0xd8 },
|
||||
{ 0xa7, 0x1b },
|
||||
{ 0xa7, 0x31 },
|
||||
{ 0xa7, 0x00 },
|
||||
{ 0xa7, 0x18 },
|
||||
{ 0xa7, 0x20 },
|
||||
{ 0xa7, 0xd8 },
|
||||
{ 0xa7, 0x19 },
|
||||
{ 0xa7, 0x31 },
|
||||
{ 0xa7, 0x00 },
|
||||
{ 0xa7, 0x18 },
|
||||
{ 0xa7, 0x20 },
|
||||
{ 0xa7, 0xd8 },
|
||||
{ 0xa7, 0x19 },
|
||||
{ 0xa7, 0x31 },
|
||||
{ 0xa7, 0x00 },
|
||||
{ 0xa7, 0x18 },
|
||||
{ 0x7f, 0x00 },
|
||||
{ 0xe5, 0x1f },
|
||||
{ 0xe1, 0x77 },
|
||||
{ 0xdd, 0x7f },
|
||||
{ QS, 0x0C },
|
||||
{ CTRL0, CTRL0_YUV422 | CTRL0_YUV_EN },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
/*
|
||||
* Register settings for window size
|
||||
* The preamble, setup the internal DSP to input an UXGA (1600x1200) image.
|
||||
* Then the different zooming configurations will setup the output image size.
|
||||
*/
|
||||
static const struct regval_list ov2640_size_change_preamble_regs[] = {
|
||||
{ BANK_SEL, BANK_SEL_DSP },
|
||||
{ RESET, RESET_DVP },
|
||||
{ HSIZE8, HSIZE8_SET(W_UXGA) },
|
||||
{ VSIZE8, VSIZE8_SET(H_UXGA) },
|
||||
{ CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
|
||||
CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
|
||||
{ HSIZE, HSIZE_SET(W_UXGA) },
|
||||
{ VSIZE, VSIZE_SET(H_UXGA) },
|
||||
{ XOFFL, XOFFL_SET(0) },
|
||||
{ YOFFL, YOFFL_SET(0) },
|
||||
{ VHYX, VHYX_HSIZE_SET(W_UXGA) | VHYX_VSIZE_SET(H_UXGA) |
|
||||
VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)},
|
||||
{ TEST, TEST_HSIZE_SET(W_UXGA) },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
#define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div) \
|
||||
{ CTRLI, CTRLI_LP_DP | CTRLI_V_DIV_SET(v_div) | \
|
||||
CTRLI_H_DIV_SET(h_div)}, \
|
||||
{ ZMOW, ZMOW_OUTW_SET(x) }, \
|
||||
{ ZMOH, ZMOH_OUTH_SET(y) }, \
|
||||
{ ZMHH, ZMHH_OUTW_SET(x) | ZMHH_OUTH_SET(y) }, \
|
||||
{ R_DVP_SP, pclk_div }, \
|
||||
{ RESET, 0x00}
|
||||
|
||||
static const struct regval_list ov2640_qcif_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_QCIF, H_QCIF, 3, 3, 4),
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_qvga_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_QVGA, H_QVGA, 2, 2, 4),
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_cif_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_CIF, H_CIF, 2, 2, 8),
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_vga_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_VGA, H_VGA, 0, 0, 2),
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_svga_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_SVGA, H_SVGA, 1, 1, 2),
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_xga_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_XGA, H_XGA, 0, 0, 2),
|
||||
{ CTRLI, 0x00},
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_sxga_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_SXGA, H_SXGA, 0, 0, 2),
|
||||
{ CTRLI, 0x00},
|
||||
{ R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_uxga_regs[] = {
|
||||
PER_SIZE_REG_SEQ(W_UXGA, H_UXGA, 0, 0, 0),
|
||||
{ CTRLI, 0x00},
|
||||
{ R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
#define OV2640_SIZE(n, w, h, r) \
|
||||
{.name = n, .width = w , .height = h, .regs = r }
|
||||
|
||||
static const struct ov2640_win_size ov2640_supported_win_sizes[] = {
|
||||
OV2640_SIZE("QCIF", W_QCIF, H_QCIF, ov2640_qcif_regs),
|
||||
OV2640_SIZE("QVGA", W_QVGA, H_QVGA, ov2640_qvga_regs),
|
||||
OV2640_SIZE("CIF", W_CIF, H_CIF, ov2640_cif_regs),
|
||||
OV2640_SIZE("VGA", W_VGA, H_VGA, ov2640_vga_regs),
|
||||
OV2640_SIZE("SVGA", W_SVGA, H_SVGA, ov2640_svga_regs),
|
||||
OV2640_SIZE("XGA", W_XGA, H_XGA, ov2640_xga_regs),
|
||||
OV2640_SIZE("SXGA", W_SXGA, H_SXGA, ov2640_sxga_regs),
|
||||
OV2640_SIZE("UXGA", W_UXGA, H_UXGA, ov2640_uxga_regs),
|
||||
};
|
||||
|
||||
/*
|
||||
* Register settings for pixel formats
|
||||
*/
|
||||
static const struct regval_list ov2640_format_change_preamble_regs[] = {
|
||||
{ BANK_SEL, BANK_SEL_DSP },
|
||||
{ R_BYPASS, R_BYPASS_USE_DSP },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_yuyv_regs[] = {
|
||||
{ IMAGE_MODE, IMAGE_MODE_YUV422 },
|
||||
{ 0xd7, 0x03 },
|
||||
{ 0x33, 0xa0 },
|
||||
{ 0xe5, 0x1f },
|
||||
{ 0xe1, 0x67 },
|
||||
{ RESET, 0x00 },
|
||||
{ R_BYPASS, R_BYPASS_USE_DSP },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_uyvy_regs[] = {
|
||||
{ IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_YUV422 },
|
||||
{ 0xd7, 0x01 },
|
||||
{ 0x33, 0xa0 },
|
||||
{ 0xe1, 0x67 },
|
||||
{ RESET, 0x00 },
|
||||
{ R_BYPASS, R_BYPASS_USE_DSP },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_rgb565_be_regs[] = {
|
||||
{ IMAGE_MODE, IMAGE_MODE_RGB565 },
|
||||
{ 0xd7, 0x03 },
|
||||
{ RESET, 0x00 },
|
||||
{ R_BYPASS, R_BYPASS_USE_DSP },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_rgb565_le_regs[] = {
|
||||
{ IMAGE_MODE, IMAGE_MODE_LBYTE_FIRST | IMAGE_MODE_RGB565 },
|
||||
{ 0xd7, 0x03 },
|
||||
{ RESET, 0x00 },
|
||||
{ R_BYPASS, R_BYPASS_USE_DSP },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
static const struct regval_list ov2640_jpeg_regs[] = {
|
||||
{ BANK_SEL, BANK_SEL_DSP },
|
||||
{ 0xe0, 0x14 },
|
||||
{ 0xe1, 0x77 },
|
||||
{ 0xe5, 0x1f },
|
||||
{ 0xd7, 0x03 },
|
||||
{ IMAGE_MODE, IMAGE_MODE_JPEG_EN },
|
||||
{ 0xe0, 0x00 },
|
||||
{ BANK_SEL, BANK_SEL_SENS },
|
||||
{ 0x04, 0x08 },
|
||||
ENDMARKER,
|
||||
};
|
||||
|
||||
ssdv_conf_t *ov2640_conf;
|
||||
uint32_t size;
|
||||
|
||||
/**
|
||||
* Captures an image from the camera.
|
||||
*/
|
||||
bool OV2640_Snapshot2RAM(void)
|
||||
{
|
||||
// Capture enable
|
||||
TRACE_INFO("CAM > Capture image");
|
||||
OV2640_Capture();
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool OV2640_BufferOverflow(void)
|
||||
{
|
||||
return ov2640_conf->ram_buffer[0] != 0xFF || ov2640_conf->ram_buffer[1] != 0xD8; // Check for JPEG SOI header
|
||||
}
|
||||
|
||||
uint32_t OV2640_getBuffer(uint8_t** buffer) {
|
||||
*buffer = ov2640_conf->ram_buffer;
|
||||
return ov2640_conf->size_sampled;
|
||||
}
|
||||
|
||||
|
||||
bool OV2640_Capture(void)
|
||||
{
|
||||
TRACE_INFO("CAM > Start capture");
|
||||
while(palReadLine(LINE_CAM_VSYNC));
|
||||
while(!palReadLine(LINE_CAM_VSYNC));
|
||||
uint8_t gpioc;
|
||||
uint8_t gpioa;
|
||||
ov2640_conf->size_sampled = 0;
|
||||
while(true)
|
||||
{
|
||||
do {
|
||||
gpioc = GPIOC->IDR & 0x7;
|
||||
} while((gpioc & 0x1) != 0x1); // Wait for PCLK to rise
|
||||
gpioa = GPIOA->IDR;
|
||||
switch(gpioc) {
|
||||
case 0x3:
|
||||
break;
|
||||
case 0x7:
|
||||
ov2640_conf->ram_buffer[ov2640_conf->size_sampled++] = gpioa;
|
||||
break;
|
||||
default:
|
||||
return true;
|
||||
}
|
||||
// Wait for falling edge
|
||||
while(GPIOC->IDR & 0x1);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Initializes GPIO (for DCMI)
|
||||
* The high speed clock supports communication by I2C (XCLK = 16MHz)
|
||||
*/
|
||||
void OV2640_InitGPIO(void)
|
||||
{
|
||||
palSetLineMode(LINE_CAM_HREF, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_PCLK, PAL_MODE_ALTERNATE(1));
|
||||
palSetLineMode(LINE_CAM_VSYNC, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_XCLK, PAL_MODE_ALTERNATE(0));
|
||||
palSetLineMode(LINE_CAM_D2, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_D3, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_D4, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_D5, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_D6, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_D7, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_D8, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(LINE_CAM_D9, PAL_MODE_INPUT | PAL_STM32_OSPEED_HIGHEST);
|
||||
|
||||
palSetLineMode(LINE_CAM_EN, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
palSetLineMode(LINE_CAM_RESET, PAL_MODE_OUTPUT_PUSHPULL);
|
||||
}
|
||||
|
||||
void OV2640_TransmitConfig(void)
|
||||
{
|
||||
// Set to page 1
|
||||
I2C_write8(OV2640_I2C_ADR, 0xff, 0x01);
|
||||
I2C_write8(OV2640_I2C_ADR, 0x12, 0x80);
|
||||
chThdSleepMilliseconds(50);
|
||||
|
||||
/* Write selected arrays to the camera to initialize it and set the
|
||||
* desired output format. */
|
||||
for(uint32_t i=0; (ov2640_init_regs[i].reg != 0xff) || (ov2640_init_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_init_regs[i].reg, ov2640_init_regs[i].val);
|
||||
|
||||
for(uint32_t i=0; (ov2640_size_change_preamble_regs[i].reg != 0xff) || (ov2640_size_change_preamble_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_size_change_preamble_regs[i].reg, ov2640_size_change_preamble_regs[i].val);
|
||||
|
||||
switch(ov2640_conf->res) {
|
||||
case RES_QCIF:
|
||||
for(uint32_t i=0; (ov2640_qcif_regs[i].reg != 0xff) || (ov2640_qcif_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_qcif_regs[i].reg, ov2640_qcif_regs[i].val);
|
||||
break;
|
||||
|
||||
case RES_QVGA:
|
||||
for(uint32_t i=0; (ov2640_qvga_regs[i].reg != 0xff) || (ov2640_qvga_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_qvga_regs[i].reg, ov2640_qvga_regs[i].val);
|
||||
break;
|
||||
|
||||
case RES_VGA:
|
||||
for(uint32_t i=0; (ov2640_vga_regs[i].reg != 0xff) || (ov2640_vga_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_vga_regs[i].reg, ov2640_vga_regs[i].val);
|
||||
break;
|
||||
|
||||
case RES_XGA:
|
||||
for(uint32_t i=0; (ov2640_xga_regs[i].reg != 0xff) || (ov2640_xga_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_xga_regs[i].reg, ov2640_xga_regs[i].val);
|
||||
break;
|
||||
|
||||
case RES_UXGA:
|
||||
for(uint32_t i=0; (ov2640_uxga_regs[i].reg != 0xff) || (ov2640_uxga_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_uxga_regs[i].reg, ov2640_uxga_regs[i].val);
|
||||
break;
|
||||
|
||||
default: // Default QVGA
|
||||
for(uint32_t i=0; (ov2640_qvga_regs[i].reg != 0xff) || (ov2640_qvga_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_qvga_regs[i].reg, ov2640_qvga_regs[i].val);
|
||||
}
|
||||
|
||||
for(uint32_t i=0; (ov2640_format_change_preamble_regs[i].reg != 0xff) || (ov2640_format_change_preamble_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_format_change_preamble_regs[i].reg, ov2640_format_change_preamble_regs[i].val);
|
||||
for(uint32_t i=0; (ov2640_yuyv_regs[i].reg != 0xff) || (ov2640_yuyv_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_yuyv_regs[i].reg, ov2640_yuyv_regs[i].val);
|
||||
|
||||
for(uint32_t i=0; (ov2640_jpeg_regs[i].reg != 0xff) || (ov2640_jpeg_regs[i].val != 0xff); i++)
|
||||
I2C_write8(OV2640_I2C_ADR, ov2640_jpeg_regs[i].reg, ov2640_jpeg_regs[i].val);
|
||||
}
|
||||
|
||||
void OV2640_init(ssdv_conf_t *config) {
|
||||
ov2640_conf = config;
|
||||
|
||||
// Clearing buffer
|
||||
uint32_t i;
|
||||
for(i=0; i<ov2640_conf->ram_size; i++)
|
||||
ov2640_conf->ram_buffer[i] = 0;
|
||||
|
||||
TRACE_INFO("CAM > Init pins");
|
||||
OV2640_InitGPIO();
|
||||
|
||||
// Power on OV2640
|
||||
TRACE_INFO("CAM > Switch on");
|
||||
palSetLine(LINE_CAM_EN); // Switch on camera
|
||||
palSetLine(LINE_CAM_RESET); // Toggle reset
|
||||
|
||||
// Send settings to OV2640
|
||||
TRACE_INFO("CAM > Transmit config to camera");
|
||||
OV2640_TransmitConfig();
|
||||
|
||||
chThdSleepMilliseconds(3000);
|
||||
}
|
||||
|
||||
void OV2640_deinit(void) {
|
||||
// Power off OV2640
|
||||
TRACE_INFO("CAM > Switch off");
|
||||
|
||||
palSetLineMode(LINE_CAM_HREF, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_PCLK, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_VSYNC, PAL_MODE_INPUT);
|
||||
|
||||
palSetLineMode(LINE_CAM_XCLK, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D2, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D3, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D4, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D5, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D6, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D7, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D8, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_D9, PAL_MODE_INPUT);
|
||||
|
||||
palSetLineMode(LINE_CAM_EN, PAL_MODE_INPUT);
|
||||
palSetLineMode(LINE_CAM_RESET, PAL_MODE_INPUT);
|
||||
}
|
||||
|
||||
bool OV2640_isAvailable(void)
|
||||
{
|
||||
// Configure pins
|
||||
OV2640_InitGPIO();
|
||||
|
||||
// Switch on camera
|
||||
palSetLine(LINE_CAM_EN); // Switch on camera
|
||||
palSetLine(LINE_CAM_RESET); // Toggle reset
|
||||
|
||||
chThdSleepMilliseconds(100);
|
||||
|
||||
uint16_t val;
|
||||
bool ret;
|
||||
if(I2C_read16(OV2640_I2C_ADR, 0x0A, &val))
|
||||
ret = val == PID_OV2640;
|
||||
else
|
||||
ret = false;
|
||||
|
||||
palClearLine(LINE_CAM_EN); // Switch off camera
|
||||
palSetLineMode(LINE_CAM_RESET, PAL_MODE_INPUT); // CAM_RESET
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
/**
|
||||
* This is the OV2640 driver
|
||||
*/
|
||||
|
||||
#ifndef __OV2640_H__
|
||||
#define __OV2640_H__
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
#include "types.h"
|
||||
|
||||
bool OV2640_Snapshot2RAM(void);
|
||||
bool OV2640_Capture(void);
|
||||
void OV2640_InitGPIO(void);
|
||||
uint32_t OV2640_getBuffer(uint8_t** buffer);
|
||||
bool OV2640_BufferOverflow(void);
|
||||
void OV2640_TransmitConfig(void);
|
||||
void OV2640_init(ssdv_conf_t *config);
|
||||
void OV2640_deinit(void);
|
||||
bool OV2640_isAvailable(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -30,10 +30,8 @@ int16_t pac1720_getPbat(void) {
|
|||
|
||||
if(I2C_read16(PAC1720_ADDRESS, PAC1720_CH2_PWR_RAT_HIGH, (uint16_t*)&val)) {
|
||||
I2C_read8(PAC1720_ADDRESS, PAC1720_CH2_VSENSE_HIGH, &sign);
|
||||
TRACE_DEBUG("%016x %02x", val, sign >> 7);
|
||||
return (sign >> 7 ? -1 : 1) * (val * fsp / 65535);
|
||||
} else {
|
||||
TRACE_DEBUG("bla");
|
||||
return 0; // PAC1720 not available (maybe Vcc too low)
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -3,7 +3,6 @@
|
|||
|
||||
#include "debug.h"
|
||||
#include "modules.h"
|
||||
#include "ov2640.h"
|
||||
#include "ov5640.h"
|
||||
#include "pi2c.h"
|
||||
#include "ssdv.h"
|
||||
|
|
@ -16,15 +15,273 @@
|
|||
#include "watchdog.h"
|
||||
#include "flash.h"
|
||||
|
||||
const uint8_t noCameraFound[] = {
|
||||
0xFF, 0xD8, 0xFF, 0xE0, 0x00, 0x10, 0x4A, 0x46, 0x49, 0x46, 0x00, 0x01, 0x01, 0x01, 0x00, 0x48,
|
||||
0x00, 0x48, 0x00, 0x00, 0xFF, 0xDB, 0x00, 0x43, 0x00, 0x10, 0x0B, 0x0C, 0x0E, 0x0C, 0x0A, 0x10,
|
||||
0x0E, 0x0D, 0x0E, 0x12, 0x11, 0x10, 0x13, 0x18, 0x28, 0x1A, 0x18, 0x16, 0x16, 0x18, 0x31, 0x23,
|
||||
0x25, 0x1D, 0x28, 0x3A, 0x33, 0x3D, 0x3C, 0x39, 0x33, 0x38, 0x37, 0x40, 0x48, 0x5C, 0x4E, 0x40,
|
||||
0x44, 0x57, 0x45, 0x37, 0x38, 0x50, 0x6D, 0x51, 0x57, 0x5F, 0x62, 0x67, 0x68, 0x67, 0x3E, 0x4D,
|
||||
0x71, 0x79, 0x70, 0x64, 0x78, 0x5C, 0x65, 0x67, 0x63, 0xFF, 0xDB, 0x00, 0x43, 0x01, 0x11, 0x12,
|
||||
0x12, 0x18, 0x15, 0x18, 0x2F, 0x1A, 0x1A, 0x2F, 0x63, 0x42, 0x38, 0x42, 0x63, 0x63, 0x63, 0x63,
|
||||
0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
|
||||
0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
|
||||
0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0xFF, 0xC0,
|
||||
0x00, 0x11, 0x08, 0x00, 0x80, 0x00, 0xA0, 0x03, 0x01, 0x11, 0x00, 0x02, 0x11, 0x01, 0x03, 0x11,
|
||||
0x01, 0xFF, 0xC4, 0x00, 0x1B, 0x00, 0x00, 0x02, 0x03, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x02, 0x04, 0x05, 0x07, 0x06, 0x01, 0xFF, 0xC4,
|
||||
0x00, 0x47, 0x10, 0x00, 0x00, 0x05, 0x02, 0x02, 0x05, 0x05, 0x0C, 0x06, 0x09, 0x05, 0x01, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x11, 0x12, 0x21, 0x06, 0x13, 0x31, 0x41,
|
||||
0x81, 0x14, 0x15, 0x16, 0x42, 0x51, 0x22, 0x32, 0x53, 0x54, 0x61, 0x71, 0x91, 0x92, 0xA1, 0xC1,
|
||||
0xE1, 0xE2, 0x36, 0x55, 0x63, 0x93, 0xA3, 0xB3, 0x23, 0x24, 0x52, 0x62, 0x64, 0x65, 0xA2, 0xB1,
|
||||
0xD1, 0x07, 0x35, 0x43, 0x74, 0x82, 0xB2, 0xFF, 0xC4, 0x00, 0x1A, 0x01, 0x01, 0x01, 0x00, 0x03,
|
||||
0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x02, 0x03,
|
||||
0x04, 0x06, 0x01, 0xFF, 0xC4, 0x00, 0x39, 0x11, 0x01, 0x00, 0x00, 0x03, 0x04, 0x06, 0x07, 0x05,
|
||||
0x08, 0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x11, 0x05, 0x12, 0x51, 0xC1,
|
||||
0x03, 0x04, 0x13, 0x31, 0x42, 0x81, 0x14, 0x15, 0x21, 0x43, 0x52, 0xA1, 0xE1, 0x06, 0x32, 0x33,
|
||||
0x61, 0x62, 0x16, 0x22, 0x41, 0x63, 0x71, 0x82, 0xA2, 0xE2, 0x23, 0x24, 0xD1, 0x91, 0xFF, 0xDA,
|
||||
0x00, 0x0C, 0x03, 0x01, 0x00, 0x02, 0x11, 0x03, 0x11, 0x00, 0x3F, 0x00, 0xF4, 0x00, 0x00, 0x0A,
|
||||
0x7F, 0xAB, 0xC4, 0x49, 0xB4, 0xF8, 0x39, 0xE4, 0xD9, 0x21, 0x22, 0x43, 0x60, 0x01, 0x5E, 0x66,
|
||||
0xC4, 0x71, 0xF7, 0x0B, 0xD6, 0x2F, 0x79, 0xCB, 0x34, 0x5B, 0x5F, 0x83, 0x9E, 0x4A, 0xC2, 0xF2,
|
||||
0x20, 0x00, 0x97, 0xFA, 0xBC, 0x44, 0x9B, 0x4F, 0x74, 0x9C, 0xF2, 0x67, 0x21, 0x22, 0x43, 0x60,
|
||||
0x00, 0x89, 0x7D, 0xEA, 0x3C, 0xE6, 0x2F, 0x58, 0xBD, 0xE7, 0x2C, 0xDE, 0x9B, 0xD9, 0xFE, 0xF7,
|
||||
0xF6, 0xE6, 0xAA, 0x2F, 0x3D, 0x30, 0x00, 0xA7, 0xFA, 0xBC, 0x44, 0x9B, 0x4F, 0x83, 0x9E, 0x4C,
|
||||
0xE4, 0x24, 0x48, 0x6C, 0x00, 0x2B, 0xCC, 0xD8, 0x8E, 0x3E, 0xE1, 0x7A, 0xC5, 0xEF, 0x39, 0x66,
|
||||
0x8B, 0x6B, 0xF0, 0x73, 0xC9, 0x58, 0x5E, 0x44, 0x00, 0x3A, 0xA8, 0xF2, 0x4E, 0x80, 0x01, 0x4F,
|
||||
0xF5, 0x78, 0x89, 0x36, 0x9F, 0x07, 0x3C, 0x9B, 0x24, 0x24, 0x48, 0x6C, 0x00, 0x2B, 0xCC, 0xD8,
|
||||
0x8E, 0x3E, 0xE1, 0x7A, 0xC5, 0xEF, 0x39, 0x66, 0x8B, 0x6B, 0xF0, 0x73, 0xC9, 0x58, 0x5E, 0x44,
|
||||
0x00, 0x12, 0xFF, 0x00, 0x57, 0x88, 0x93, 0x69, 0xEE, 0x93, 0x9E, 0x4C, 0xE4, 0x24, 0x48, 0x6C,
|
||||
0x00, 0x11, 0x2F, 0xBD, 0x47, 0x9C, 0xC5, 0xEB, 0x17, 0xBC, 0xE5, 0x9B, 0xD3, 0x7B, 0x3F, 0xDE,
|
||||
0xFE, 0xDC, 0xD5, 0x45, 0xE7, 0xA6, 0x00, 0x14, 0xFF, 0x00, 0x57, 0x88, 0x93, 0x69, 0xF0, 0x73,
|
||||
0xC9, 0x9C, 0x84, 0x89, 0x0D, 0x80, 0x05, 0x79, 0x9B, 0x11, 0xC7, 0xDC, 0x2F, 0x58, 0xBD, 0xE7,
|
||||
0x2C, 0xD1, 0x6D, 0x7E, 0x0E, 0x79, 0x2B, 0x0B, 0xC8, 0x80, 0x07, 0x55, 0x1E, 0x49, 0xD0, 0x00,
|
||||
0x29, 0xFE, 0xAF, 0x11, 0x26, 0xD3, 0xE0, 0xE7, 0x93, 0x64, 0x84, 0x89, 0x0D, 0x80, 0x05, 0x79,
|
||||
0x9B, 0x11, 0xC7, 0xDC, 0x2F, 0x58, 0xBD, 0xE7, 0x2C, 0xD1, 0x6D, 0x7E, 0x0E, 0x79, 0x2B, 0x0B,
|
||||
0xC8, 0x80, 0x02, 0x5F, 0xEA, 0xF1, 0x12, 0x6D, 0x3D, 0xD2, 0x73, 0xC9, 0x9C, 0x84, 0x89, 0x0D,
|
||||
0x80, 0x02, 0x25, 0xF7, 0xA8, 0xF3, 0x98, 0xBD, 0x62, 0xF7, 0x9C, 0xB3, 0x7A, 0x6F, 0x67, 0xFB,
|
||||
0xDF, 0xDB, 0x9A, 0xA8, 0xBC, 0xF4, 0xC0, 0x02, 0x9F, 0xEA, 0xF1, 0x12, 0x6D, 0x3E, 0x0E, 0x79,
|
||||
0x33, 0x90, 0x91, 0x21, 0xB0, 0x00, 0xAF, 0x33, 0x62, 0x38, 0xFB, 0x85, 0xEB, 0x17, 0xBC, 0xE5,
|
||||
0x9A, 0x2D, 0xAF, 0xC1, 0xCF, 0x25, 0x61, 0x79, 0x10, 0x00, 0xEA, 0xA3, 0xC9, 0x3A, 0x00, 0x05,
|
||||
0x3F, 0xD5, 0xE2, 0x24, 0xDA, 0x7C, 0x1C, 0xF2, 0x6C, 0x90, 0x91, 0x21, 0xB0, 0x00, 0xAF, 0x33,
|
||||
0x62, 0x38, 0xFB, 0x85, 0xEB, 0x17, 0xBC, 0xE5, 0x9A, 0x2D, 0xAF, 0xC1, 0xCF, 0x25, 0x61, 0x79,
|
||||
0x10, 0x00, 0x4B, 0xFD, 0x5E, 0x22, 0x4D, 0xA7, 0xBA, 0x4E, 0x79, 0x33, 0x90, 0x91, 0x21, 0xB0,
|
||||
0x00, 0x44, 0xBE, 0xF5, 0x1E, 0x73, 0x17, 0xAC, 0x5E, 0xF3, 0x96, 0x6F, 0x4D, 0xEC, 0xFF, 0x00,
|
||||
0x7B, 0xFB, 0x73, 0x55, 0x17, 0x9E, 0x98, 0x00, 0x53, 0xFD, 0x5E, 0x22, 0x4D, 0xA7, 0xC1, 0xCF,
|
||||
0x26, 0x72, 0x12, 0x24, 0x36, 0x00, 0x15, 0xE6, 0x6C, 0x47, 0x1F, 0x70, 0xBD, 0x62, 0xF7, 0x9C,
|
||||
0xB3, 0x45, 0xB5, 0xF8, 0x39, 0xE4, 0xAC, 0x2F, 0x22, 0x00, 0x1D, 0x54, 0x79, 0x27, 0x43, 0x0A,
|
||||
0xAF, 0xA4, 0xCC, 0xD2, 0xA6, 0x9C, 0x67, 0x23, 0xB8, 0xE2, 0x89, 0x24, 0xAC, 0x49, 0x32, 0x22,
|
||||
0xCC, 0x06, 0x7B, 0x9A, 0x6B, 0x1D, 0x76, 0xB4, 0x47, 0x4A, 0xDF, 0xBC, 0x43, 0x8F, 0x5B, 0xD5,
|
||||
0xA3, 0xA7, 0xBB, 0x48, 0xD2, 0x95, 0x65, 0x2C, 0xD4, 0x43, 0xA6, 0x31, 0xFC, 0x51, 0xDF, 0x58,
|
||||
0x87, 0x17, 0x56, 0x4F, 0xE2, 0x65, 0x7C, 0x74, 0xC6, 0x3F, 0x8A, 0x3B, 0xEB, 0x10, 0x75, 0x64,
|
||||
0xFE, 0x22, 0xF9, 0x4F, 0xE9, 0x6B, 0x0E, 0x92, 0x6D, 0x15, 0xC2, 0xB7, 0xEF, 0x10, 0xA3, 0xA8,
|
||||
0x68, 0x63, 0xAA, 0xDE, 0xAC, 0x6B, 0x5A, 0x79, 0x55, 0xC3, 0xAE, 0xEA, 0xF1, 0xD6, 0x2E, 0xD2,
|
||||
0x34, 0xA5, 0x72, 0x2B, 0xA4, 0xEC, 0xF8, 0xB3, 0x9E, 0xB1, 0x0A, 0x1B, 0x68, 0x60, 0xE0, 0xEA,
|
||||
0xC9, 0xFC, 0x43, 0xA4, 0xEC, 0xF8, 0xB3, 0x9E, 0xB1, 0x06, 0xDA, 0x18, 0x1D, 0x59, 0x3F, 0x89,
|
||||
0x07, 0x34, 0x91, 0x95, 0xDA, 0xD1, 0xD6, 0x56, 0xF2, 0x90, 0xE3, 0xD6, 0xE4, 0xDB, 0xDD, 0xA7,
|
||||
0x65, 0x2A, 0xCA, 0x5B, 0x3A, 0x68, 0x71, 0x21, 0xD2, 0x16, 0xBC, 0x02, 0xFD, 0x24, 0x38, 0xBA,
|
||||
0x1C, 0xD8, 0xB2, 0xE8, 0x13, 0x62, 0x3A, 0x42, 0xD7, 0x80, 0x5F, 0xA4, 0x83, 0xA1, 0xCD, 0x89,
|
||||
0xD0, 0x26, 0xC4, 0xB7, 0xAB, 0xAD, 0x3A, 0x49, 0x22, 0x65, 0x65, 0x6F, 0x29, 0x0A, 0x3A, 0x87,
|
||||
0xFA, 0xB7, 0xAB, 0xDB, 0x5A, 0x79, 0x55, 0x56, 0xCD, 0xFF, 0x00, 0x4E, 0xFD, 0xEE, 0xDA, 0xD3,
|
||||
0xCA, 0xBF, 0xF4, 0x9E, 0x77, 0x6F, 0xC1, 0x2B, 0xD2, 0x28, 0xF4, 0xC9, 0x70, 0x55, 0xE9, 0xF2,
|
||||
0xE0, 0x39, 0xDD, 0xBF, 0x04, 0xAF, 0x48, 0x74, 0xC9, 0x70, 0x3A, 0x7C, 0xB8, 0x20, 0xE5, 0x51,
|
||||
0x0B, 0xB5, 0x9B, 0x51, 0x5B, 0xCA, 0x38, 0xF5, 0xB9, 0xF6, 0xF7, 0x69, 0xD9, 0x4A, 0xB2, 0x96,
|
||||
0xD1, 0x96, 0x1C, 0x28, 0x73, 0x8A, 0x3C, 0x1A, 0xBD, 0x23, 0x8B, 0x63, 0x1C, 0x59, 0x75, 0x9C,
|
||||
0x9E, 0x11, 0xCE, 0x28, 0xF0, 0x6A, 0xF4, 0x86, 0xC6, 0x38, 0x9D, 0x67, 0x27, 0x84, 0xA7, 0xE6,
|
||||
0x25, 0xD2, 0x4D, 0x90, 0x65, 0x61, 0x47, 0x50, 0xD3, 0x43, 0x55, 0xBD, 0x58, 0x56, 0xB4, 0xF2,
|
||||
0xAB, 0x87, 0x5D, 0xD6, 0x21, 0xAC, 0x5D, 0xA4, 0x29, 0x4A, 0xE4, 0x5A, 0x5D, 0x25, 0x28, 0x8A,
|
||||
0xDB, 0x45, 0x4D, 0x16, 0xBF, 0x2E, 0x92, 0x78, 0x49, 0x08, 0x6F, 0x4F, 0x8C, 0x94, 0x30, 0x50,
|
||||
0x60, 0xEA, 0xA3, 0xC9, 0x3A, 0x18, 0x6C, 0x9B, 0x85, 0xA5, 0x55, 0x63, 0x65, 0xC4, 0xB4, 0xE9,
|
||||
0x52, 0x97, 0x81, 0xC5, 0x2B, 0x09, 0x20, 0xEE, 0x9B, 0x19, 0x99, 0xEC, 0xB7, 0x68, 0x08, 0xD3,
|
||||
0xA4, 0xB4, 0xFE, 0x93, 0xE8, 0xFA, 0x1C, 0x92, 0xC4, 0xBA, 0x8B, 0x68, 0x7C, 0xA5, 0x3E, 0xC9,
|
||||
0x92, 0x89, 0x57, 0x4A, 0xB0, 0x16, 0x22, 0xC8, 0xCC, 0x8A, 0xE0, 0x30, 0xE5, 0x4B, 0x4D, 0x5A,
|
||||
0x4C, 0x08, 0x4E, 0xD7, 0x64, 0xCE, 0x69, 0xD9, 0x48, 0x4A, 0xD0, 0xEB, 0x1A, 0xB2, 0x41, 0x19,
|
||||
0xDB, 0x15, 0xEE, 0x79, 0xE6, 0x60, 0x17, 0xA4, 0x95, 0x99, 0xBC, 0xB6, 0xA1, 0x4A, 0x49, 0xA5,
|
||||
0xA8, 0x08, 0x70, 0xDA, 0x44, 0x74, 0xA0, 0x89, 0x29, 0x24, 0x2B, 0x23, 0x2C, 0xB6, 0xE5, 0x7E,
|
||||
0x20, 0x3D, 0x0D, 0x6E, 0x94, 0xFA, 0x34, 0x35, 0x50, 0x8D, 0x85, 0xA5, 0x10, 0x18, 0x61, 0xF4,
|
||||
0x9D, 0xB6, 0xB8, 0x66, 0xAD, 0x6E, 0x7D, 0x84, 0x4A, 0xB8, 0x06, 0x9B, 0x69, 0x98, 0x5A, 0x38,
|
||||
0xDA, 0x52, 0x5A, 0xF8, 0x4C, 0x44, 0x90, 0x5B, 0x6E, 0xA6, 0xD6, 0x78, 0x17, 0x97, 0x90, 0xC9,
|
||||
0x07, 0xC4, 0xC0, 0x78, 0x5A, 0xE7, 0xFB, 0xED, 0x43, 0xFE, 0xCB, 0x9F, 0xFD, 0x18, 0x0A, 0x20,
|
||||
0x3D, 0x66, 0x88, 0x2A, 0x42, 0x28, 0x55, 0xD5, 0x43, 0x92, 0xDC, 0x57, 0xCB, 0x93, 0xE1, 0x75,
|
||||
0xC7, 0x09, 0x09, 0x4F, 0x74, 0xAB, 0xDC, 0xCF, 0x22, 0xCA, 0xE5, 0xC4, 0x05, 0x6D, 0x23, 0xA9,
|
||||
0x13, 0x55, 0x98, 0x72, 0xA9, 0xF2, 0x9B, 0x54, 0xC6, 0xA2, 0xA1, 0x2F, 0xC8, 0x8E, 0x45, 0x65,
|
||||
0x3B, 0x63, 0x25, 0x1D, 0xED, 0x63, 0xB9, 0x1E, 0xD0, 0x1A, 0xF5, 0xA2, 0x3A, 0xA7, 0xFA, 0x90,
|
||||
0xCD, 0x3A, 0x6B, 0xA6, 0xA8, 0x8D, 0x38, 0x93, 0x43, 0x6A, 0xD8, 0x57, 0x6D, 0x2A, 0x32, 0xE2,
|
||||
0x65, 0x6E, 0x20, 0x31, 0xF9, 0xDA, 0x65, 0x66, 0xB5, 0x1A, 0x9F, 0x38, 0xCB, 0x91, 0xAE, 0x6A,
|
||||
0x0B, 0x93, 0xE1, 0x24, 0x93, 0x65, 0x8B, 0x0E, 0x12, 0xB6, 0x65, 0x91, 0x99, 0x00, 0xD3, 0xA9,
|
||||
0xC8, 0x72, 0xA1, 0x07, 0x49, 0x99, 0x95, 0x85, 0x6D, 0xD3, 0xDF, 0x41, 0x45, 0x2C, 0x04, 0x5A,
|
||||
0x92, 0xD6, 0x1A, 0x6C, 0x56, 0x2D, 0x96, 0x22, 0x20, 0x1E, 0x28, 0x00, 0x03, 0xDA, 0x68, 0xCB,
|
||||
0x8E, 0x15, 0x1A, 0x22, 0x29, 0x8F, 0xC7, 0x69, 0xF3, 0x9B, 0xFA, 0xE9, 0x38, 0xB4, 0xA5, 0x4A,
|
||||
0x6F, 0x2B, 0x77, 0xDB, 0x53, 0x6D, 0xC5, 0xBC, 0x05, 0xEA, 0x04, 0x15, 0x40, 0xAF, 0xD7, 0x25,
|
||||
0xC2, 0x8E, 0x6B, 0x26, 0x1F, 0x4B, 0x0D, 0xB6, 0x82, 0xCB, 0x0A, 0x9C, 0x23, 0x59, 0x17, 0x99,
|
||||
0x24, 0x03, 0xC8, 0xD7, 0xA1, 0x73, 0x7E, 0x91, 0x4C, 0x8A, 0x45, 0x64, 0xA1, 0xD3, 0x34, 0x97,
|
||||
0x62, 0x4F, 0x32, 0xF6, 0x19, 0x0E, 0x8D, 0x53, 0xE3, 0x4A, 0xF9, 0x36, 0xE5, 0x61, 0xE9, 0x5A,
|
||||
0x1D, 0x54, 0x79, 0x27, 0x43, 0xC4, 0xE9, 0x1D, 0x49, 0xEA, 0x75, 0x7A, 0x66, 0xA5, 0x2D, 0xAB,
|
||||
0x94, 0xC3, 0xE4, 0xEB, 0xC6, 0x46, 0x76, 0x4A, 0xB6, 0x99, 0x58, 0xF6, 0xE4, 0x03, 0x06, 0x93,
|
||||
0x52, 0x7A, 0x91, 0x52, 0x6A, 0x74, 0x74, 0xB6, 0xA7, 0x5A, 0xBE, 0x12, 0x70, 0x8C, 0xD3, 0x99,
|
||||
0x19, 0x67, 0x63, 0x2E, 0xD0, 0x0C, 0x9B, 0x53, 0x4C, 0xB6, 0x92, 0x86, 0xE9, 0xD0, 0xA2, 0xA9,
|
||||
0x2A, 0x25, 0x6B, 0x23, 0xA5, 0x49, 0x57, 0x9A, 0xE6, 0xA3, 0xCB, 0xFC, 0x00, 0xB3, 0x23, 0x49,
|
||||
0x1F, 0x94, 0x93, 0x39, 0x30, 0xA0, 0xBA, 0xF2, 0xB0, 0x6B, 0x1F, 0x36, 0x8C, 0x9C, 0x70, 0x92,
|
||||
0x64, 0x76, 0x33, 0x23, 0xDF, 0x62, 0x23, 0xB1, 0x16, 0x40, 0x23, 0xD2, 0x29, 0x87, 0x53, 0x9B,
|
||||
0x3D, 0x6D, 0xB2, 0xB7, 0x26, 0xB4, 0xA6, 0x5D, 0x42, 0x92, 0x78, 0x70, 0x99, 0x11, 0x58, 0xB3,
|
||||
0xBE, 0xE2, 0xDE, 0x02, 0x71, 0xF4, 0x9E, 0x7C, 0x7A, 0x84, 0x39, 0x8D, 0xA5, 0x92, 0x72, 0x24,
|
||||
0x62, 0x8A, 0x94, 0xD9, 0x58, 0x56, 0x82, 0x23, 0xB6, 0x2C, 0xF3, 0x3C, 0xEF, 0xBB, 0x61, 0x00,
|
||||
0xCA, 0x97, 0x21, 0x72, 0xE5, 0xBD, 0x25, 0xC2, 0x49, 0x2D, 0xE7, 0x14, 0xE2, 0x89, 0x3B, 0x08,
|
||||
0xCC, 0xEF, 0x90, 0x05, 0x00, 0xB9, 0x1A, 0xA4, 0xF4, 0x6A, 0x6C, 0xD8, 0x28, 0x4B, 0x66, 0xD4,
|
||||
0xCC, 0x1A, 0xC3, 0x51, 0x1E, 0x22, 0xC0, 0x77, 0x2B, 0x66, 0x01, 0x31, 0x1F, 0x28, 0xD2, 0x50,
|
||||
0xF2, 0x98, 0x69, 0xF2, 0x4D, 0xFF, 0x00, 0x46, 0xF1, 0x19, 0xA5, 0x59, 0x5B, 0x3B, 0x19, 0x18,
|
||||
0x0B, 0xF5, 0x5A, 0xFC, 0x8A, 0x9C, 0xF6, 0xA7, 0x29, 0x88, 0xF1, 0xE5, 0x36, 0xA2, 0x5E, 0xB5,
|
||||
0x84, 0x99, 0x1A, 0x8C, 0xAD, 0x63, 0x3B, 0x99, 0xEC, 0xC2, 0x56, 0x00, 0x4E, 0xAF, 0x3F, 0x34,
|
||||
0x89, 0x47, 0x16, 0x23, 0x12, 0x35, 0x84, 0xEA, 0xA4, 0x30, 0xDE, 0x07, 0x14, 0xA2, 0xDE, 0x67,
|
||||
0x7E, 0xD3, 0xBE, 0x56, 0xCC, 0x04, 0xAA, 0x1A, 0x45, 0x2E, 0x7C, 0x57, 0x58, 0x53, 0x31, 0x98,
|
||||
0x27, 0xD4, 0x4B, 0x7D, 0x6C, 0x37, 0x85, 0x4F, 0x99, 0x6C, 0x35, 0x67, 0x9E, 0x79, 0xEE, 0xCC,
|
||||
0x06, 0x40, 0x00, 0x06, 0x95, 0x32, 0xB2, 0xBA, 0x6B, 0x64, 0x4D, 0x43, 0x86, 0xEB, 0x89, 0x5E,
|
||||
0xB1, 0x0F, 0x3A, 0xD6, 0x25, 0xB6, 0x76, 0x2D, 0x87, 0x7D, 0xD6, 0xB9, 0x5C, 0x8F, 0x30, 0x10,
|
||||
0x7A, 0xB1, 0x25, 0xFA, 0x62, 0xA0, 0xB9, 0x80, 0xD0, 0xB9, 0x27, 0x25, 0x6E, 0x67, 0x8D, 0x6B,
|
||||
0x32, 0xB6, 0x67, 0x7B, 0x7B, 0x00, 0x15, 0x1A, 0x9B, 0xD5, 0x69, 0x8D, 0xC8, 0x90, 0x86, 0xD2,
|
||||
0xEA, 0x5B, 0x4B, 0x66, 0x68, 0x23, 0x2C, 0x76, 0xDE, 0x77, 0x33, 0xCC, 0x74, 0x6A, 0x9F, 0x1A,
|
||||
0x57, 0xC9, 0xB7, 0x16, 0x3D, 0x2B, 0x43, 0xAA, 0x8F, 0x24, 0xE8, 0x79, 0xEE, 0x4D, 0x06, 0x4E,
|
||||
0x97, 0x4F, 0x3A, 0x93, 0x24, 0xEC, 0x76, 0x69, 0xE6, 0xE9, 0x91, 0xEE, 0xB1, 0xA7, 0x32, 0xF2,
|
||||
0xDA, 0xE0, 0x15, 0x0F, 0x46, 0x22, 0x25, 0xB8, 0xCC, 0x4C, 0x67, 0x12, 0x9A, 0x96, 0xF9, 0x3A,
|
||||
0xB4, 0x9D, 0x8D, 0xC4, 0x21, 0x37, 0x49, 0x5F, 0xB0, 0xF2, 0xE0, 0x60, 0x30, 0xEA, 0x4C, 0xC5,
|
||||
0x99, 0xA3, 0x6D, 0x55, 0x98, 0x88, 0xDC, 0x47, 0x53, 0x2C, 0xE3, 0x2D, 0x0D, 0x19, 0xE1, 0x51,
|
||||
0x61, 0xC4, 0x47, 0x63, 0x33, 0xB1, 0xEE, 0x01, 0x82, 0x03, 0xD2, 0x56, 0xCA, 0x05, 0x11, 0xE5,
|
||||
0xD2, 0x13, 0x4E, 0x65, 0xF7, 0x50, 0xC1, 0x13, 0xD2, 0x16, 0xA5, 0x63, 0xD6, 0xA9, 0x37, 0xBA,
|
||||
0x73, 0xB1, 0x11, 0x5C, 0xB2, 0xB6, 0xE0, 0x16, 0xE1, 0x51, 0xA2, 0x39, 0xA2, 0x26, 0x4A, 0x65,
|
||||
0x27, 0x3D, 0xF8, 0xEF, 0x4C, 0x43, 0xA7, 0xDF, 0x21, 0x2D, 0xA9, 0x25, 0x84, 0x8B, 0xCA, 0x57,
|
||||
0x01, 0xA7, 0x40, 0xD1, 0xEA, 0x74, 0xEA, 0x35, 0x16, 0x4B, 0xB1, 0x9B, 0x52, 0xCD, 0xC5, 0x9C,
|
||||
0x83, 0x33, 0xB6, 0x34, 0xF7, 0x64, 0x57, 0xED, 0xEE, 0xB0, 0x17, 0x10, 0x15, 0x91, 0x4E, 0x88,
|
||||
0xCC, 0x0A, 0x93, 0xAD, 0x44, 0xA6, 0x1B, 0x8D, 0xD5, 0x9D, 0x61, 0x27, 0x39, 0x78, 0x10, 0x96,
|
||||
0xC8, 0xAE, 0x49, 0x23, 0xB9, 0x67, 0xF1, 0x00, 0x8A, 0x5C, 0x02, 0x90, 0x8A, 0xE3, 0xAD, 0xD3,
|
||||
0x29, 0xF3, 0x25, 0xB1, 0xC9, 0xF5, 0x2C, 0xB0, 0x66, 0xB6, 0x73, 0xBE, 0x2C, 0x36, 0x57, 0x66,
|
||||
0x67, 0x9E, 0xD2, 0x01, 0x17, 0x68, 0xB0, 0xDD, 0xD3, 0x1A, 0x64, 0x24, 0xB2, 0xDB, 0x04, 0xB6,
|
||||
0x10, 0xF4, 0xC6, 0x09, 0x46, 0xA4, 0xB6, 0xB2, 0x23, 0x52, 0x93, 0xB4, 0xEC, 0x56, 0x22, 0x2D,
|
||||
0xBB, 0xC0, 0x64, 0xE9, 0x4C, 0x56, 0x19, 0x9B, 0x1A, 0x4C, 0x46, 0x92, 0xCC, 0x79, 0xB1, 0x9B,
|
||||
0x7D, 0x2D, 0xA7, 0x63, 0x66, 0x65, 0x63, 0x4D, 0xF7, 0xE6, 0x5E, 0xD0, 0x18, 0xA0, 0x3D, 0xAE,
|
||||
0x95, 0x45, 0x8F, 0x4E, 0x7A, 0x6B, 0x51, 0xA1, 0x51, 0x52, 0xCA, 0x52, 0x44, 0x92, 0x37, 0x3F,
|
||||
0x58, 0x2C, 0x49, 0x2C, 0xC9, 0x38, 0xB6, 0xDC, 0xEE, 0x59, 0x6C, 0x00, 0x4B, 0xA5, 0x53, 0x8A,
|
||||
0x75, 0x4A, 0x88, 0x88, 0x48, 0x4A, 0xA1, 0x42, 0xD7, 0x22, 0x51, 0x29, 0x5A, 0xC5, 0x38, 0x49,
|
||||
0x4A, 0x8E, 0xF9, 0xDA, 0xC7, 0x7B, 0x5A, 0xC0, 0x28, 0xBD, 0x4F, 0x88, 0x9A, 0x8E, 0x8C, 0x36,
|
||||
0x4C, 0x20, 0x91, 0x29, 0xB6, 0x4D, 0xE2, 0xFD, 0xB3, 0x35, 0xD8, 0xEF, 0xC0, 0x06, 0x8D, 0x56,
|
||||
0x89, 0x01, 0x54, 0x29, 0xBC, 0x9E, 0x3A, 0x1B, 0x96, 0xDC, 0x99, 0x0B, 0x6D, 0x49, 0xCA, 0xE8,
|
||||
0x6D, 0xC3, 0x23, 0x4F, 0x04, 0x9D, 0xFF, 0x00, 0xF2, 0x01, 0x95, 0xB8, 0x74, 0xEA, 0x52, 0x6A,
|
||||
0xEF, 0x35, 0x4C, 0x8A, 0xEE, 0xA6, 0x4B, 0x2D, 0xA1, 0x0E, 0x11, 0xD9, 0x29, 0x53, 0x69, 0x33,
|
||||
0xB5, 0x8C, 0xB7, 0x80, 0xF3, 0x9A, 0x41, 0x02, 0x3C, 0x2A, 0x84, 0x65, 0xC3, 0x4A, 0x91, 0x1E,
|
||||
0x5C, 0x66, 0xE4, 0xA1, 0xB5, 0x2A, 0xE6, 0x82, 0x51, 0x1F, 0x73, 0x7D, 0xFB, 0x07, 0x46, 0xA9,
|
||||
0xF1, 0xA5, 0x7C, 0x9B, 0x72, 0x88, 0xF4, 0xAD, 0x0E, 0xAA, 0x3C, 0x93, 0xA1, 0xE4, 0xEA, 0xF2,
|
||||
0xD7, 0x06, 0xB9, 0x51, 0x57, 0x26, 0x79, 0xE4, 0xCA, 0xA7, 0xAA, 0x32, 0x4D, 0x09, 0xC8, 0x8D,
|
||||
0x56, 0xCF, 0xD8, 0x01, 0x68, 0xD2, 0x89, 0x4D, 0xC4, 0xA5, 0xA4, 0xE9, 0xCE, 0xAD, 0xE8, 0x86,
|
||||
0x64, 0xE9, 0xA8, 0x8C, 0x89, 0xE4, 0xE1, 0xC1, 0xD9, 0x7B, 0xE1, 0xB6, 0x7E, 0x41, 0xF2, 0x33,
|
||||
0x42, 0x1B, 0xE2, 0x32, 0xEA, 0x52, 0xC9, 0xCA, 0x63, 0x54, 0xDA, 0x74, 0x09, 0x2C, 0xC5, 0x43,
|
||||
0xA6, 0xFA, 0x8D, 0xD3, 0xC4, 0xA5, 0xAC, 0xCA, 0xDB, 0x88, 0xAC, 0x44, 0x59, 0x0C, 0x76, 0x92,
|
||||
0x62, 0x51, 0x91, 0xC9, 0x64, 0x78, 0x07, 0x7D, 0x43, 0x0D, 0xA4, 0x98, 0x94, 0x6E, 0x4D, 0x9F,
|
||||
0x1E, 0xA2, 0xC9, 0x3D, 0x3E, 0x97, 0x28, 0xEA, 0x09, 0x63, 0x55, 0xAC, 0x42, 0xEC, 0x87, 0x0C,
|
||||
0x8A, 0xC9, 0x5A, 0x8A, 0xD7, 0xB9, 0x65, 0xB0, 0xF3, 0xB0, 0xCA, 0x58, 0xC2, 0x6D, 0xDD, 0xAF,
|
||||
0x91, 0x9A, 0x12, 0xEF, 0x68, 0x33, 0xA5, 0x92, 0xA3, 0xD4, 0x21, 0x6A, 0x63, 0xC9, 0xE6, 0xD8,
|
||||
0xEC, 0x25, 0x95, 0x46, 0x3F, 0xF9, 0x2C, 0x93, 0x2B, 0x9E, 0x5B, 0x73, 0x2F, 0x40, 0xCA, 0x91,
|
||||
0x63, 0xB4, 0x93, 0x15, 0x04, 0xD5, 0xD4, 0xDA, 0x28, 0xAD, 0xB5, 0x1A, 0x49, 0x22, 0x9C, 0xEA,
|
||||
0x96, 0xBF, 0xB4, 0x49, 0xB8, 0x4B, 0x22, 0xF6, 0x05, 0x22, 0x6D, 0x24, 0xC4, 0xE7, 0x2A, 0xD0,
|
||||
0xE5, 0xC2, 0x99, 0x16, 0x74, 0x19, 0xD8, 0x1F, 0xA8, 0x2E, 0x6A, 0x4D, 0x93, 0x24, 0x99, 0x5C,
|
||||
0xAC, 0x44, 0x77, 0x23, 0xED, 0x31, 0xF2, 0x31, 0xA6, 0xF2, 0xFC, 0xB8, 0xA9, 0xA2, 0x6B, 0x31,
|
||||
0xA9, 0xD5, 0x68, 0x31, 0x22, 0xCA, 0xD5, 0x4D, 0xD4, 0xEA, 0xCD, 0xD3, 0x23, 0x52, 0x30, 0x1D,
|
||||
0xCE, 0xF6, 0x22, 0xBD, 0xFC, 0x83, 0x1B, 0xD2, 0xE2, 0xFB, 0x7E, 0x5C, 0x5A, 0x48, 0xD2, 0x6C,
|
||||
0x3F, 0xAE, 0x14, 0x39, 0x25, 0x53, 0x38, 0x27, 0x11, 0x4F, 0x15, 0xAC, 0xA3, 0xCA, 0xCE, 0x1E,
|
||||
0x57, 0xC5, 0x90, 0x5E, 0x97, 0x12, 0xFC, 0xB8, 0xB3, 0x6A, 0xF5, 0x77, 0xEA, 0xD4, 0xA8, 0x2C,
|
||||
0xCB, 0x6D, 0xF5, 0xCB, 0x8C, 0xA5, 0xDD, 0xE5, 0x16, 0x4B, 0x4A, 0x8E, 0xFE, 0x92, 0xB1, 0x10,
|
||||
0xCA, 0x5F, 0xBD, 0xBB, 0xB5, 0x94, 0xBF, 0x7B, 0xDD, 0xED, 0x62, 0xEA, 0x9C, 0xFD, 0x85, 0x7A,
|
||||
0x06, 0x57, 0x66, 0xC1, 0x95, 0xC9, 0xB0, 0x69, 0x69, 0x14, 0xE3, 0xAC, 0x56, 0xE4, 0x4F, 0x6D,
|
||||
0x87, 0x1B, 0x4B, 0xB8, 0x6C, 0x95, 0x15, 0xCC, 0xAC, 0x92, 0x2F, 0x70, 0x5D, 0x9B, 0x02, 0xE4,
|
||||
0xD8, 0x34, 0xE4, 0x69, 0x1B, 0x6E, 0x72, 0xA9, 0x69, 0x80, 0xEA, 0x6A, 0x72, 0xE3, 0x72, 0x67,
|
||||
0x5C, 0x35, 0xFE, 0x8E, 0xD6, 0x22, 0x35, 0x12, 0x6D, 0x7B, 0x99, 0x11, 0x6F, 0xCB, 0xFB, 0xFC,
|
||||
0x8C, 0x29, 0xBD, 0xF6, 0xE4, 0xD8, 0x21, 0x12, 0xB9, 0x10, 0x9B, 0xA7, 0x39, 0x3A, 0x9F, 0x21,
|
||||
0xE9, 0x54, 0xD2, 0xB3, 0x2A, 0x6D, 0xDC, 0x29, 0x59, 0x11, 0xDD, 0x24, 0xA2, 0xB1, 0xEC, 0xF2,
|
||||
0x0C, 0x6B, 0x03, 0x67, 0x3E, 0x00, 0xB4, 0x95, 0xC3, 0x28, 0x2B, 0x54, 0x75, 0x1B, 0xCC, 0x4A,
|
||||
0x75, 0xF7, 0x72, 0xEE, 0x5C, 0x27, 0x0F, 0xBA, 0x49, 0x17, 0x94, 0x8C, 0xCB, 0x88, 0x56, 0x06,
|
||||
0xCE, 0x7C, 0x16, 0x6A, 0x1A, 0x49, 0x02, 0xA2, 0x75, 0x04, 0xCB, 0x85, 0x2C, 0x9A, 0x94, 0xF3,
|
||||
0x6E, 0xA4, 0x9B, 0x5A, 0x52, 0x65, 0x85, 0x04, 0x9B, 0x19, 0x99, 0x1F, 0x60, 0xCA, 0x58, 0x46,
|
||||
0x6D, 0xDD, 0xAC, 0x63, 0x2C, 0x65, 0xDF, 0x06, 0x25, 0x56, 0xA4, 0xBA, 0xAD, 0x41, 0x0F, 0x6A,
|
||||
0x49, 0x96, 0x9B, 0x42, 0x5A, 0x69, 0xA2, 0x3B, 0x93, 0x68, 0x49, 0x64, 0x57, 0xDE, 0x3A, 0xB5,
|
||||
0x59, 0x26, 0x86, 0x9A, 0x58, 0xC6, 0x0C, 0x26, 0x8F, 0x61, 0x03, 0xD1, 0x34, 0xBA, 0xA8, 0xF2,
|
||||
0x4E, 0x80, 0x01, 0x4F, 0xF5, 0x78, 0x89, 0x36, 0x9F, 0x07, 0x3C, 0x9B, 0x24, 0x24, 0x48, 0x6C,
|
||||
0x00, 0x2B, 0xCC, 0xD8, 0x8E, 0x3E, 0xE1, 0x7A, 0xC5, 0xEF, 0x39, 0x66, 0x8B, 0x6B, 0xF0, 0x73,
|
||||
0xC9, 0x58, 0x5E, 0x44, 0x00, 0x12, 0xFF, 0x00, 0x57, 0x88, 0x93, 0x69, 0xEE, 0x93, 0x9E, 0x4C,
|
||||
0xE4, 0x24, 0x48, 0x6C, 0x00, 0x11, 0x2F, 0xBD, 0x47, 0x9C, 0xC5, 0xEB, 0x17, 0xBC, 0xE5, 0x9B,
|
||||
0xD3, 0x7B, 0x3F, 0xDE, 0xFE, 0xDC, 0xD5, 0x45, 0xE7, 0xA6, 0x00, 0x14, 0xFF, 0x00, 0x57, 0x88,
|
||||
0x93, 0x69, 0xF0, 0x73, 0xC9, 0x9C, 0x84, 0x89, 0x0D, 0x80, 0x05, 0x79, 0x9B, 0x11, 0xC7, 0xDC,
|
||||
0x2F, 0x58, 0xBD, 0xE7, 0x2C, 0xD1, 0x6D, 0x7E, 0x0E, 0x79, 0x2B, 0x0B, 0xC8, 0x80, 0x07, 0xAC,
|
||||
0xE9, 0xA2, 0x7E, 0xAF, 0x3F, 0xBF, 0xF9, 0x44, 0x8E, 0xAC, 0x8F, 0x8F, 0xCB, 0xD5, 0xB2, 0xF8,
|
||||
0xE9, 0xA2, 0x7E, 0xAF, 0x3F, 0xBF, 0xF9, 0x43, 0xAB, 0x23, 0xE3, 0xF2, 0xF5, 0x2F, 0x96, 0xEE,
|
||||
0x98, 0x92, 0xAD, 0x6A, 0x7E, 0xCF, 0xB7, 0xF9, 0x44, 0x9B, 0x4E, 0xCC, 0xF7, 0x3E, 0xFE, 0x3F,
|
||||
0x87, 0xE9, 0xF3, 0x6C, 0x92, 0x72, 0xFA, 0x5D, 0xFC, 0xBF, 0xF1, 0xFE, 0x51, 0x23, 0xAA, 0xFE,
|
||||
0xBF, 0x2F, 0x56, 0xCB, 0xE3, 0xA5, 0xDF, 0xCB, 0xFF, 0x00, 0x1F, 0xE5, 0x0E, 0xAB, 0xFA, 0xFC,
|
||||
0xBD, 0x4B, 0xE6, 0x35, 0xA4, 0x05, 0x34, 0x8E, 0xF1, 0x4D, 0xBC, 0x1F, 0x6B, 0x7B, 0xDF, 0x81,
|
||||
0x76, 0x0A, 0xF6, 0x66, 0xA5, 0xB2, 0xBF, 0xF7, 0xAB, 0x5A, 0x7E, 0x1F, 0xAF, 0xCD, 0xAE, 0x7B,
|
||||
0x3F, 0xA7, 0xF1, 0x5D, 0xBB, 0xF2, 0xAE, 0xFE, 0x70, 0xC0, 0xCE, 0x71, 0x4F, 0x82, 0x3F, 0x5B,
|
||||
0xE0, 0x2B, 0x6C, 0x63, 0x8B, 0x5F, 0xD9, 0xBF, 0xCD, 0xFE, 0x3F, 0xD8, 0x73, 0x8A, 0x7C, 0x11,
|
||||
0xFA, 0xDF, 0x00, 0xD8, 0xC7, 0x13, 0xEC, 0xDF, 0xE6, 0xFF, 0x00, 0x1F, 0xEC, 0xA9, 0x3A, 0xAE,
|
||||
0x4D, 0x6A, 0xED, 0x1F, 0x15, 0xEF, 0xD7, 0xB7, 0x67, 0x90, 0x4D, 0xB4, 0x35, 0x5B, 0xF7, 0x7B,
|
||||
0x71, 0xC9, 0xA3, 0x4F, 0x62, 0xF4, 0x7A, 0x7F, 0x92, 0xB5, 0xF9, 0x7A, 0xAA, 0x73, 0xEF, 0xF0,
|
||||
0xBF, 0x89, 0xF0, 0x13, 0x3A, 0x17, 0xD5, 0xE5, 0xEA, 0xE7, 0xEA, 0xFF, 0x00, 0xAB, 0xCB, 0xD4,
|
||||
0x73, 0xEF, 0xF0, 0xBF, 0x89, 0xF0, 0x0E, 0x85, 0xF5, 0x79, 0x7A, 0x9D, 0x5F, 0xF5, 0x79, 0x7A,
|
||||
0xAD, 0xC1, 0x7C, 0xAA, 0xA4, 0xE1, 0x1A, 0x4D, 0x9D, 0x55, 0xB7, 0xE2, 0xBD, 0xEF, 0xE6, 0xEC,
|
||||
0x14, 0xAC, 0xF9, 0x3A, 0x3D, 0xEE, 0xDA, 0xD6, 0x99, 0xBA, 0x34, 0x3A, 0xD7, 0x55, 0xD7, 0xB2,
|
||||
0xF5, 0xEE, 0x54, 0xA7, 0xFE, 0xE2, 0xB7, 0xCD, 0xC9, 0xF0, 0xA7, 0xEA, 0xFC, 0x45, 0x3D, 0xB4,
|
||||
0x70, 0x6F, 0xFB, 0x49, 0xF9, 0x5F, 0xCB, 0xFA, 0x8E, 0x6E, 0x4F, 0x85, 0x3F, 0x57, 0xE2, 0x1B,
|
||||
0x68, 0xE0, 0x7D, 0xA4, 0xFC, 0xAF, 0xE5, 0xFD, 0x59, 0xB5, 0x84, 0x14, 0x2D, 0x4D, 0x8C, 0xDC,
|
||||
0xC7, 0x8B, 0xC9, 0x6B, 0x5B, 0xFC, 0x8E, 0x1D, 0x77, 0xFC, 0xB7, 0x7F, 0x0A, 0x57, 0x27, 0x6E,
|
||||
0xA9, 0x6E, 0x6D, 0xAF, 0x7F, 0x8E, 0x94, 0xA7, 0xE3, 0xFA, 0xFC, 0x99, 0xBC, 0xB3, 0xEC, 0xFF,
|
||||
0x00, 0xAB, 0xE0, 0x27, 0xEC, 0x3E, 0x6E, 0xEE, 0xB4, 0xFA, 0x3C, 0xFD, 0x07, 0x2C, 0xFB, 0x3F,
|
||||
0xEA, 0xF8, 0x06, 0xC3, 0xE6, 0x75, 0xA7, 0xD1, 0xE7, 0xE8, 0xD2, 0xA3, 0xD2, 0xCA, 0xBA, 0x4F,
|
||||
0x5D, 0xE3, 0x8F, 0xA8, 0xC3, 0xD4, 0xC7, 0x8B, 0x15, 0xFC, 0xA5, 0x6E, 0xF7, 0xDA, 0x3B, 0xF5,
|
||||
0x2D, 0x3F, 0x45, 0xBD, 0xD9, 0x5A, 0xD3, 0xE5, 0xBA, 0xBF, 0xAE, 0x2E, 0x2D, 0x6F, 0x58, 0xE9,
|
||||
0x37, 0x7B, 0x29, 0x4A, 0xFC, 0xFF, 0x00, 0xE3, 0x4B, 0xA1, 0x69, 0xFA, 0xC0, 0xFE, 0xE3, 0xE6,
|
||||
0x1D, 0xFD, 0x67, 0x1F, 0x07, 0x9F, 0xA3, 0x86, 0xE0, 0xE8, 0x5A, 0x7E, 0xB0, 0x3F, 0xB8, 0xF9,
|
||||
0x83, 0xAC, 0xE3, 0xE0, 0xF3, 0xF4, 0x2E, 0x3C, 0xA5, 0x8C, 0x51, 0xE9, 0x1A, 0x2F, 0x13, 0x58,
|
||||
0xB1, 0x87, 0x48, 0xD1, 0x78, 0x87, 0xC3, 0x23, 0xEC, 0x13, 0x6D, 0x09, 0xA1, 0xA4, 0xBB, 0x73,
|
||||
0xB6, 0x95, 0xC9, 0x9C, 0x91, 0x84, 0x17, 0xE2, 0xD0, 0xAA, 0x93, 0x23, 0xA5, 0xF8, 0xD0, 0x9D,
|
||||
0x75, 0xA5, 0xDF, 0x0A, 0xD2, 0x59, 0x1D, 0x8E, 0xC7, 0xED, 0x21, 0x2E, 0x30, 0xA6, 0xF6, 0xD3,
|
||||
0x7A, 0x33, 0x5A, 0xFA, 0xB5, 0xFF, 0x00, 0x40, 0xF8, 0x2E, 0xD3, 0xB4, 0x7A, 0xAE, 0xDE, 0xB3,
|
||||
0x1C, 0x07, 0x93, 0x7B, 0x5A, 0xE5, 0xE7, 0x1D, 0x9A, 0xA6, 0x92, 0x59, 0x2F, 0x5E, 0x8E, 0x19,
|
||||
0xBB, 0xF5, 0x2D, 0x24, 0x92, 0x5E, 0xBD, 0x1A, 0x6E, 0xCD, 0x73, 0x98, 0xAA, 0x9E, 0x24, 0xEF,
|
||||
0xA0, 0x76, 0x6D, 0xF4, 0x78, 0xA8, 0x74, 0x9D, 0x17, 0x89, 0x95, 0xCA, 0x59, 0xF0, 0x84, 0x36,
|
||||
0x5E, 0x83, 0xEE, 0xDF, 0x47, 0x8A, 0x9D, 0x41, 0xC4, 0x3B, 0xAB, 0xC0, 0xA2, 0x55, 0xAF, 0x7B,
|
||||
0x70, 0x1C, 0x7A, 0xDC, 0x23, 0x3D, 0xDB, 0xBF, 0x3C, 0x9C, 0x1A, 0xEC, 0xF2, 0xCF, 0x76, 0xEC,
|
||||
0x6B, 0xBF, 0x25, 0x2B, 0x1F, 0x60, 0xE3, 0xD9, 0x4F, 0x82, 0x7D, 0xD8, 0x8B, 0x18, 0xF9, 0x1D,
|
||||
0x1C, 0xD0, 0x85, 0x63, 0x02, 0x91, 0x83, 0x5F, 0x47, 0xE5, 0x33, 0x1B, 0x94, 0x6B, 0x9C, 0x4A,
|
||||
0x31, 0x60, 0xB5, 0xF7, 0xDB, 0x17, 0xF9, 0x19, 0xE8, 0xA6, 0x84, 0x2B, 0x54, 0xCB, 0x43, 0x45,
|
||||
0x3E, 0x92, 0xED, 0xC8, 0x56, 0x95, 0xC9, 0xB1, 0xCE, 0x70, 0xBC, 0x61, 0x03, 0x76, 0xD2, 0x5C,
|
||||
0x53, 0x3A, 0x2E, 0x9B, 0xC2, 0x39, 0xCE, 0x17, 0x8C, 0x20, 0x36, 0x92, 0xE2, 0x74, 0x5D, 0x37,
|
||||
0x85, 0x8F, 0xA4, 0x12, 0x98, 0x91, 0xC9, 0xB5, 0x2E, 0xA5, 0x78, 0x71, 0xDE, 0xDB, 0xBB, 0xD1,
|
||||
0xA7, 0x4B, 0x34, 0x23, 0x4A, 0x29, 0xD9, 0xFA, 0x29, 0xF4, 0x77, 0xAF, 0xC2, 0x95, 0xA6, 0x6C,
|
||||
0x72, 0x32, 0x3D, 0x83, 0x4A, 0x93, 0xE9, 0x11, 0x9E, 0xC0, 0x1E, 0x8F, 0x44, 0x66, 0xC6, 0x83,
|
||||
0xCB, 0x39, 0x53, 0xC9, 0x6B, 0x1E, 0xAF, 0x0E, 0x2D, 0xF6, 0xC5, 0x7F, 0xEE, 0x40, 0x3D, 0x1F,
|
||||
0x3E, 0x53, 0x3C, 0x75, 0xAF, 0x48, 0x03, 0x9F, 0x29, 0x9E, 0x3A, 0xD7, 0xA4, 0x07, 0x3D, 0x1D,
|
||||
0xAE, 0x60, 0x00, 0x01, 0xD5, 0x34, 0x23, 0xE8, 0xA4, 0x2F, 0x3B, 0x9F, 0x98, 0xA1, 0xCB, 0xA4,
|
||||
0xF7, 0xA2, 0xDF, 0x2E, 0xE6, 0xF0, 0xC1, 0x90, 0x00, 0x00, 0xE1, 0x85, 0xB0, 0x85, 0x56, 0xF8,
|
||||
0x00, 0x7D, 0x00, 0x05, 0x77, 0xA6, 0x35, 0x69, 0xFE, 0x1C, 0x58, 0xCD, 0xB8, 0xB1, 0x3D, 0xA4,
|
||||
0x00, 0x00, 0x45, 0x7B, 0x80, 0x08, 0xDE, 0x01, 0xA8, 0xDE, 0x00, 0x5E, 0xE0, 0x10, 0x00, 0x00,
|
||||
0x68, 0xED, 0x73, 0x00, 0x00, 0x0E, 0xA9, 0xA1, 0x1F, 0x45, 0x21, 0x79, 0xDC, 0xFC, 0xC5, 0x0E,
|
||||
0x5D, 0x27, 0xBD, 0x16, 0xF9, 0x77, 0x37, 0x86, 0x0C, 0x80, 0x00, 0x07, 0x0C, 0x2D, 0x84, 0x2A,
|
||||
0xB7, 0xC0, 0x03, 0xE8, 0x00, 0x2B, 0xBD, 0x31, 0xAB, 0x4F, 0xF0, 0xE2, 0xC6, 0x6D, 0xC5, 0x89,
|
||||
0xED, 0x20, 0x00, 0x02, 0x2B, 0xDC, 0x00, 0x46, 0xF0, 0x0D, 0x46, 0xF0, 0x02, 0xF7, 0x00, 0x80,
|
||||
0x00, 0x03, 0x47, 0x6B, 0x98, 0x00, 0x00, 0x75, 0x4D, 0x08, 0xFA, 0x29, 0x0B, 0xCE, 0xE7, 0xE6,
|
||||
0x28, 0x72, 0xE9, 0x3D, 0xE8, 0xB7, 0xCB, 0xB9, 0xBC, 0x30, 0x64, 0x00, 0x00, 0x38, 0x61, 0x6C,
|
||||
0x21, 0x55, 0xBE, 0x00, 0x1F, 0x40, 0x01, 0x5D, 0xE9, 0x8D, 0x5A, 0x7F, 0x87, 0x16, 0x33, 0x6E,
|
||||
0x2C, 0x4F, 0x69, 0x00, 0x00, 0x11, 0x5E, 0xE0, 0x02, 0x37, 0x80, 0x6A, 0x37, 0x80, 0x17, 0xB8,
|
||||
0x04, 0x00, 0x00, 0x1A, 0x3B, 0x5C, 0xC0, 0x00, 0x03, 0xAA, 0x68, 0x47, 0xD1, 0x48, 0x5E, 0x77,
|
||||
0x3F, 0x31, 0x43, 0x97, 0x49, 0xEF, 0x45, 0xBE, 0x5D, 0xCD, 0xE1, 0x83, 0x20, 0x00, 0x01, 0xC3,
|
||||
0x0B, 0x61, 0x0A, 0xAD, 0xF0, 0x00, 0xFA, 0x00, 0x0A, 0xEF, 0x4C, 0x6A, 0xD3, 0xFC, 0x38, 0xB1,
|
||||
0x9B, 0x71, 0x62, 0x7B, 0x48, 0x00, 0x00, 0x8A, 0xF7, 0x00, 0x11, 0xBC, 0x03, 0x51, 0xBC, 0x00,
|
||||
0xBD, 0xC0, 0x20, 0x00, 0x01, 0xFF, 0xD9
|
||||
};
|
||||
|
||||
static uint8_t gimage_id; // Global image ID (for all image threads)
|
||||
mutex_t camera_mtx;
|
||||
|
||||
void encode_ssdv(uint8_t *image, uint32_t image_len, module_conf_t* conf, uint8_t image_id, bool redudantTx)
|
||||
void encode_ssdv(const uint8_t *image, uint32_t image_len, module_conf_t* conf, uint8_t image_id, bool redudantTx)
|
||||
{
|
||||
ssdv_t ssdv;
|
||||
uint8_t pkt[SSDV_PKT_SIZE];
|
||||
uint8_t pkt_base91[BASE91LEN(SSDV_PKT_SIZE-37)];
|
||||
uint8_t *b;
|
||||
const uint8_t *b;
|
||||
uint32_t bi = 0;
|
||||
uint8_t c = SSDV_OK;
|
||||
uint16_t i = 0;
|
||||
|
|
@ -136,55 +393,13 @@ THD_FUNCTION(imgThread, arg) {
|
|||
|
||||
uint8_t tries;
|
||||
bool status = false;
|
||||
bool camera_found = false;
|
||||
|
||||
// Detect camera
|
||||
if(OV2640_isAvailable()) // OV2640 available
|
||||
{
|
||||
TRACE_INFO("IMG > OV2640 found");
|
||||
|
||||
if(conf->ssdv_conf.res == RES_MAX) // Attempt maximum resolution (limited by memory)
|
||||
{
|
||||
conf->ssdv_conf.res = RES_UXGA; // Try maximum resolution
|
||||
|
||||
do {
|
||||
|
||||
// Init camera
|
||||
OV2640_init(&conf->ssdv_conf);
|
||||
|
||||
// Sample data from DCMI through DMA into RAM
|
||||
tries = 5; // Try 5 times at maximum
|
||||
do { // Try capturing image until capture successful
|
||||
status = OV2640_Snapshot2RAM();
|
||||
} while(!status && --tries);
|
||||
|
||||
conf->ssdv_conf.res--; // Decrement resolution in next attempt (if status==false)
|
||||
|
||||
} while(OV2640_BufferOverflow() && conf->ssdv_conf.res >= RES_QVGA);
|
||||
|
||||
conf->ssdv_conf.res = RES_MAX; // Revert register
|
||||
|
||||
} else { // Static resolution
|
||||
|
||||
// Init camera
|
||||
OV2640_init(&conf->ssdv_conf);
|
||||
|
||||
// Sample data from DCMI through DMA into RAM
|
||||
tries = 5; // Try 5 times at maximum
|
||||
do { // Try capturing image until capture successful
|
||||
status = OV2640_Snapshot2RAM();
|
||||
} while(!status && --tries);
|
||||
|
||||
}
|
||||
|
||||
// Switch off camera
|
||||
OV2640_deinit();
|
||||
|
||||
// Get image
|
||||
image_len = OV2640_getBuffer(&image);
|
||||
|
||||
} else if(OV5640_isAvailable()) { // OV5640 available
|
||||
if(OV5640_isAvailable()) { // OV5640 available
|
||||
|
||||
TRACE_INFO("IMG > OV5640 found");
|
||||
camera_found = true;
|
||||
|
||||
if(conf->ssdv_conf.res == RES_MAX) // Attempt maximum resolution (limited by memory)
|
||||
{
|
||||
|
|
@ -244,13 +459,19 @@ THD_FUNCTION(imgThread, arg) {
|
|||
TRACE_INFO("IMG > Unlocked camera");
|
||||
|
||||
// Encode/Transmit SSDV if image sampled successfully
|
||||
if(status)
|
||||
{
|
||||
if(status) {
|
||||
|
||||
gimage_id++;
|
||||
TRACE_INFO("IMG > Encode/Transmit SSDV ID=%d", gimage_id-1);
|
||||
encode_ssdv(image, image_len, conf, gimage_id-1, conf->ssdv_conf.redundantTx);
|
||||
}
|
||||
|
||||
} else if(!camera_found) { // No camera found
|
||||
|
||||
gimage_id++;
|
||||
TRACE_INFO("IMG > Encode/Transmit SSDV (no cam found) ID=%d", gimage_id-1);
|
||||
encode_ssdv(noCameraFound, sizeof(noCameraFound), conf, gimage_id-1, conf->ssdv_conf.redundantTx);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
time = waitForTrigger(time, &conf->trigger);
|
||||
|
|
|
|||
|
|
@ -1020,7 +1020,7 @@ char ssdv_enc_get_packet(ssdv_t *s)
|
|||
return(SSDV_FEED_ME);
|
||||
}
|
||||
|
||||
char ssdv_enc_feed(ssdv_t *s, uint8_t *buffer, size_t length)
|
||||
char ssdv_enc_feed(ssdv_t *s, const uint8_t *buffer, size_t length)
|
||||
{
|
||||
s->inp = buffer;
|
||||
s->in_len = length;
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@ typedef struct
|
|||
uint8_t packet_mcu_offset;
|
||||
|
||||
/* Source buffer */
|
||||
uint8_t *inp; /* Pointer to next input byte */
|
||||
const uint8_t *inp; /* Pointer to next input byte */
|
||||
size_t in_len; /* Number of input bytes remaining */
|
||||
size_t in_skip; /* Number of input bytes to skip */
|
||||
|
||||
|
|
@ -144,7 +144,7 @@ typedef struct {
|
|||
extern char ssdv_enc_init(ssdv_t *s, uint8_t type, char *callsign, uint8_t image_id);
|
||||
extern char ssdv_enc_set_buffer(ssdv_t *s, uint8_t *buffer);
|
||||
extern char ssdv_enc_get_packet(ssdv_t *s);
|
||||
extern char ssdv_enc_feed(ssdv_t *s, uint8_t *buffer, size_t length);
|
||||
extern char ssdv_enc_feed(ssdv_t *s, const uint8_t *buffer, size_t length);
|
||||
|
||||
/* Decoding */
|
||||
extern char ssdv_dec_init(ssdv_t *s);
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue