kopia lustrzana https://github.com/peterhinch/micropython_eeprom
Reference Winbond W25Q128JV support. Add ioctl code comments.
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@ -89,11 +89,17 @@ for compatibility.
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### 1.4.1 Chips tested by users
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If you have success with other chips please raise an issue and I will update
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this doc.
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this doc. Please note the `cmd5` arg. It is essential to know whether a chip
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uses 4 or 5 byte commands and to set this correctly otherise very confusing
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behaviour results.
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CAT24C256LI-G I2C EEPROM 32KiB tested by
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[Julien Phalip](https://github.com/peterhinch/micropython_eeprom/issues/6#issuecomment-825801065).
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Winbond W25Q128JV Flash 128MiB tested by
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[mweber-bg](https://github.com/peterhinch/micropython_eeprom/issues/8#issuecomment-917603913).
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This requires setting `cmd5=False`.
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## 1.5 Performance
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FRAM is truly byte-addressable: its speed is limited only by the speed of the
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@ -68,6 +68,7 @@ class BlockDevice:
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def writeblocks(self, blocknum, buf, offset=0):
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self.readwrite(offset + (blocknum << self._nbits), buf, False)
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# https://docs.micropython.org/en/latest/library/os.html#os.AbstractBlockDev.ioctl
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def ioctl(self, op, arg): # ioctl calls: see extmod/vfs.h
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if op == 3: # SYNCHRONISE
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self.sync()
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@ -76,7 +77,7 @@ class BlockDevice:
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return self._a_bytes >> self._nbits
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if op == 5: # BP_IOCTL_SEC_SIZE
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return self._block_size
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if op == 6: # ERASE
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if op == 6: # Ignore ERASE because handled by driver.
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return 0
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# Hardware agnostic base class for flash memory.
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