micropython/ports/stm32/boards/stm32f405_af.csv

8.9 KiB

1PortAF0AF1AF2AF3AF4AF5AF6AF7AF8AF9AF10AF11AF12AF13AF14AF15
2SYSTIM1/2TIM3/4/5TIM8/9/10/11I2C1/2/3SPI1/SPI2/I2S2/I2S2extSPI3/I2Sext/I2S3USART1/2/3/I2S3extUART4/5/USART6CAN1/CAN2/TIM12/13/14OTG_FS/OTG_HSETHFSMC/SDIO/OTG_FSDCMIADC
3PortAPA0TIM2_CH1/TIM2_ETRTIM5_CH1TIM8_ETRUSART2_CTSUART4_TXETH_MII_CRSEVENTOUTADC123_IN0
4PortAPA1TIM2_CH2TIM5_CH2USART2_RTSUART4_RXETH_MII_RX_CLK/ETH_RMII__REF_CLKEVENTOUTADC123_IN1
5PortAPA2TIM2_CH3TIM5_CH3TIM9_CH1USART2_TXETH_MDIOEVENTOUTADC123_IN2
6PortAPA3TIM2_CH4TIM5_CH4TIM9_CH2USART2_RXOTG_HS_ULPI_D0ETH_MII_COLEVENTOUTADC123_IN3
7PortAPA4SPI1_NSSSPI3_NSS/I2S3_WSUSART2_CKOTG_HS_SOFDCMI_HSYNCEVENTOUTADC12_IN4
8PortAPA5TIM2_CH1/TIM2_ETRTIM8_CH1NSPI1_SCKOTG_HS_ULPI_CKEVENTOUTADC12_IN5
9PortAPA6TIM1_BKINTIM3_CH1TIM8_BKINSPI1_MISOTIM13_CH1DCMI_PIXCKEVENTOUTADC12_IN6
10PortAPA7TIM1_CH1NTIM3_CH2TIM8_CH1NSPI1_MOSITIM14_CH1ETH_MII_RX_DV/ETH_RMII_CRS_DVEVENTOUTADC12_IN7
11PortAPA8MCO1TIM1_CH1I2C3_SCLUSART1_CKOTG_FS_SOFEVENTOUT
12PortAPA9TIM1_CH2I2C3_SMBAUSART1_TXDCMI_D0EVENTOUT
13PortAPA10TIM1_CH3USART1_RXOTG_FS_IDDCMI_D1EVENTOUT
14PortAPA11TIM1_CH4USART1_CTSCAN1_RXOTG_FS_DMEVENTOUT
15PortAPA12TIM1_ETRUSART1_RTSCAN1_TXOTG_FS_DPEVENTOUT
16PortAPA13JTMS/SWDIOEVENTOUT
17PortAPA14JTCK/SWCLKEVENTOUT
18PortAPA15JTDITIM2_CH1/TIM2_ETRSPI1_NSSSPI3_NSS/I2S3_WSEVENTOUT
19PortBPB0TIM1_CH2NTIM3_CH3TIM8_CH2NOTG_HS_ULPI_D1ETH_MII_RXD2EVENTOUTADC12_IN8
20PortBPB1TIM1_CH3NTIM3_CH4TIM8_CH3NOTG_HS_ULPI_D2ETH_MII_RXD3EVENTOUTADC12_IN9
21PortBPB2EVENTOUT
22PortBPB3JTDO/TRACESWOTIM2_CH2SPI1_SCKSPI3_SCK/I2S3_CKEVENTOUT
23PortBPB4NJTRSTTIM3_CH1SPI1_MISOSPI3_MISOI2S3ext_SDEVENTOUT
24PortBPB5TIM3_CH2I2C1_SMBASPI1_MOSISPI3_MOSI/I2S3_SDCAN2_RXOTG_HS_ULPI_D7ETH_PPS_OUTDCMI_D10EVENTOUT
25PortBPB6TIM4_CH1I2C1_SCLUSART1_TXCAN2_TXDCMI_D5EVENTOUT
26PortBPB7TIM4_CH2I2C1_SDAUSART1_RXFSMC_NLDCMI_VSYNCEVENTOUT
27PortBPB8TIM4_CH3TIM10_CH1I2C1_SCLCAN1_RXETH_MII_TXD3SDIO_D4DCMI_D6EVENTOUT
28PortBPB9TIM4_CH4TIM11_CH1I2C1_SDASPI2_NSS/I2S2_WSCAN1_TXSDIO_D5DCMI_D7EVENTOUT
29PortBPB10TIM2_CH3I2C2_SCLSPI2_SCK/I2S2_CKUSART3_TXOTG_HS_ULPI_D3ETH_MII_RX_EREVENTOUT
30PortBPB11TIM2_CH4I2C2_SDAUSART3_RXOTG_HS_ULPI_D4ETH_MII_TX_EN/ETH_RMII_TX_ENEVENTOUT
31PortBPB12TIM1_BKINI2C2_SMBASPI2_NSS/I2S2_WSUSART3_CKCAN2_RXOTG_HS_ULPI_D5ETH_MII_TXD0/ETH_RMII_TXD0OTG_HS_IDEVENTOUT
32PortBPB13TIM1_CH1NSPI2_SCK/I2S2_CKUSART3_CTSCAN2_TXOTG_HS_ULPI_D6ETH_MII_TXD1/ETH_RMII_TXD1EVENTOUT
33PortBPB14TIM1_CH2NTIM8_CH2NSPI2_MISOI2S2ext_SDUSART3_RTSTIM12_CH1OTG_HS_DMEVENTOUT
34PortBPB15RTC_REFINTIM1_CH3NTIM8_CH3NSPI2_MOSI/I2S2_SDTIM12_CH2OTG_HS_DPEVENTOUT
35PortCPC0OTG_HS_ULPI_STPEVENTOUTADC123_IN10
36PortCPC1ETH_MDCEVENTOUTADC123_IN11
37PortCPC2SPI2_MISOI2S2ext_SDOTG_HS_ULPI_DIRETH_MII_TXD2EVENTOUTADC123_IN12
38PortCPC3SPI2_MOSI/I2S2_SDOTG_HS_ULPI_NXTETH_MII_TX_CLKEVENTOUTADC123_IN13
39PortCPC4ETH_MII_RXD0/ETH_RMII_RXD0EVENTOUTADC123_IN14
40PortCPC5ETH_MII_RXD1/ETH_RMII_RXD1EVENTOUTADC123_IN15
41PortCPC6TIM3_CH1TIM8_CH1I2S2_MCKUSART6_TXSDIO_D6DCMI_D0EVENTOUT
42PortCPC7TIM3_CH2TIM8_CH2I2S3_MCKUSART6_RXSDIO_D7DCMI_D1EVENTOUT
43PortCPC8TIM3_CH3TIM8_CH3USART6_CKSDIO_D0DCMI_D2EVENTOUT
44PortCPC9MCO2TIM3_CH4TIM8_CH4I2C3_SDAI2S_CKINSDIO_D1DCMI_D3EVENTOUT
45PortCPC10SPI3_SCK/I2S3_CKUSART3_TXUART4_TXSDIO_D2DCMI_D8EVENTOUT
46PortCPC11I2S3ext_SDSPI3_MISOUSART3_RXUART4_RXSDIO_D3DCMI_D4EVENTOUT
47PortCPC12SPI3_MOSI/I2S3_SDUSART3_CKUART5_TXSDIO_CKDCMI_D9EVENTOUT
48PortCPC13EVENTOUT
49PortCPC14EVENTOUT
50PortCPC15EVENTOUT
51PortDPD0CAN1_RXFSMC_D2EVENTOUT
52PortDPD1CAN1_TXFSMC_D3EVENTOUT
53PortDPD2TIM3_ETRUART5_RXSDIO_CMDDCMI_D11EVENTOUT
54PortDPD3USART2_CTSFSMC_CLKEVENTOUT
55PortDPD4USART2_RTSFSMC_NOEEVENTOUT
56PortDPD5USART2_TXFSMC_NWEEVENTOUT
57PortDPD6USART2_RXFSMC_NWAITEVENTOUT
58PortDPD7USART2_CKFSMC_NE1/FSMC_NCE2EVENTOUT
59PortDPD8USART3_TXFSMC_D13EVENTOUT
60PortDPD9USART3_RXFSMC_D14EVENTOUT
61PortDPD10USART3_CKFSMC_D15EVENTOUT
62PortDPD11USART3_CTSFSMC_A16EVENTOUT
63PortDPD12TIM4_CH1USART3_RTSFSMC_A17EVENTOUT
64PortDPD13TIM4_CH2FSMC_A18EVENTOUT
65PortDPD14TIM4_CH3FSMC_D0EVENTOUT
66PortDPD15TIM4_CH4FSMC_D1EVENTOUT
67PortEPE0TIM4_ETRFSMC_NBL0DCMI_D2EVENTOUT
68PortEPE1FSMC_NBL1DCMI_D3EVENTOUT
69PortEPE2TRACECLKETH_MII_TXD3FSMC_A23EVENTOUT
70PortEPE3TRACED0FSMC_A19EVENTOUT
71PortEPE4TRACED1FSMC_A20DCMI_D4EVENTOUT
72PortEPE5TRACED2TIM9_CH1FSMC_A21DCMI_D6EVENTOUT
73PortEPE6TRACED3TIM9_CH2FSMC_A22DCMI_D7EVENTOUT
74PortEPE7TIM1_ETRFSMC_D4EVENTOUT
75PortEPE8TIM1_CH1NFSMC_D5EVENTOUT
76PortEPE9TIM1_CH1FSMC_D6EVENTOUT
77PortEPE10TIM1_CH2NFSMC_D7EVENTOUT
78PortEPE11TIM1_CH2FSMC_D8EVENTOUT
79PortEPE12TIM1_CH3NFSMC_D9EVENTOUT
80PortEPE13TIM1_CH3FSMC_D10EVENTOUT
81PortEPE14TIM1_CH4FSMC_D11EVENTOUT
82PortEPE15TIM1_BKINFSMC_D12EVENTOUT
83PortFPF0I2C2_SDAFSMC_A0EVENTOUT
84PortFPF1I2C2_SCLFSMC_A1EVENTOUT
85PortFPF2I2C2_SMBAFSMC_A2EVENTOUT
86PortFPF3FSMC_A3EVENTOUTADC3_IN9
87PortFPF4FSMC_A4EVENTOUTADC3_IN14
88PortFPF5FSMC_A5EVENTOUTADC3_IN15
89PortFPF6TIM10_CH1FSMC_NIORDEVENTOUTADC3_IN4
90PortFPF7TIM11_CH1FSMC_NREGEVENTOUTADC3_IN5
91PortFPF8TIM13_CH1FSMC_NIOWREVENTOUTADC3_IN6
92PortFPF9TIM14_CH1FSMC_CDEVENTOUTADC3_IN7
93PortFPF10FSMC_INTREVENTOUTADC3_IN8
94PortFPF11DCMI_D12EVENTOUT
95PortFPF12FSMC_A6EVENTOUT
96PortFPF13FSMC_A7EVENTOUT
97PortFPF14FSMC_A8EVENTOUT
98PortFPF15FSMC_A9EVENTOUT
99PortGPG0FSMC_A10EVENTOUT
100PortGPG1FSMC_A11EVENTOUT
101PortGPG2FSMC_A12EVENTOUT
102PortGPG3FSMC_A13EVENTOUT
103PortGPG4FSMC_A14EVENTOUT
104PortGPG5FSMC_A15EVENTOUT
105PortGPG6FSMC_INT2EVENTOUT
106PortGPG7USART6_CKFSMC_INT3EVENTOUT
107PortGPG8USART6_RTSETH_PPS_OUTEVENTOUT
108PortGPG9USART6_RXFSMC_NE2/FSMC_NCE3EVENTOUT
109PortGPG10FSMC_NCE4_1/FSMC_NE3EVENTOUT
110PortGPG11ETH_MII_TX_EN/ETH_RMII_TX_ENFSMC_NCE4_2EVENTOUT
111PortGPG12USART6_RTSFSMC_NE4EVENTOUT
112PortGPG13USART6_CTSETH_MII_TXD0/ETH_RMII_TXD0FSMC_A24EVENTOUT
113PortGPG14USART6_TXETH_MII_TXD1/ETH_RMII_TXD1FSMC_A25EVENTOUT
114PortGPG15USART6_CTSDCMI_D13EVENTOUT
115PortHPH0EVENTOUT
116PortHPH1EVENTOUT
117PortHPH2ETH_MII_CRSEVENTOUT
118PortHPH3ETH_MII_COLEVENTOUT
119PortHPH4I2C2_SCLOTG_HS_ULPI_NXTEVENTOUT
120PortHPH5I2C2_SDAEVENTOUT
121PortHPH6I2C2_SMBATIM12_CH1ETH_MII_RXD2EVENTOUT
122PortHPH7I2C3_SCLETH_MII_RXD3EVENTOUT
123PortHPH8I2C3_SDADCMI_HSYNCEVENTOUT
124PortHPH9I2C3_SMBATIM12_CH2DCMI_D0EVENTOUT
125PortHPH10TIM5_CH1DCMI_D1EVENTOUT
126PortHPH11TIM5_CH2DCMI_D2EVENTOUT
127PortHPH12TIM5_CH3DCMI_D3EVENTOUT
128PortHPH13TIM8_CH1NCAN1_TXEVENTOUT
129PortHPH14TIM8_CH2NDCMI_D4EVENTOUT
130PortHPH15TIM8_CH3NDCMI_D11EVENTOUT
131PortIPI0TIM5_CH4SPI2_NSS/I2S2_WSDCMI_D13EVENTOUT
132PortIPI1SPI2_SCK/I2S2_CKDCMI_D8EVENTOUT
133PortIPI2TIM8_CH4SPI2_MISOI2S2ext_SDDCMI_D9EVENTOUT
134PortIPI3TIM8_ETRSPI2_MOSI/I2S2_SDDCMI_D10EVENTOUT
135PortIPI4TIM8_BKINDCMI_D5EVENTOUT
136PortIPI5TIM8_CH1DCMI_VSYNCEVENTOUT
137PortIPI6TIM8_CH2DCMI_D6EVENTOUT
138PortIPI7TIM8_CH3DCMI_D7EVENTOUT
139PortIPI8EVENTOUT
140PortIPI9CAN1_RXEVENTOUT
141PortIPI10ETH_MII_RX_EREVENTOUT
142PortIPI11OTG_HS_ULPI_DIREVENTOUT