kopia lustrzana https://github.com/espressif/esp-idf
4acfe1a91a
The coprocessor cpu trap signal doesnt have a stable reset value, force ULP-RISC-V clock on to stop RTC_COCPU_TRAP_TRIG_EN from waking the CPU |
||
|---|---|---|
| .. | ||
| cmake | ||
| include | ||
| ld | ||
| test | ||
| ulp_riscv | ||
| CMakeLists.txt | ||
| Makefile.projbuild | ||
| component.mk | ||
| component_ulp_common.cmake | ||
| component_ulp_common.mk | ||
| esp32ulp_mapgen.py | ||
| project_include.cmake | ||
| toolchain_ulp_version.mk | ||
| ulp.c | ||
| ulp_macro.c | ||
| ulp_private.h | ||
| ulp_riscv.c | ||
| ulp_riscv_adc.c | ||