kopia lustrzana https://github.com/espressif/esp-idf
106 wiersze
3.3 KiB
C
106 wiersze
3.3 KiB
C
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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#include "soc/soc_caps.h"
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#include "hal/dma_types.h"
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#include "freertos/FreeRTOS.h"
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#if SOC_CP_DMA_SUPPORTED
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#include "hal/cp_dma_ll.h"
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#include "hal/cp_dma_hal.h"
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#elif SOC_GDMA_SUPPORTED
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#include "esp_private/gdma.h"
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#endif
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/**
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* @brief Type of async mcp implementation layer context
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*
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*/
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typedef struct {
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#if SOC_CP_DMA_SUPPORTED
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cp_dma_hal_context_t hal; // CP DMA hal
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intr_handle_t intr; // CP DMA interrupt handle
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portMUX_TYPE hal_lock; // CP DMA HAL level spin lock
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#elif SOC_GDMA_SUPPORTED
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gdma_channel_handle_t tx_channel;
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gdma_channel_handle_t rx_channel;
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#endif
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intptr_t rx_eof_addr;
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bool isr_need_yield; // if current isr needs a yield for higher priority task
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} async_memcpy_impl_t;
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/**
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* @brief ISR callback function, invoked when RX done event triggered
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*
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* @param impl async mcp implementation layer context pointer
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*/
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void async_memcpy_isr_on_rx_done_event(async_memcpy_impl_t *impl);
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/**
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* @brief Initialize async mcp implementation layer
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_init(async_memcpy_impl_t *impl);
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/**
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* @brief Deinitialize async mcp implementation layer
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_deinit(async_memcpy_impl_t *impl);
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/**
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* @brief Start async mcp (on implementation layer)
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*
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* @param impl async mcp implementation layer context pointer
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* @param outlink_base base descriptor address for TX DMA channel
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* @param inlink_base base descriptor address for RX DMA channel
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_start(async_memcpy_impl_t *impl, intptr_t outlink_base, intptr_t inlink_base);
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/**
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* @brief Stop async mcp (on implementation layer)
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_stop(async_memcpy_impl_t *impl);
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/**
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* @brief Restart async mcp DMA engine
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_restart(async_memcpy_impl_t *impl);
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/**
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* @brief check if buffer address is valid
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* @note This is related to underlying target (e.g. on esp32-s2, only buffer located in SRAM is supported)
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*
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* @param impl async mcp implementation layer context pointer
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* @param src Source buffer address
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* @param dst Destination buffer address
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* @return True if both address are valid
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*/
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bool async_memcpy_impl_is_buffer_address_valid(async_memcpy_impl_t *impl, void *src, void *dst);
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