esp-idf/components/esp32/include/xtensa
Ivan Grokhotkov 964f5a91f7 bootloader, esp32: add workaround for Tensilica erratum 572
If zero-overhead loop buffer is enabled, under certain rare conditions
when executing a zero-overhead loop, the CPU may attempt to execute an invalid instruction. Work around by disabling the buffer.
2018-11-19 04:39:35 +00:00
..
config bootloader, esp32: add workaround for Tensilica erratum 572 2018-11-19 04:39:35 +00:00
cacheasm.h
cacheattrasm.h
core-macros.h xtensa: make XTHAL_GET_INTERRUPT, XTHAL_GET_CCOUNT volatile 2018-07-02 11:31:19 +08:00
coreasm.h
corebits.h
hal.h
specreg.h
traxreg.h
xdm-regs.h
xt_perf_consts.h
xtensa-libdb-macros.h
xtensa-versions.h
xtensa-xer.h
xtruntime-core-state.h
xtruntime-frames.h
xtruntime.h