kopia lustrzana https://github.com/espressif/esp-idf
xtensa: make XTHAL_GET_INTERRUPT, XTHAL_GET_CCOUNT volatile
INTERRUPT and CCOUNT registers will change outside of program control. Making the inline assembly used to read these registers volatile indicates this fact to the compiler. Fixes https://github.com/espressif/esp-idf/issues/2127pull/2140/merge
rodzic
a8fa4201b9
commit
da179e0098
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@ -335,7 +335,7 @@
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__asm__ __volatile__("wsr.intenable %0" :: "a"(__intenable):"memory"); \
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} while(0)
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# define XTHAL_GET_INTERRUPT() ({ int __interrupt; \
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__asm__("rsr.interrupt %0" : "=a"(__interrupt)); \
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__asm__ __volatile__("rsr.interrupt %0" : "=a"(__interrupt)); \
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__interrupt; })
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# define XTHAL_SET_INTSET(v) do { int __interrupt = (int)(v); \
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__asm__ __volatile__("wsr.intset %0" :: "a"(__interrupt):"memory"); \
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@ -344,7 +344,7 @@
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__asm__ __volatile__("wsr.intclear %0" :: "a"(__interrupt):"memory"); \
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} while(0)
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# define XTHAL_GET_CCOUNT() ({ int __ccount; \
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__asm__("rsr.ccount %0" : "=a"(__ccount)); \
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__asm__ __volatile__("rsr.ccount %0" : "=a"(__ccount)); \
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__ccount; })
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# define XTHAL_SET_CCOUNT(v) do { int __ccount = (int)(v); \
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__asm__ __volatile__("wsr.ccount %0" :: "a"(__ccount):"memory"); \
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