kopia lustrzana https://github.com/espressif/esp-idf
25 KiB
25 KiB
1 | # field_name, | efuse_block, | bit_start, | bit_count, |comment # |
---|---|
2 | # | (EFUSE_BLK0 | (0..255) | (1-256) | # |
3 | # | EFUSE_BLK1 | | | # |
4 | # | ...) | | | # |
5 | ########################################################################## |
6 | # !!!!!!!!!!! # |
7 | # this will generate new source files, next rebuild all the sources. |
8 | # !!!!!!!!!!! # |
9 | # This file was generated by regtools.py based on the efuses.yaml file with the version: 6925129eca795b8b087d31be539740ec |
10 | WR_DIS, EFUSE_BLK0, 0, 32, [] Disable programming of individual eFuses |
11 | WR_DIS.RD_DIS, EFUSE_BLK0, 0, 1, [] wr_dis of RD_DIS |
12 | WR_DIS.DIS_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_ICACHE |
13 | WR_DIS.DIS_DCACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DCACHE |
14 | WR_DIS.DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_ICACHE |
15 | WR_DIS.DIS_DOWNLOAD_DCACHE, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_DCACHE |
16 | WR_DIS.DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_FORCE_DOWNLOAD |
17 | WR_DIS.DIS_USB_OTG, EFUSE_BLK0, 2, 1, [WR_DIS.DIS_USB] wr_dis of DIS_USB_OTG |
18 | WR_DIS.DIS_TWAI, EFUSE_BLK0, 2, 1, [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI |
19 | WR_DIS.DIS_APP_CPU, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_APP_CPU |
20 | WR_DIS.DIS_PAD_JTAG, EFUSE_BLK0, 2, 1, [WR_DIS.HARD_DIS_JTAG] wr_dis of DIS_PAD_JTAG |
21 | WR_DIS.DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT |
22 | WR_DIS.DIS_USB_JTAG, EFUSE_BLK0, 2, 1, [] wr_dis of DIS_USB_JTAG |
23 | WR_DIS.DIS_USB_SERIAL_JTAG, EFUSE_BLK0, 2, 1, [WR_DIS.DIS_USB_DEVICE] wr_dis of DIS_USB_SERIAL_JTAG |
24 | WR_DIS.STRAP_JTAG_SEL, EFUSE_BLK0, 2, 1, [] wr_dis of STRAP_JTAG_SEL |
25 | WR_DIS.USB_PHY_SEL, EFUSE_BLK0, 2, 1, [] wr_dis of USB_PHY_SEL |
26 | WR_DIS.VDD_SPI_XPD, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_XPD |
27 | WR_DIS.VDD_SPI_TIEH, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_TIEH |
28 | WR_DIS.VDD_SPI_FORCE, EFUSE_BLK0, 3, 1, [] wr_dis of VDD_SPI_FORCE |
29 | WR_DIS.WDT_DELAY_SEL, EFUSE_BLK0, 3, 1, [] wr_dis of WDT_DELAY_SEL |
30 | WR_DIS.SPI_BOOT_CRYPT_CNT, EFUSE_BLK0, 4, 1, [] wr_dis of SPI_BOOT_CRYPT_CNT |
31 | WR_DIS.SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 5, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE0 |
32 | WR_DIS.SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 6, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE1 |
33 | WR_DIS.SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 7, 1, [] wr_dis of SECURE_BOOT_KEY_REVOKE2 |
34 | WR_DIS.KEY_PURPOSE_0, EFUSE_BLK0, 8, 1, [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0 |
35 | WR_DIS.KEY_PURPOSE_1, EFUSE_BLK0, 9, 1, [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1 |
36 | WR_DIS.KEY_PURPOSE_2, EFUSE_BLK0, 10, 1, [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2 |
37 | WR_DIS.KEY_PURPOSE_3, EFUSE_BLK0, 11, 1, [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3 |
38 | WR_DIS.KEY_PURPOSE_4, EFUSE_BLK0, 12, 1, [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4 |
39 | WR_DIS.KEY_PURPOSE_5, EFUSE_BLK0, 13, 1, [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5 |
40 | WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, [] wr_dis of SECURE_BOOT_EN |
41 | WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 16, 1, [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE |
42 | WR_DIS.FLASH_TPUW, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TPUW |
43 | WR_DIS.DIS_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of DIS_DOWNLOAD_MODE |
44 | WR_DIS.DIS_DIRECT_BOOT, EFUSE_BLK0, 18, 1, [WR_DIS.DIS_LEGACY_SPI_BOOT] wr_dis of DIS_DIRECT_BOOT |
45 | WR_DIS.DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 18, 1, [WR_DIS.UART_PRINT_CHANNEL] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT |
46 | WR_DIS.FLASH_ECC_MODE, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_ECC_MODE |
47 | WR_DIS.DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 18, 1, [WR_DIS.DIS_USB_DOWNLOAD_MODE] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE |
48 | WR_DIS.ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 18, 1, [] wr_dis of ENABLE_SECURITY_DOWNLOAD |
49 | WR_DIS.UART_PRINT_CONTROL, EFUSE_BLK0, 18, 1, [] wr_dis of UART_PRINT_CONTROL |
50 | WR_DIS.PIN_POWER_SELECTION, EFUSE_BLK0, 18, 1, [] wr_dis of PIN_POWER_SELECTION |
51 | WR_DIS.FLASH_TYPE, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_TYPE |
52 | WR_DIS.FLASH_PAGE_SIZE, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_PAGE_SIZE |
53 | WR_DIS.FLASH_ECC_EN, EFUSE_BLK0, 18, 1, [] wr_dis of FLASH_ECC_EN |
54 | WR_DIS.FORCE_SEND_RESUME, EFUSE_BLK0, 18, 1, [] wr_dis of FORCE_SEND_RESUME |
55 | WR_DIS.SECURE_VERSION, EFUSE_BLK0, 18, 1, [] wr_dis of SECURE_VERSION |
56 | WR_DIS.DIS_USB_OTG_DOWNLOAD_MODE, EFUSE_BLK0, 19, 1, [] wr_dis of DIS_USB_OTG_DOWNLOAD_MODE |
57 | WR_DIS.DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 19, 1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR |
58 | WR_DIS.DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 19, 1, [] wr_dis of DISABLE_BLK_VERSION_MAJOR |
59 | WR_DIS.BLK1, EFUSE_BLK0, 20, 1, [] wr_dis of BLOCK1 |
60 | WR_DIS.MAC, EFUSE_BLK0, 20, 1, [WR_DIS.MAC_FACTORY] wr_dis of MAC |
61 | WR_DIS.SPI_PAD_CONFIG_CLK, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_CLK |
62 | WR_DIS.SPI_PAD_CONFIG_Q, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_Q |
63 | WR_DIS.SPI_PAD_CONFIG_D, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D |
64 | WR_DIS.SPI_PAD_CONFIG_CS, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_CS |
65 | WR_DIS.SPI_PAD_CONFIG_HD, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_HD |
66 | WR_DIS.SPI_PAD_CONFIG_WP, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_WP |
67 | WR_DIS.SPI_PAD_CONFIG_DQS, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_DQS |
68 | WR_DIS.SPI_PAD_CONFIG_D4, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D4 |
69 | WR_DIS.SPI_PAD_CONFIG_D5, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D5 |
70 | WR_DIS.SPI_PAD_CONFIG_D6, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D6 |
71 | WR_DIS.SPI_PAD_CONFIG_D7, EFUSE_BLK0, 20, 1, [] wr_dis of SPI_PAD_CONFIG_D7 |
72 | WR_DIS.WAFER_VERSION_MINOR_LO, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR_LO |
73 | WR_DIS.PKG_VERSION, EFUSE_BLK0, 20, 1, [] wr_dis of PKG_VERSION |
74 | WR_DIS.BLK_VERSION_MINOR, EFUSE_BLK0, 20, 1, [] wr_dis of BLK_VERSION_MINOR |
75 | WR_DIS.K_RTC_LDO, EFUSE_BLK0, 20, 1, [] wr_dis of K_RTC_LDO |
76 | WR_DIS.K_DIG_LDO, EFUSE_BLK0, 20, 1, [] wr_dis of K_DIG_LDO |
77 | WR_DIS.V_RTC_DBIAS20, EFUSE_BLK0, 20, 1, [] wr_dis of V_RTC_DBIAS20 |
78 | WR_DIS.V_DIG_DBIAS20, EFUSE_BLK0, 20, 1, [] wr_dis of V_DIG_DBIAS20 |
79 | WR_DIS.DIG_DBIAS_HVT, EFUSE_BLK0, 20, 1, [] wr_dis of DIG_DBIAS_HVT |
80 | WR_DIS.WAFER_VERSION_MINOR_HI, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MINOR_HI |
81 | WR_DIS.WAFER_VERSION_MAJOR, EFUSE_BLK0, 20, 1, [] wr_dis of WAFER_VERSION_MAJOR |
82 | WR_DIS.ADC2_CAL_VOL_ATTEN3, EFUSE_BLK0, 20, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN3 |
83 | WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, [] wr_dis of BLOCK2 |
84 | WR_DIS.OPTIONAL_UNIQUE_ID, EFUSE_BLK0, 21, 1, [] wr_dis of OPTIONAL_UNIQUE_ID |
85 | WR_DIS.BLK_VERSION_MAJOR, EFUSE_BLK0, 21, 1, [] wr_dis of BLK_VERSION_MAJOR |
86 | WR_DIS.TEMP_CALIB, EFUSE_BLK0, 21, 1, [] wr_dis of TEMP_CALIB |
87 | WR_DIS.OCODE, EFUSE_BLK0, 21, 1, [] wr_dis of OCODE |
88 | WR_DIS.ADC1_INIT_CODE_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN0 |
89 | WR_DIS.ADC1_INIT_CODE_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN1 |
90 | WR_DIS.ADC1_INIT_CODE_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN2 |
91 | WR_DIS.ADC1_INIT_CODE_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_INIT_CODE_ATTEN3 |
92 | WR_DIS.ADC2_INIT_CODE_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN0 |
93 | WR_DIS.ADC2_INIT_CODE_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN1 |
94 | WR_DIS.ADC2_INIT_CODE_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN2 |
95 | WR_DIS.ADC2_INIT_CODE_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_INIT_CODE_ATTEN3 |
96 | WR_DIS.ADC1_CAL_VOL_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN0 |
97 | WR_DIS.ADC1_CAL_VOL_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN1 |
98 | WR_DIS.ADC1_CAL_VOL_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN2 |
99 | WR_DIS.ADC1_CAL_VOL_ATTEN3, EFUSE_BLK0, 21, 1, [] wr_dis of ADC1_CAL_VOL_ATTEN3 |
100 | WR_DIS.ADC2_CAL_VOL_ATTEN0, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN0 |
101 | WR_DIS.ADC2_CAL_VOL_ATTEN1, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN1 |
102 | WR_DIS.ADC2_CAL_VOL_ATTEN2, EFUSE_BLK0, 21, 1, [] wr_dis of ADC2_CAL_VOL_ATTEN2 |
103 | WR_DIS.BLOCK_USR_DATA, EFUSE_BLK0, 22, 1, [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA |
104 | WR_DIS.CUSTOM_MAC, EFUSE_BLK0, 22, 1, [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC |
105 | WR_DIS.BLOCK_KEY0, EFUSE_BLK0, 23, 1, [WR_DIS.KEY0] wr_dis of BLOCK_KEY0 |
106 | WR_DIS.BLOCK_KEY1, EFUSE_BLK0, 24, 1, [WR_DIS.KEY1] wr_dis of BLOCK_KEY1 |
107 | WR_DIS.BLOCK_KEY2, EFUSE_BLK0, 25, 1, [WR_DIS.KEY2] wr_dis of BLOCK_KEY2 |
108 | WR_DIS.BLOCK_KEY3, EFUSE_BLK0, 26, 1, [WR_DIS.KEY3] wr_dis of BLOCK_KEY3 |
109 | WR_DIS.BLOCK_KEY4, EFUSE_BLK0, 27, 1, [WR_DIS.KEY4] wr_dis of BLOCK_KEY4 |
110 | WR_DIS.BLOCK_KEY5, EFUSE_BLK0, 28, 1, [WR_DIS.KEY5] wr_dis of BLOCK_KEY5 |
111 | WR_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 29, 1, [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2 |
112 | WR_DIS.USB_EXCHG_PINS, EFUSE_BLK0, 30, 1, [] wr_dis of USB_EXCHG_PINS |
113 | WR_DIS.USB_EXT_PHY_ENABLE, EFUSE_BLK0, 30, 1, [WR_DIS.EXT_PHY_ENABLE] wr_dis of USB_EXT_PHY_ENABLE |
114 | WR_DIS.SOFT_DIS_JTAG, EFUSE_BLK0, 31, 1, [] wr_dis of SOFT_DIS_JTAG |
115 | RD_DIS, EFUSE_BLK0, 32, 7, [] Disable reading from BlOCK4-10 |
116 | RD_DIS.BLOCK_KEY0, EFUSE_BLK0, 32, 1, [RD_DIS.KEY0] rd_dis of BLOCK_KEY0 |
117 | RD_DIS.BLOCK_KEY1, EFUSE_BLK0, 33, 1, [RD_DIS.KEY1] rd_dis of BLOCK_KEY1 |
118 | RD_DIS.BLOCK_KEY2, EFUSE_BLK0, 34, 1, [RD_DIS.KEY2] rd_dis of BLOCK_KEY2 |
119 | RD_DIS.BLOCK_KEY3, EFUSE_BLK0, 35, 1, [RD_DIS.KEY3] rd_dis of BLOCK_KEY3 |
120 | RD_DIS.BLOCK_KEY4, EFUSE_BLK0, 36, 1, [RD_DIS.KEY4] rd_dis of BLOCK_KEY4 |
121 | RD_DIS.BLOCK_KEY5, EFUSE_BLK0, 37, 1, [RD_DIS.KEY5] rd_dis of BLOCK_KEY5 |
122 | RD_DIS.BLOCK_SYS_DATA2, EFUSE_BLK0, 38, 1, [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2 |
123 | DIS_ICACHE, EFUSE_BLK0, 40, 1, [] Set this bit to disable Icache |
124 | DIS_DCACHE, EFUSE_BLK0, 41, 1, [] Set this bit to disable Dcache |
125 | DIS_DOWNLOAD_ICACHE, EFUSE_BLK0, 42, 1, [] Set this bit to disable Icache in download mode (boot_mode[3:0] is 0; 1; 2; 3; 6; 7) |
126 | DIS_DOWNLOAD_DCACHE, EFUSE_BLK0, 43, 1, [] Set this bit to disable Dcache in download mode ( boot_mode[3:0] is 0; 1; 2; 3; 6; 7) |
127 | DIS_FORCE_DOWNLOAD, EFUSE_BLK0, 44, 1, [] Set this bit to disable the function that forces chip into download mode |
128 | DIS_USB_OTG, EFUSE_BLK0, 45, 1, [DIS_USB] Set this bit to disable USB function |
129 | DIS_TWAI, EFUSE_BLK0, 46, 1, [DIS_CAN] Set this bit to disable CAN function |
130 | DIS_APP_CPU, EFUSE_BLK0, 47, 1, [] Disable app cpu |
131 | SOFT_DIS_JTAG, EFUSE_BLK0, 48, 3, [] Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module |
132 | DIS_PAD_JTAG, EFUSE_BLK0, 51, 1, [HARD_DIS_JTAG] Set this bit to disable JTAG in the hard way. JTAG is disabled permanently |
133 | DIS_DOWNLOAD_MANUAL_ENCRYPT, EFUSE_BLK0, 52, 1, [] Set this bit to disable flash encryption when in download boot modes |
134 | USB_EXCHG_PINS, EFUSE_BLK0, 57, 1, [] Set this bit to exchange USB D+ and D- pins |
135 | USB_EXT_PHY_ENABLE, EFUSE_BLK0, 58, 1, [EXT_PHY_ENABLE] Set this bit to enable external PHY |
136 | VDD_SPI_XPD, EFUSE_BLK0, 68, 1, [] SPI regulator power up signal |
137 | VDD_SPI_FORCE, EFUSE_BLK0, 70, 1, [] Set this bit and force to use the configuration of eFuse to configure VDD_SPI |
138 | SECURE_BOOT_KEY_REVOKE0, EFUSE_BLK0, 85, 1, [] Revoke 1st secure boot key |
139 | SECURE_BOOT_KEY_REVOKE1, EFUSE_BLK0, 86, 1, [] Revoke 2nd secure boot key |
140 | SECURE_BOOT_KEY_REVOKE2, EFUSE_BLK0, 87, 1, [] Revoke 3rd secure boot key |
141 | KEY_PURPOSE_0, EFUSE_BLK0, 88, 4, [KEY0_PURPOSE] Purpose of Key0 |
142 | KEY_PURPOSE_1, EFUSE_BLK0, 92, 4, [KEY1_PURPOSE] Purpose of Key1 |
143 | KEY_PURPOSE_2, EFUSE_BLK0, 96, 4, [KEY2_PURPOSE] Purpose of Key2 |
144 | KEY_PURPOSE_3, EFUSE_BLK0, 100, 4, [KEY3_PURPOSE] Purpose of Key3 |
145 | KEY_PURPOSE_4, EFUSE_BLK0, 104, 4, [KEY4_PURPOSE] Purpose of Key4 |
146 | KEY_PURPOSE_5, EFUSE_BLK0, 108, 4, [KEY5_PURPOSE] Purpose of Key5 |
147 | SECURE_BOOT_EN, EFUSE_BLK0, 116, 1, [] Set this bit to enable secure boot |
148 | SECURE_BOOT_AGGRESSIVE_REVOKE, EFUSE_BLK0, 117, 1, [] Set this bit to enable revoking aggressive secure boot |
149 | DIS_USB_JTAG, EFUSE_BLK0, 118, 1, [] Set this bit to disable function of usb switch to jtag in module of usb device |
150 | DIS_USB_SERIAL_JTAG, EFUSE_BLK0, 119, 1, [DIS_USB_DEVICE] Set this bit to disable usb device |
151 | STRAP_JTAG_SEL, EFUSE_BLK0, 120, 1, [] Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0 |
152 | FLASH_TPUW, EFUSE_BLK0, 124, 4, [] Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value. Otherwise; the waiting time is twice the configurable value |
153 | DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, [] Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 3; 6; 7) |
154 | DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, [DIS_LEGACY_SPI_BOOT] Disable direct boot mode |
155 | DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, [DIS_USB_DOWNLOAD_MODE] Set this bit to disable UART download mode through USB |
156 | ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, [] Set this bit to enable secure UART download mode |
157 | FLASH_PAGE_SIZE, EFUSE_BLK0, 138, 2, [] Set Flash page size |
158 | FLASH_ECC_EN, EFUSE_BLK0, 140, 1, [] Set 1 to enable ECC for flash boot |
159 | FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, [] Set this bit to force ROM code to send a resume command during SPI boot |
160 | SECURE_VERSION, EFUSE_BLK0, 142, 16, [] Secure version (used by ESP-IDF anti-rollback feature) |
161 | DIS_USB_OTG_DOWNLOAD_MODE, EFUSE_BLK0, 159, 1, [] Set this bit to disable download through USB-OTG |
162 | DISABLE_WAFER_VERSION_MAJOR, EFUSE_BLK0, 160, 1, [] Disables check of wafer version major |
163 | DISABLE_BLK_VERSION_MAJOR, EFUSE_BLK0, 161, 1, [] Disables check of blk version major |
164 | MAC, EFUSE_BLK1, 40, 8, [MAC_FACTORY] MAC address |
165 | , EFUSE_BLK1, 32, 8, [MAC_FACTORY] MAC address |
166 | , EFUSE_BLK1, 24, 8, [MAC_FACTORY] MAC address |
167 | , EFUSE_BLK1, 16, 8, [MAC_FACTORY] MAC address |
168 | , EFUSE_BLK1, 8, 8, [MAC_FACTORY] MAC address |
169 | , EFUSE_BLK1, 0, 8, [MAC_FACTORY] MAC address |
170 | SPI_PAD_CONFIG_CLK, EFUSE_BLK1, 48, 6, [] SPI_PAD_configure CLK |
171 | SPI_PAD_CONFIG_Q, EFUSE_BLK1, 54, 6, [] SPI_PAD_configure Q(D1) |
172 | SPI_PAD_CONFIG_D, EFUSE_BLK1, 60, 6, [] SPI_PAD_configure D(D0) |
173 | SPI_PAD_CONFIG_CS, EFUSE_BLK1, 66, 6, [] SPI_PAD_configure CS |
174 | SPI_PAD_CONFIG_HD, EFUSE_BLK1, 72, 6, [] SPI_PAD_configure HD(D3) |
175 | SPI_PAD_CONFIG_WP, EFUSE_BLK1, 78, 6, [] SPI_PAD_configure WP(D2) |
176 | SPI_PAD_CONFIG_DQS, EFUSE_BLK1, 84, 6, [] SPI_PAD_configure DQS |
177 | SPI_PAD_CONFIG_D4, EFUSE_BLK1, 90, 6, [] SPI_PAD_configure D4 |
178 | SPI_PAD_CONFIG_D5, EFUSE_BLK1, 96, 6, [] SPI_PAD_configure D5 |
179 | SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, [] SPI_PAD_configure D6 |
180 | SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, [] SPI_PAD_configure D7 |
181 | WAFER_VERSION_MINOR_LO, EFUSE_BLK1, 114, 3, [] WAFER_VERSION_MINOR least significant bits |
182 | PKG_VERSION, EFUSE_BLK1, 117, 3, [] Package version |
183 | BLK_VERSION_MINOR, EFUSE_BLK1, 120, 3, [] BLK_VERSION_MINOR |
184 | K_RTC_LDO, EFUSE_BLK1, 141, 7, [] BLOCK1 K_RTC_LDO |
185 | K_DIG_LDO, EFUSE_BLK1, 148, 7, [] BLOCK1 K_DIG_LDO |
186 | V_RTC_DBIAS20, EFUSE_BLK1, 155, 8, [] BLOCK1 voltage of rtc dbias20 |
187 | V_DIG_DBIAS20, EFUSE_BLK1, 163, 8, [] BLOCK1 voltage of digital dbias20 |
188 | DIG_DBIAS_HVT, EFUSE_BLK1, 171, 5, [] BLOCK1 digital dbias when hvt |
189 | WAFER_VERSION_MINOR_HI, EFUSE_BLK1, 183, 1, [] WAFER_VERSION_MINOR most significant bit |
190 | WAFER_VERSION_MAJOR, EFUSE_BLK1, 184, 2, [] WAFER_VERSION_MAJOR |
191 | ADC2_CAL_VOL_ATTEN3, EFUSE_BLK1, 186, 6, [] ADC2 calibration voltage at atten3 |
192 | OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, [] Optional unique 128-bit ID |
193 | TEMP_CALIB, EFUSE_BLK2, 132, 9, [] Temperature calibration data |
194 | OCODE, EFUSE_BLK2, 141, 8, [] ADC OCode |
195 | ADC1_INIT_CODE_ATTEN0, EFUSE_BLK2, 149, 8, [] ADC1 init code at atten0 |
196 | ADC1_INIT_CODE_ATTEN1, EFUSE_BLK2, 157, 6, [] ADC1 init code at atten1 |
197 | ADC1_INIT_CODE_ATTEN2, EFUSE_BLK2, 163, 6, [] ADC1 init code at atten2 |
198 | ADC1_INIT_CODE_ATTEN3, EFUSE_BLK2, 169, 6, [] ADC1 init code at atten3 |
199 | ADC2_INIT_CODE_ATTEN0, EFUSE_BLK2, 175, 8, [] ADC2 init code at atten0 |
200 | ADC2_INIT_CODE_ATTEN1, EFUSE_BLK2, 183, 6, [] ADC2 init code at atten1 |
201 | ADC2_INIT_CODE_ATTEN2, EFUSE_BLK2, 189, 6, [] ADC2 init code at atten2 |
202 | ADC2_INIT_CODE_ATTEN3, EFUSE_BLK2, 195, 6, [] ADC2 init code at atten3 |
203 | ADC1_CAL_VOL_ATTEN0, EFUSE_BLK2, 201, 8, [] ADC1 calibration voltage at atten0 |
204 | ADC1_CAL_VOL_ATTEN1, EFUSE_BLK2, 209, 8, [] ADC1 calibration voltage at atten1 |
205 | ADC1_CAL_VOL_ATTEN2, EFUSE_BLK2, 217, 8, [] ADC1 calibration voltage at atten2 |
206 | ADC1_CAL_VOL_ATTEN3, EFUSE_BLK2, 225, 8, [] ADC1 calibration voltage at atten3 |
207 | ADC2_CAL_VOL_ATTEN0, EFUSE_BLK2, 233, 8, [] ADC2 calibration voltage at atten0 |
208 | ADC2_CAL_VOL_ATTEN1, EFUSE_BLK2, 241, 7, [] ADC2 calibration voltage at atten1 |
209 | ADC2_CAL_VOL_ATTEN2, EFUSE_BLK2, 248, 7, [] ADC2 calibration voltage at atten2 |
210 | USER_DATA, EFUSE_BLK3, 0, 256, [BLOCK_USR_DATA] User data |
211 | USER_DATA.MAC_CUSTOM, EFUSE_BLK3, 200, 48, [MAC_CUSTOM CUSTOM_MAC] Custom MAC |
212 | KEY0, EFUSE_BLK4, 0, 256, [BLOCK_KEY0] Key0 or user data |
213 | KEY1, EFUSE_BLK5, 0, 256, [BLOCK_KEY1] Key1 or user data |
214 | KEY2, EFUSE_BLK6, 0, 256, [BLOCK_KEY2] Key2 or user data |
215 | KEY3, EFUSE_BLK7, 0, 256, [BLOCK_KEY3] Key3 or user data |
216 | KEY4, EFUSE_BLK8, 0, 256, [BLOCK_KEY4] Key4 or user data |
217 | KEY5, EFUSE_BLK9, 0, 256, [BLOCK_KEY5] Key5 or user data |
218 | SYS_DATA_PART2, EFUSE_BLK10, 0, 256, [BLOCK_SYS_DATA2] System data part 2 (reserved) |