cd2f38a7bb
Merge branch 'feature/efuse_rst_is_treated_as_poweron_rst_v4.4' into 'release/v4.4'
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reset_reasons: EFUSE_RST is treated as POWERON_RST + checks errors of eFuse BLOCK0 (v4.4)
See merge request espressif/esp-idf!17871
2022-07-01 10:43:40 +08:00
74e9376022
esp_system: fix garbled UART output on startup on esp32s2
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Closes https://github.com/espressif/esp-idf/issues/9168
2022-06-29 12:33:05 +02:00
c563d799fe
efuse: Checks errors of 4x coding scheme for BLOCK0 if so then abort
2022-06-22 17:16:26 +08:00
dcc706280d
reset_reasons: EFUSE_RST is treated as POWERON_RST
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ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.
2022-06-22 16:39:02 +08:00
9017ff235b
riscv: Use semihosting to set breakpoint and watchpoint when running under debugger
2022-05-13 12:54:21 +03:00
ad532236ae
vfs: add support for semihosting on ESP32-C3
2022-04-19 13:55:36 +00:00
e3a5a85e2f
Merge branch 'feature/gcov_esp32c3_v4.4' into 'release/v4.4'
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debug_stubs and gcov: Refactor and add support for RISCV (v4.4)
See merge request espressif/esp-idf!17068
2022-02-16 03:26:49 +00:00
730ca0ea43
Merge branch 'bugfix/cpu_reset_perip_clk_disable_v4.4' into 'release/v4.4'
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esp_system: change range comparsion for reset reason to specifc cpu reset reason comparison (backport v4.4)
See merge request espressif/esp-idf!15898
2022-02-10 10:32:09 +00:00
1bbefc3e5d
debug_stubs: Refactor and add support for RISCV
2022-02-08 22:24:54 +03:00
b80a070395
esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset
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(cherry picked from commit f57456e9dd919e5eea1d3cd0caa64b5c97a4df73)
2022-01-27 09:51:00 +00:00
7d9652dccf
System/Security: Memprot API unified (ESP32C3,ESP32S3)
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Unified Memory protection API for all PMS-aware chips
Closes JIRA IDF-3849
2022-01-27 12:40:27 +08:00
a59e3ab59d
Merge branch 'feature/esp32s3_apptrace_v4.4' into 'release/v4.4'
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Feature/esp32s3 apptrace v4.4
See merge request espressif/esp-idf!16649
2022-01-26 09:58:35 +00:00
8f2045f0da
esp_system: Fix RTC_WDT protection in esp_restart_noos
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Fixed issue - v4.3 app not compatible with 3.1 bootloader
2022-01-10 21:57:29 +08:00
8c2990fcea
trax: Adds ESP32-S3 support
2022-01-05 19:34:28 +01:00
3f26866533
System/Security: wrong check of the Memprot feature in esp_restart()/panic_restart()
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esp_restart()/panic_restart() never resets the Digital system (so far required only by the Memprot feature) as there's a typo in the corresponding #define:
it checks CONFIG_ESP_SYSTEM_CONFIG_MEMPROT_FEATURE instead of CONFIG_ESP_SYSTEM_MEMPROT_FEATURE.
Issue fixed.
IDF-4094
2021-10-29 15:02:17 +02:00
81e3eb45ca
cpu_start: rename function to add core prefix for more clarity
2021-10-20 15:16:25 +05:30
61820f5b30
cpu_start: let individual core clear its interrupt matrix
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There was race condition where interrupt entries set by APP cpu core
could have been cleared during PRO cpu startup.
This was observed while setting up "cache access error" interrupt in
SMP mode for ESP32-S3.
This fix allows to NOT modify or clear any entries set by other core
(APP or PRO) and thus avoiding any race conditions during startup code.
2021-10-20 15:16:25 +05:30
bdeaeb8d7f
esp_system: enable "cache disable but cache accessed" interrupt for ESP32-S3
2021-10-20 15:16:25 +05:30
8048677b4c
Xtensa: Branch and jump intructions referencing a relative label have been replaced
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As branches/jumps on Xtensa have a maximum range for the destination, it is
unsafe to refer to a label to another compilation unit in a branch/jump instruction.
The labels have been replaced by absolute addresses.
2021-10-19 12:21:12 +08:00
6dc684d2fa
Merge branch 'feature/github-7517' into 'master'
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[system] fix compiler warning with silent panic option
Closes IDFGH-5812
See merge request espressif/esp-idf!15420
2021-10-11 08:56:57 +00:00
584806a78a
updated copyright text
2021-10-11 11:38:35 +08:00
f2b538b9e7
Merge branch 'master' into feature/github-7517
2021-10-09 18:58:27 +08:00
2655a506c9
mspi: support auto detect octal flash vendor
2021-10-08 15:59:57 +08:00
c45c6f52f1
adc: support adc efuse-based calibration on esp32s3
2021-09-14 11:42:50 +08:00
9f957cbfe2
Merge branch 'bugfix/memprot_panic_print_const_correction' into 'master'
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panic: Fix minor const string correction on meprot panic print
See merge request espressif/esp-idf!14851
2021-09-13 06:13:33 +00:00
006a10b050
components/doc: Update doc about high-level interrupt
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some bugfix.
2021-09-09 20:40:09 +08:00
0ee4c235eb
panic/memprot: Fix minor const string correction on panic print
2021-09-09 11:46:21 +02:00
6d63fe06fa
components/os: add config option to choose system check intterupt level.
2021-09-09 11:29:12 +08:00
8a4696d25a
components/os: Fix live lock int bt isr using ocd multicore debug
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components/os: Fix live lock in bt isr immediately
2021-09-09 11:29:08 +08:00
d1db2df316
components/bt: High level interrupt in bluetooth
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components/os: Move ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and ETS_DPORT_INUM to l5 interrupt
components/os: high level interrupt(5)
components/os: hli_api: meta queue: fix out of bounds access, check for overflow
components/os: hli: don't spill registers, instead save them to a separate region
Level 4 interrupt has a chance of preempting a window overflow or underflow exception.
Therefore it is not possible to use standard context save functions,
as the SP on entry to Level 4 interrupt may be invalid (e.g. in WindowUnderflow4).
Instead, mask window overflows and save the entire general purpose register file,
plus some of the special registers.
Then clear WindowStart, allowing the C handler to execute without spilling the old windows.
On exit from the interrupt handler, do everything in reverse.
components/bt: using high level interrupt in lc
components/os: Add DRAM_ATTR to avoid feature `Allow .bss segment placed in external memory`
components/bt: optimize code structure
components/os: Modify the BT assert process to adapt to coredump and HLI
components/os: Disable exception mode after saving special registers
To store some registers first, avoid stuck due to live lock after disabling exception mode
components/os: using dport instead of AHB in BT to fix live lock
components/bt: Fix hli queue send error
components/bt: Fix CI fail
# Conflicts:
# components/bt/CMakeLists.txt
# components/bt/component.mk
# components/bt/controller/bt.c
# components/bt/controller/lib
# components/esp_common/src/int_wdt.c
# components/esp_system/port/soc/esp32/dport_panic_highint_hdl.S
# components/soc/esp32/include/soc/soc.h
2021-09-09 11:29:06 +08:00
6c0aebe279
esp_flash: add opi flash support in esp_flash chip driver, for MXIC
2021-09-07 14:44:40 +08:00
ec70bc0523
fix compiler warning with silent panic option
2021-09-04 14:46:26 +10:00
191a494e08
support dcache 64Byte and 16k
2021-09-02 02:27:40 +08:00
f7137254e9
flash_mmap: register flash2spiram info to ROM
2021-09-02 02:27:40 +08:00
a3dc625da6
mspi: support 120MHz Quad Flash and PSRAM on ESP32S3
2021-08-31 16:06:44 +08:00
58aed7df98
ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead
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JIRA IDF-3634
2021-08-26 09:20:00 +02:00
f8f9e545e8
Merge branch 'feature/support_esp32h2_hw_support' into 'master'
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Feature/support esp32h2 hw support
Closes IDF-3378 and IDF-3396
See merge request espressif/esp-idf!14545
2021-08-26 06:00:27 +00:00
11dfd802e0
esp32h2: add rtc clock support
2021-08-26 11:25:39 +08:00
3128a2544b
Adjust the variable name &
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Add mapping support for different sizes of spi ram
2021-08-25 16:06:28 +08:00
6ab495b4dc
esp32h2: chip env support
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brownout init fixed
2021-08-25 11:02:47 +08:00
6e1f8a68b9
Merge branch 'feature/support_esp32s3_wifi_lightsleep' into 'master'
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support esp32s3 wifi lightsleep
Closes IDF-1781
See merge request espressif/esp-idf!14569
2021-08-06 12:51:46 +00:00
d73a09cd8b
light sleep: add wifi mac sleep support for esp32s3
2021-08-04 21:58:33 +08:00
366d0a724a
light sleep: set wifi light sleep clock source to rtc slow clock
2021-08-04 21:31:47 +08:00
1fd56e0b87
Merge branch 'feature/systimer_generate_rtos_tick' into 'master'
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freertos(esp32s3): SysTick uses systimer
Closes IDF-2613
See merge request espressif/esp-idf!12246
2021-08-04 12:33:52 +00:00
29f581fc70
freertos(esp32s3): SysTick uses systimer
2021-08-04 20:33:44 +08:00
03fb3973a2
Merge branch 'feature/support_quad_flash_octal_psram_on_esp32s3' into 'master'
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mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3
Closes IDF-3603
See merge request espressif/esp-idf!14346
2021-08-04 03:57:16 +00:00
0f91a01a46
mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3
2021-08-03 16:54:00 +08:00
4972605b16
esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt
2021-08-03 14:35:29 +08:00
aebdaf08a6
Merge branch 'bugfix/esp32s3_app_core_clock_gate_invalid_issue' into 'master'
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fix app cpu core clock gate invalid issue
Closes WIFI-3899
See merge request espressif/esp-idf!14518
2021-07-31 03:00:58 +00:00
c29b3e2e36
spi_flash: move the unlock patch to bootloader and add support for GD
2021-07-29 10:46:33 +08:00
Jiang Jiang Jian