3b4d27669d
fix(esp_hw_support): fixed modem hang caused by incorrect configuration of power and isolate signals
2024-04-03 10:53:13 +08:00
1bd6dffbef
Merge branch 'bugfix/fix_maximum_value_of_config_rtc_clk_cal_cycles_bug_v5.0' into 'release/v5.0'
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ESP All Chip: fixed the maximum value of config RTC_CLK_CAL_SYCLES bug (v5.0)
See merge request espressif/esp-idf!29650
2024-03-15 11:19:14 +08:00
44815d75eb
fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug
2024-03-14 16:22:39 +08:00
9a3a74463a
fix: fix sleep fast_mem & slow_mem may lost bug
2024-03-14 15:18:57 +08:00
14d7caa921
fix(esp_hw_support): update hmac toggle method due to discrepency in ROM code
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Need to update the HMAC enable/disable method due to discrepancy in ROM code
across different targets for the esp_hmac_disable() API.
2024-03-12 12:24:51 +05:30
4b13be6cf0
Merge branch 'bugfix/update_jtag_disabling_api_v5.0' into 'release/v5.0'
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fix(esp_hw_support): fix API esp_hmac_disable_jtag() to disable JTAG (v5.0)
See merge request espressif/esp-idf!28502
2024-01-24 15:07:27 +08:00
1cd2bb4b22
fix(esp_hw_support): fix API esp_hmac_disable_jtag() to disable JTAG
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After ets_hmac_disable(), invalidating JTAG register process is ineffective.
So, added call to enable hmac begore invalidating JTAG REG.
And similarly disabled it after invalidation.
2024-01-16 14:40:09 +05:30
376be14e1c
fix(rtc): fixed bbpll not calibrated from bootloader issue
2024-01-14 02:38:49 +08:00
d91c6d0da8
fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3)
2024-01-05 03:36:48 +08:00
900ee4e7a6
fix(esp_hw_support): Removed unused include directories from cmake
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* Closes https://github.com/espressif/esp-idf/issues/12700
2023-12-04 14:12:18 +08:00
6ae027eb8b
s2s3 cpu sw freq
2023-09-28 15:02:30 +08:00
652bc76354
fix(lightsleep): fix access pu_cfg after sleep wakeup which is linked to flash
2023-07-31 21:36:27 +08:00
1b04acf68f
Merge branch 'bugfix/fix_chip_broken_bug_in_monitor_mode_c2c3s2s3_to_v5.0' into 'release/v5.0'
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ESP32S2/C3/C2: fixed S2 dangerous power parameters in sleep modes and support S2/C3/C2 different sleep mode(v5.0)
See merge request espressif/esp-idf!23754
2023-06-13 17:50:21 +08:00
d82af7f54a
fix chip broken bug in monitor mode for c2 c3 s2 s3 to v5.0
2023-06-13 10:22:40 +08:00
838850abab
Merge branch 'feature/example_deep_sleep_wake_stub_backport_v5.0' into 'release/v5.0'
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example: add deepsleep_wake stub example (backport v5.0)
See merge request espressif/esp-idf!23414
2023-06-12 11:07:59 +08:00
4261fd0940
rtc_time.c: simplify the rtc_time_get with LL function
2023-05-04 16:46:15 +08:00
08c77a7eaf
sar: init sar periph power state
2023-04-27 10:52:38 +08:00
d84cdace52
sleep: fix sleep current issue caused by sar adc
2023-04-20 11:45:58 +08:00
85980884d7
adc: improve adc power logic
2023-04-20 10:34:37 +08:00
dc172b63d3
Merge branch 'bugfix/close_rf_in_deep_sleep_backport_v5.0' into 'release/v5.0'
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deep sleep: further optimize sleep current if RF is enabled (backport v5.0)
See merge request espressif/esp-idf!22738
2023-03-20 15:48:29 +08:00
135381943a
1.add ldo parameters in efuse table; 2.set ldo based on pvt-efuse; 3.ldo voltage is changed based on cpu freq
2023-03-17 11:14:01 +00:00
568dd3d823
Revert "optimize deep sleep current in wifi softap mode"
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This reverts commit 344ec80fad
2023-03-13 20:49:36 +08:00
833f201610
soc/soc_caps: update soc caps for chips that support power-down of modem hardware
2023-03-13 13:33:18 +08:00
823024c10c
all: Apply new version logic (major * 100 + minor)
2023-01-06 02:00:52 +08:00
634c2c8bf1
esp32s3/memprot: Set permission for Icache region
2022-12-01 09:19:07 +05:30
9fa4bb272e
esp_hw_support/clk_cali: fix xtal32k error detect
2022-09-21 16:21:11 +08:00
5e50ec1d66
systimer: add helper functions to convert between tick and us
2022-07-25 16:08:52 +08:00
0bac33ed41
esp_system: Remove deprecate section from esp_cpu.h
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- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.
2022-07-22 00:06:06 +08:00
6005cc9163
hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces
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This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
2022-07-22 00:06:06 +08:00
0c87ae2a91
System/Security: Memprot API unified (ESP32S3)
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Added missing features and improvements
2022-07-09 22:57:51 +02:00
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
29c0703d7e
Merge branch 'bugfix/esp32s3_memprot_wrong_check_unicore' into 'master'
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System/Security: fix missing checks for CPU-count sensitive Memprot APIs (ESP32S3)
Closes IDF-5401
See merge request espressif/esp-idf!18834
2022-07-04 16:41:45 +08:00
ee9aa9a302
System/Security: fix missing checks for CPU-count sensitive Memprot APIs (ESP32S3)
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Some of the Memory Protection (internal) API functions dealing with per-CPU operations were missing appropriate handling of the CPU count actually configured by CONFIG_FREERTOS_UNICORE. The flaw was fixed across all the places found in the code as the issue was of general type
2022-07-02 20:12:56 +00:00
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
7fd9a91034
dma: move from driver to hw_support
2022-06-28 14:17:12 +08:00
8fae0f0753
G0: Support Xtensa targets for G0-only compilation
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G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
339fcbf14d
System/Security: Memprot API unified (ESP32S3)
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Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
0b80546f8e
Merge branch 'feature/new_esp_psram_component' into 'master'
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esp_psram: new esp psram component
Closes IDF-4318, IDF-4382, IDF-4841, and IDFGH-7192
See merge request espressif/esp-idf!18050
2022-06-15 19:16:56 +08:00
38e5043ae8
esp_psram: new psram component
2022-06-14 15:44:27 +08:00
03477a59db
rtc_clk: Fix rtc8m calibration failure after cpu/core reset
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1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
2022-06-13 17:47:51 +08:00
c8752cee6a
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
44f771c713
psram: support s3 copy flash to psram
2022-06-10 10:39:29 +08:00
6589daabb9
MMU: Add configurable mmu page size support on ESP32C2
2022-06-08 19:34:31 +08:00
d798662421
Merge branch 'bugfix/s3_sleep_voltage' into 'master'
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esp32s3: fixed dangerous power parameters in sleep modes
See merge request espressif/esp-idf!18168
2022-06-04 00:47:32 +08:00
e624206ca6
modify voltage param to fit all mode of S3
2022-06-01 21:03:54 +08:00
ab69df3ea7
esp32s3: fixed dangerous power parameters in sleep modes
2022-06-01 21:03:54 +08:00
ac4c7d99fe
dport: Move DPORT workaround to G0
2022-05-31 13:44:18 +08:00
cf32e49aeb
Merge branch 'refactor/cleanup_rtc_h' into 'master'
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clk_tree: Prework2 of introducing clock subsystem control
Closes IDF-4934
See merge request espressif/esp-idf!17861
2022-05-26 09:16:47 +08:00
729d70129a
clk_tree: add initial docs for clock tree
2022-05-24 22:59:51 +08:00
a5b09cf015
rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in
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soc/clk_tree_defs.h
2022-05-24 22:59:41 +08:00
Li Shuai