esp_system: Remove deprecate section from esp_cpu.h

- Remove esp_cpu_in_ocd_mode() from esp_cpu.h. Users should call esp_cpu_dbgr_is_attached() instead.
- Remove esp_cpu_get_ccount() from esp_cpu.h. Users should call esp_cpu_get_cycle_count() instead.
- Remove esp_cpu_set_ccount() from esp_cpu.h. Users should call esp_cpu_set_cycle_count() instead.
- Other IDF components updated to call esp_cpu_dbgr_is_attached(), esp_cpu_get_cycle_count() and esp_cpu_set_cycle_count() as well.

components/app_trace/port/riscv/port.c

@@ -95,7 +95,7 @@ esp_apptrace_hw_t *esp_apptrace_jtag_hw_get(void **data)
    e.g. OpenOCD flasher stub use own implementation of it. */
 __attribute__((weak)) int esp_apptrace_advertise_ctrl_block(void *ctrl_block_addr)
 {
-    if (!esp_cpu_in_ocd_debug_mode()) {
+    if (!esp_cpu_dbgr_is_attached()) {
         return 0;
     }
     return (int) semihosting_call_noerrno(ESP_SEMIHOSTING_SYS_APPTRACE_INIT, (long*)ctrl_block_addr);

components/bootloader_support/src/esp_image_format.c

@@ -157,7 +157,7 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
     bootloader_sha256_handle_t *p_sha_handle = &sha_handle;
     CHECK_ERR(process_image_header(data, part->offset, (verify_sha) ? p_sha_handle : NULL, do_verify, silent));
     CHECK_ERR(process_segments(data, silent, do_load, sha_handle, checksum));
-    bool skip_check_checksum = !do_verify || esp_cpu_in_ocd_debug_mode();
+    bool skip_check_checksum = !do_verify || esp_cpu_dbgr_is_attached();
     CHECK_ERR(process_checksum(sha_handle, checksum_word, data, silent, skip_check_checksum));
     CHECK_ERR(process_appended_hash(data, part->size, do_verify, silent));
     if (verify_sha) {
@@ -167,7 +167,7 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
         // If secure boot is not enabled in hardware, then
         // skip the signature check in bootloader when the debugger is attached.
         // This is done to allow for breakpoints in Flash.
-        bool do_verify_sig = !esp_cpu_in_ocd_debug_mode();
+        bool do_verify_sig = !esp_cpu_dbgr_is_attached();
 #else // CONFIG_SECURE_BOOT
         bool do_verify_sig = true;
 #endif // end checking for JTAG
@@ -177,7 +177,7 @@ static esp_err_t image_load(esp_image_load_mode_t mode, const esp_partition_pos_
         }
 #else // SECURE_BOOT_CHECK_SIGNATURE
         // No secure boot, but SHA-256 can be appended for basic corruption detection
-        if (sha_handle != NULL && !esp_cpu_in_ocd_debug_mode()) {
+        if (sha_handle != NULL && !esp_cpu_dbgr_is_attached()) {
             err = verify_simple_hash(sha_handle, data);
             sha_handle = NULL; // calling verify_simple_hash finishes sha_handle
         }

components/esp_adc/test_apps/adc/main/test_adc_performance.c

@@ -10,6 +10,7 @@
 #include "test_utils.h"
 #include "esp_log.h"
 #include "esp_err.h"
+#include "esp_cpu.h"
 #include "soc/adc_periph.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -202,8 +203,8 @@ TEST_CASE("ADC1 oneshot raw average / std_deviation", "[adc_oneshot][ignore][man
 #endif
 
 #define RECORD_TIME_PREPARE() uint32_t __t1, __t2
-#define RECORD_TIME_START()             do {__t1 = esp_cpu_get_ccount();}while(0)
-#define RECORD_TIME_END(p_time)         do{__t2 = esp_cpu_get_ccount(); *p_time = (__t2-__t1);}while(0)
+#define RECORD_TIME_START()             do {__t1 = esp_cpu_get_cycle_count();}while(0)
+#define RECORD_TIME_END(p_time)         do{__t2 = esp_cpu_get_cycle_count(); *p_time = (__t2-__t1);}while(0)
 #define GET_US_BY_CCOUNT(t)             ((double)t/CPU_FREQ_MHZ)
 
 

components/esp_hw_support/cpu.c

@@ -452,9 +452,9 @@ void esp_cpu_configure_region_protection(void)
      *  are silently ignored by the CPU
      */
 
-    if (esp_cpu_in_ocd_debug_mode()) {
+    if (esp_cpu_dbgr_is_attached()) {
         // Anti-FI check that cpu is really in ocd mode
-        ESP_FAULT_ASSERT(esp_cpu_in_ocd_debug_mode());
+        ESP_FAULT_ASSERT(esp_cpu_dbgr_is_attached());
 
         // 1. IRAM
         PMP_ENTRY_SET(0, SOC_DIRAM_IRAM_LOW, NONE);

components/esp_hw_support/include/esp_cpu.h

@@ -549,38 +549,6 @@ FORCE_INLINE_ATTR intptr_t esp_cpu_get_call_addr(intptr_t return_address)
  */
 bool esp_cpu_compare_and_set(volatile uint32_t *addr, uint32_t compare_value, uint32_t new_value);
 
-/* ---------------------------------------------------- Deprecate ------------------------------------------------------
- *
- * ------------------------------------------------------------------------------------------------------------------ */
-
-typedef esp_cpu_cycle_count_t           esp_cpu_ccount_t;
-
-FORCE_INLINE_ATTR __attribute__((deprecated)) esp_cpu_cycle_count_t esp_cpu_get_ccount(void)
-{
-    return esp_cpu_get_cycle_count();
-}
-
-FORCE_INLINE_ATTR __attribute__((deprecated)) void esp_cpu_set_ccount(esp_cpu_cycle_count_t ccount)
-{
-    return esp_cpu_set_cycle_count(ccount);
-}
-
-/**
- * @brief Returns true if a JTAG debugger is attached to CPU OCD (on chip debug) port.
- *
- * [refactor-todo]  See if this can be replaced with esp_cpu_dbgr_is_attached directly
- *
- * @note Always returns false if CONFIG_ESP_DEBUG_OCDAWARE is not enabled
- */
-FORCE_INLINE_ATTR bool esp_cpu_in_ocd_debug_mode(void)
-{
-#if CONFIG_ESP_DEBUG_OCDAWARE
-    return esp_cpu_dbgr_is_attached();
-#else  // CONFIG_ESP_DEBUG_OCDAWARE
-    return false; // Always return false if "OCD aware" is disabled
-#endif // CONFIG_ESP_DEBUG_OCDAWARE
-}
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hw_support/include/hal/cpu_ll.h

@@ -32,7 +32,7 @@ FORCE_INLINE_ATTR __attribute__((deprecated)) uint32_t cpu_ll_get_cycle_count(vo
 
 FORCE_INLINE_ATTR __attribute__((deprecated)) void cpu_ll_set_cycle_count(uint32_t val)
 {
-    esp_cpu_set_cycle_count((esp_cpu_ccount_t)val);
+    esp_cpu_set_cycle_count((esp_cpu_cycle_count_t)val);
 }
 
 FORCE_INLINE_ATTR __attribute__((deprecated)) void *cpu_ll_get_sp(void)

components/esp_hw_support/port/esp32c3/esp_memprot.c

@@ -649,8 +649,8 @@ esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config)
     //debugger connected:
     // 1.check the signal repeatedly to avoid possible glitching attempt
     // 2.leave the Memprot unset to allow debug operations
-    if (esp_cpu_in_ocd_debug_mode()) {
-        ESP_FAULT_ASSERT(esp_cpu_in_ocd_debug_mode());
+    if (esp_cpu_dbgr_is_attached()) {
+        ESP_FAULT_ASSERT(esp_cpu_dbgr_is_attached());
         return ESP_OK;
     }
 

components/esp_hw_support/port/esp32s2/memprot.c

@@ -802,8 +802,8 @@ esp_err_t esp_memprot_set_prot(bool invoke_panic_handler, bool lock_feature, uin
     }
 
     //if being debugged check we are not glitched and dont enable Memprot
-    if (esp_cpu_in_ocd_debug_mode()) {
-        ESP_FAULT_ASSERT(esp_cpu_in_ocd_debug_mode());
+    if (esp_cpu_dbgr_is_attached()) {
+        ESP_FAULT_ASSERT(esp_cpu_dbgr_is_attached());
     } else {
         //initialize for specific buses (any memory type does the job)
         if (invoke_panic_handler) {

components/esp_hw_support/port/esp32s3/esp_memprot.c

@@ -875,8 +875,8 @@ esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config)
     // 1.check the signal repeatedly to avoid possible glitching attempt
     // 2.leave the Memprot unset to allow debug operations
 
-    if (esp_cpu_in_ocd_debug_mode()) {
-        ESP_FAULT_ASSERT(esp_cpu_in_ocd_debug_mode());
+    if (esp_cpu_dbgr_is_attached()) {
+        ESP_FAULT_ASSERT(esp_cpu_dbgr_is_attached());
         return ESP_OK;
     }
 

components/esp_system/panic.c

@@ -276,7 +276,7 @@ void esp_panic_handler(panic_info_t *info)
     // If on-chip-debugger is attached, and system is configured to be aware of this,
     // then only print up to details. Users should be able to probe for the other information
     // in debug mode.
-    if (esp_cpu_in_ocd_debug_mode()) {
+    if (esp_cpu_dbgr_is_attached()) {
         panic_print_str("Setting breakpoint at 0x");
         panic_print_hex((uint32_t)info->addr);
         panic_print_str(" and returning...\r\n");

components/esp_system/port/arch/riscv/debug_stubs.c

@@ -18,7 +18,7 @@ const static char *TAG = "esp_dbg_stubs";
 /* Advertises apptrace control block address to host */
 static int esp_dbg_stubs_advertise_table(void *stub_table_addr)
 {
-    if (!esp_cpu_in_ocd_debug_mode()) {
+    if (!esp_cpu_dbgr_is_attached()) {
         return 0;
     }
     return (int) semihosting_call_noerrno(ESP_SEMIHOSTING_SYS_DBG_STUBS_INIT, (long*)stub_table_addr);

components/esp_system/port/panic_handler.c

@@ -163,7 +163,7 @@ static void panic_handler(void *frame, bool pseudo_excause)
 
     esp_ipc_isr_stall_abort();
 
-    if (esp_cpu_in_ocd_debug_mode()) {
+    if (esp_cpu_dbgr_is_attached()) {
 #if __XTENSA__
         if (!(esp_ptr_executable(esp_cpu_pc_to_addr(panic_get_address(frame))) && (panic_get_address(frame) & 0xC0000000U))) {
             /* Xtensa ABI sets the 2 MSBs of the PC according to the windowed call size