Wykres commitów

5 Commity (7d5ae1ee263d654512af2886366cd3a2922a5843)

Autor SHA1 Wiadomość Data
Dmitry 00a7ecb5a3 Code cleanup. Bugfix after rebase with master. Formating. 2021-05-13 15:03:40 +03:00
Dmitry 7bb91f912c gdbstub component 2021-05-11 15:55:39 +03:00
Jeroen Domburg 2c75f63f89 * ets_delay_us(1) has too much overhead; change logic
* Fix MR comments
2021-04-28 16:38:24 +08:00
Angus Gratton 420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
morris e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00