Wykres commitów

28 Commity (4ea182eaa20dccc01e72592a2a506a6a64a521de)

Autor SHA1 Wiadomość Data
Marius Vikhammer 19a2e42770 ci: fix invalid kconfig options in system test apps 2023-05-10 09:42:12 +08:00
Marius Vikhammer 8b0860ef95 ulp-riscv: enable ULP-RISCV ADC example for esp32s2
ADC can now be used from the ULP-RISCV on S2 after the RTC power parameters were
fixed in a624d8d061

Closes https://github.com/espressif/esp-idf/issues/11052
Closes https://github.com/espressif/esp-idf/issues/11040
2023-04-24 10:12:00 +08:00
Sudeep Mohanty 88e4c06028 ulp-riscv-i2c: Updated ULP RISC-V I2C driver to abort when met with errors
The current ULP RISC-V RTC I2C driver got stuck in an infinite loop if
there is a I2C transaction error. This commit amends the driver flow to
abort the read/write operation if met with errors. It also adds a loop
timeout to avoid getting stuck in an infinite loop.The commit also
updates the default bus timing parameters for RTC I2C to be faster.
This commit also adds documentation help to guide users when they meet
with issues while working with the RTC I2C driver on the ULP RISC-V coprocessor.
2023-03-29 13:25:46 +02:00
Sudeep Mohanty 099f648686 ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2
This commit fixes an issue where in the ULP RISC-V I2C example causes
a spurious wakeup of the main CPU because of a Trap signal when the ULP
core does not meet the wakeup threshold values. This was due to the fact
that the RTC_CNTL_COCPU_DONE signal was being set before the
RTC_CNTL_COCPU_SHUT_RESET_EN signal which was causing the the ULP RISC-V
core to not reset properly on each cycle.

Closes https://github.com/espressif/esp-idf/issues/10301
2022-12-27 07:44:26 +00:00
Marius Vikhammer 55879e36ab system: fix printf format errors in all system and cxx examples 2022-12-12 12:55:02 +08:00
Marius Vikhammer 77ba84eeb7 ulp-fsm: Update ulp-fsm ADC example with S3 support
Closes https://github.com/espressif/esp-idf/issues/7963
2022-09-07 16:48:06 +08:00
Sudeep Mohanty 4fde033a5f ulp: Added support for RTC I2C driver for ULP RISC-V on esp32s2 and esp32s3
This commit adds support for using the RTC I2C peripheral on the ULP
RISC-V core for esp32s2 and esp32s3. It also adds an example to demonstrate the
usage of the RTC I2C peripheral.

This commit also modifies the rtc_i2c register structure files to enable
the use of bitfields in the ULP RISC-V RTC I2C driver.
2022-09-05 10:21:43 +02:00
Ivan Grokhotkov e596c84d49 build system: re-add -Wno-format as private flag for some example components 2022-08-03 16:42:47 +04:00
Marius Vikhammer 32efa1e92d Add ULP-RISCV print and bitbanged UART tx API
Add example to demonstrate the use of this API.
2022-07-29 12:18:01 +08:00
Armando (Dou Yiwen) 9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Marius Vikhammer e4cbaa6f2b ci: remove temp deepsleep tag runner 2022-07-19 12:12:46 +08:00
Armando 5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
Marius Vikhammer e8b5096f52 ulp-riscv: add support for using ADC as well as an example show-casing it. 2022-07-11 09:31:22 +08:00
Marius Vikhammer 6e79cc69f9 re-enable riscv ulp gpio support and examples
Closes https://github.com/espressif/esp-idf/issues/8691
Closes https://github.com/espressif/esp-idf/issues/9094
2022-06-08 17:59:28 +08:00
Djordje Nedic facab8c5a7 tools: Increase the minimal supported CMake version to 3.16
This updates the minimal supported version of CMake to 3.16, which in turn enables us to use more CMake features and have a cleaner build system.
This is the version that provides most new features and also the one we use in our latest docker image for CI.
2022-06-01 06:35:02 +00:00
Marius Vikhammer 9918bbeb63 CI: migrated system example tests to pytest-embedded framework 2022-03-14 16:32:44 +08:00
Marius Vikhammer 8901941064 ulp: add driver dependecy for ULP riscv gpio interrupt example 2022-03-03 11:17:34 +08:00
Marius Vikhammer c974a000d7 ULP: Add example of using GPIO to wakeup the ULP-RISCV processor 2022-02-28 14:15:25 +08:00
Sudeep Mohanty 2fc9bd61bf ulp: refactor ulp component
This commit refactors the ulp component.
Files are now divided based on type of ulp, viz., fsm or risc-v.
Files common to both are maintained in the ulp_common folder.

This commit also adds menuconfig options for ULP within the ulp
component instead of presenting target specific configuations for ulp.
2022-01-27 11:54:42 +05:30
Marius Vikhammer ff6f927b5f ULP: add functions for stopping/restarting the ulp-riscv
Closes https://github.com/espressif/esp-idf/issues/8232
2022-01-20 11:34:53 +08:00
Sudeep Mohanty 2ed15d8b1e ulp: Added ULP RISC-V support for esp32s3
This commit adds support for ULP RISC-V for esp32s3.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2022-01-18 10:58:00 +05:30
Jakob Hasse 81e9266204 [examples]: removed hyphens
Replaced hyphens with underscores in examples
project definition for all examples which had
hyphens in their project name. dpp-enrollee is
an exceptions because the name matches the
project directory name while the project
directory also contains hyphens.
2021-10-09 13:58:24 +08:00
Marius Vikhammer 386739595f RISCV-ULP: Add DS18B20 1wire RISCV-ULP example 2021-06-25 11:26:39 +08:00
Renz Bagaporo 754c8fcaa5 ci: modify ulp_riscv example to detect unintended wake 2021-03-31 17:15:55 +08:00
Renz Bagaporo e5b3824f61 ci: add example test for ulp_riscv example 2021-02-26 13:34:09 +08:00
Angus Gratton 66d2c9196f example ulp_riscv: Set IDF_TARGET to esp32s2 2020-12-24 14:18:02 +11:00
Angus Gratton 66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Felipe Neves b6dba84323 ulp: added support to building code for riscv ULP coprocessor 2020-07-15 15:28:49 -03:00