kopia lustrzana https://github.com/espressif/esp-idf
ulp-riscv: enable ULP-RISCV ADC example for esp32s2
ADC can now be used from the ULP-RISCV on S2 after the RTC power parameters were
fixed in a624d8d061
Closes https://github.com/espressif/esp-idf/issues/11052
Closes https://github.com/espressif/esp-idf/issues/11040
pull/11519/head
rodzic
a6b1ebce31
commit
8b0860ef95
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@ -197,7 +197,7 @@ examples/system/ulp_fsm/ulp_adc:
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examples/system/ulp_riscv/adc:
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enable:
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- if: IDF_TARGET in ["esp32s3"]
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- if: IDF_TARGET in ["esp32s2", "esp32s3"]
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temporary: true
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reason: the other targets are not tested yet
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@ -1,5 +1,5 @@
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| Supported Targets | ESP32-S3 |
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| ----------------- | -------- |
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| Supported Targets | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- |
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# ULP-RISC-V ADC Example
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