kopia lustrzana https://github.com/espressif/esp-idf
refactor(hal/usb_dwc): Add DWC OTG configuration values
This commit adds a subset of the DWC OTG configuration values to the 'usb_dwc_ll.h' file. Only relevant configuration values have been added. Some DWC OTG releated constants have also been moved from 'usb_dwc_hal.h' to 'usb_dwc_ll.h' and renamed.release/v5.0
Darian Leung
Peter Marcisovsky
rodzic
ec2ba71f97
commit
ce351790a8
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -22,15 +22,11 @@ NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
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#include "hal/usb_types_private.h"
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#include "hal/assert.h"
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#if SOC_USB_OTG_SUPPORTED
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// ------------------------------------------------ Macros and Types ---------------------------------------------------
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// ------------------ Constants/Configs --------------------
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#define USB_DWC_HAL_DMA_MEM_ALIGN 512
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#define USB_DWC_HAL_FRAME_LIST_MEM_ALIGN 512 //The frame list needs to be 512 bytes aligned (contrary to the databook)
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#define USB_DWC_HAL_NUM_CHAN 8
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#define USB_DWC_HAL_XFER_DESC_SIZE (sizeof(usb_dwc_ll_dma_qtd_t))
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#define USB_DWC_HAL_FIFO_TOTAL_USABLE_LINES 200 //Although we have a 256 lines, only 200 lines are usuable due to EPINFO_CTL
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// ----------------------- Configs -------------------------
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/**
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* @brief FIFO size configuration structure
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@ -168,7 +164,7 @@ typedef struct {
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struct {
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int num_allocd; /**< Number of channels currently allocated */
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uint32_t chan_pend_intrs_msk; /**< Bit mask of channels with pending interrupts */
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usb_dwc_hal_chan_t *hdls[USB_DWC_HAL_NUM_CHAN]; /**< Handles of each channel. Set to NULL if channel has not been allocated */
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usb_dwc_hal_chan_t *hdls[USB_DWC_NUM_HOST_CHAN]; /**< Handles of each channel. Set to NULL if channel has not been allocated */
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} channels;
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} usb_dwc_hal_context_t;
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@ -229,7 +225,7 @@ void usb_dwc_hal_core_soft_reset(usb_dwc_hal_context_t *hal);
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* may be situations where this function may need to be called again to resize the FIFOs. If resizing FIFOs dynamically,
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* it is the user's responsibility to ensure there are no active channels when this function is called.
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*
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* @note The totol size of all the FIFOs must be less than or equal to USB_DWC_HAL_FIFO_TOTAL_USABLE_LINES
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* @note The totol size of all the FIFOs must be less than or equal to USB_DWC_FIFO_TOTAL_USABLE_LINES
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* @note After a port reset, the FIFO size registers will reset to their default values, so this function must be called
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* again post reset.
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*
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@ -785,6 +781,8 @@ usb_dwc_hal_chan_t *usb_dwc_hal_get_chan_pending_intr(usb_dwc_hal_context_t *hal
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*/
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usb_dwc_hal_chan_event_t usb_dwc_hal_chan_decode_intr(usb_dwc_hal_chan_t *chan_obj);
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#endif // SOC_USB_OTG_SUPPORTED
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#ifdef __cplusplus
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}
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#endif
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -17,6 +17,34 @@ extern "C" {
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#include "hal/misc.h"
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/* -----------------------------------------------------------------------------
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--------------------------------- DWC Constants --------------------------------
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----------------------------------------------------------------------------- */
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#define USB_DWC_QTD_LIST_MEM_ALIGN 512
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#define USB_DWC_FRAME_LIST_MEM_ALIGN 512 // The frame list needs to be 512 bytes aligned (contrary to the databook)
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/*
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Although we have a 256 lines, only 200 lines are useable due to EPINFO_CTL.
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Todo: Check sizes again and express this macro in terms of DWC config options (IDF-7384)
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*/
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#define USB_DWC_FIFO_TOTAL_USABLE_LINES 200
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/* -----------------------------------------------------------------------------
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------------------------------ DWC Configuration -------------------------------
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----------------------------------------------------------------------------- */
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/*
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* List of relevant DWC configurations. See DWC OTG databook Chapter 3 for more
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* details.
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*/
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#define USB_DWC_FSPHY_INTERFACE 1
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#define USB_DWC_NUM_EPS 6
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#define USB_DWC_NUM_IN_EPS 5 // Todo: Add check for when number of IN channels exceeds limit (IDF-8556)
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#define USB_DWC_NUM_HOST_CHAN 8
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#define USB_DWC_DFIFO_DEPTH 256
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#define USB_DWC_RX_DFIFO_DEPTH 256
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#define USB_DWC_TX_DFIFO_DEPTH 256 // Same value applies to HNPERIO, NPERIO, HPERIO, and DINEP
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/* -----------------------------------------------------------------------------
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------------------------------- Global Registers -------------------------------
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----------------------------------------------------------------------------- */
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@ -159,14 +159,14 @@ void usb_dwc_hal_core_soft_reset(usb_dwc_hal_context_t *hal)
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hal->flags.val = 0;
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hal->channels.num_allocd = 0;
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hal->channels.chan_pend_intrs_msk = 0;
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memset(hal->channels.hdls, 0, sizeof(usb_dwc_hal_chan_t *) * USB_DWC_HAL_NUM_CHAN);
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memset(hal->channels.hdls, 0, sizeof(usb_dwc_hal_chan_t *) * USB_DWC_NUM_HOST_CHAN);
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}
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void usb_dwc_hal_set_fifo_size(usb_dwc_hal_context_t *hal, const usb_dwc_hal_fifo_config_t *fifo_config)
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{
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HAL_ASSERT((fifo_config->rx_fifo_lines + fifo_config->nptx_fifo_lines + fifo_config->ptx_fifo_lines) <= USB_DWC_HAL_FIFO_TOTAL_USABLE_LINES);
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HAL_ASSERT((fifo_config->rx_fifo_lines + fifo_config->nptx_fifo_lines + fifo_config->ptx_fifo_lines) <= USB_DWC_FIFO_TOTAL_USABLE_LINES);
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//Check that none of the channels are active
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for (int i = 0; i < USB_DWC_HAL_NUM_CHAN; i++) {
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for (int i = 0; i < USB_DWC_NUM_HOST_CHAN; i++) {
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if (hal->channels.hdls[i] != NULL) {
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HAL_ASSERT(!hal->channels.hdls[i]->flags.active);
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}
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@ -208,11 +208,11 @@ bool usb_dwc_hal_chan_alloc(usb_dwc_hal_context_t *hal, usb_dwc_hal_chan_t *chan
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{
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HAL_ASSERT(hal->flags.fifo_sizes_set); //FIFO sizes should be set befor attempting to allocate a channel
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//Attempt to allocate channel
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if (hal->channels.num_allocd == USB_DWC_HAL_NUM_CHAN) {
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if (hal->channels.num_allocd == USB_DWC_NUM_HOST_CHAN) {
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return false; //Out of free channels
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}
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int chan_idx = -1;
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for (int i = 0; i < USB_DWC_HAL_NUM_CHAN; i++) {
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for (int i = 0; i < USB_DWC_NUM_HOST_CHAN; i++) {
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if (hal->channels.hdls[i] == NULL) {
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hal->channels.hdls[i] = chan_obj;
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chan_idx = i;
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@ -53,7 +53,7 @@ typedef struct {
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*
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* RXFIFO
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* - Recommended: ((LPS/4) * 2) + 2
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* - Actual: Whatever leftover size: USB_DWC_HAL_FIFO_TOTAL_USABLE_LINES(200) - 48 - 48 = 104
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* - Actual: Whatever leftover size: USB_DWC_FIFO_TOTAL_USABLE_LINES(200) - 48 - 48 = 104
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* - Worst case can accommodate two packets of 204 bytes, or one packet of 408
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* NPTXFIFO
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* - Recommended: (LPS/4) * 2
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@ -81,7 +81,7 @@ const fifo_mps_limits_t mps_limits_default = {
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*
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* RXFIFO
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* - Recommended: ((LPS/4) * 2) + 2
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* - Actual: Whatever leftover size: USB_DWC_HAL_FIFO_TOTAL_USABLE_LINES(200) - 32 - 16 = 152
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* - Actual: Whatever leftover size: USB_DWC_FIFO_TOTAL_USABLE_LINES(200) - 32 - 16 = 152
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* - Worst case can accommodate two packets of 300 bytes or one packet of 600 bytes
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* NPTXFIFO
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* - Recommended: (LPS/4) * 2
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@ -117,7 +117,7 @@ const fifo_mps_limits_t mps_limits_bias_rx = {
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* - Worst case can accommodate one packet of 64 bytes
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* PTXFIFO
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* - Recommended: (LPS/4) * 2
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* - Actual: Whatever leftover size: USB_DWC_HAL_FIFO_TOTAL_USABLE_LINES(200) - 34 - 16 = 150
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* - Actual: Whatever leftover size: USB_DWC_FIFO_TOTAL_USABLE_LINES(200) - 34 - 16 = 150
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* - Worst case can accommodate two packets of 300 bytes or one packet of 600 bytes
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*/
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const usb_dwc_hal_fifo_config_t fifo_config_bias_ptx = {
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@ -963,7 +963,7 @@ static port_t *port_obj_alloc(void)
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{
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port_t *port = calloc(1, sizeof(port_t));
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usb_dwc_hal_context_t *hal = malloc(sizeof(usb_dwc_hal_context_t));
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void *frame_list = heap_caps_aligned_calloc(USB_DWC_HAL_FRAME_LIST_MEM_ALIGN, FRAME_LIST_LEN, sizeof(uint32_t), MALLOC_CAP_DMA);
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void *frame_list = heap_caps_aligned_calloc(USB_DWC_FRAME_LIST_MEM_ALIGN, FRAME_LIST_LEN, sizeof(uint32_t), MALLOC_CAP_DMA);
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SemaphoreHandle_t port_mux = xSemaphoreCreateMutex();
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if (port == NULL || hal == NULL || frame_list == NULL || port_mux == NULL) {
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free(port);
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@ -1594,7 +1594,7 @@ static dma_buffer_block_t *buffer_block_alloc(usb_transfer_type_t type)
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break;
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}
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dma_buffer_block_t *buffer = calloc(1, sizeof(dma_buffer_block_t));
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void *xfer_desc_list = heap_caps_aligned_calloc(USB_DWC_HAL_DMA_MEM_ALIGN, desc_list_len, sizeof(usb_dwc_ll_dma_qtd_t), MALLOC_CAP_DMA);
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void *xfer_desc_list = heap_caps_aligned_calloc(USB_DWC_QTD_LIST_MEM_ALIGN, desc_list_len, sizeof(usb_dwc_ll_dma_qtd_t), MALLOC_CAP_DMA);
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if (buffer == NULL || xfer_desc_list == NULL) {
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free(buffer);
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heap_caps_free(xfer_desc_list);
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