kopia lustrzana https://github.com/espressif/esp-idf
esp32h4: checked all the corner stuffs of the removal
rodzic
954a6a2cff
commit
87328d594f
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@ -334,7 +334,7 @@ typedef enum {
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/**
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* @brief Revokes the old signature digest. To be called in the application after the rollback logic.
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*
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* Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
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* Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-C6, ESP32-H2 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
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* When key \#N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key \#N-1 & Key \#N.
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* After successfully booting the OTA app should call this function to revoke Key \#N-1.
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*
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@ -17,6 +17,7 @@ typedef enum {
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ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
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ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
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ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
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ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */
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ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */
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ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
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} __attribute__((packed)) esp_chip_id_t;
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@ -33,7 +33,6 @@
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#endif
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// H2 and C2 will not support external flash.
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#define TEST_FLASH_FREQ_MHZ 5
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typedef struct {
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@ -279,7 +279,7 @@ menu "ESP System Settings"
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config ESP_CONSOLE_MULTIPLE_UART
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bool
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default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2
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default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6
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choice ESP_CONSOLE_UART_NUM
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prompt "UART peripheral to use for console output (0-1)"
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@ -29,7 +29,7 @@
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#define REASON_FREQ_SWITCH BIT(1)
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#define REASON_GDB_CALL BIT(3)
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#if !CONFIG_IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6
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#if CONFIG_IDF_TARGET_ARCH_XTENSA
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#define REASON_PRINT_BACKTRACE BIT(2)
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#define REASON_TWDT_ABORT BIT(4)
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#endif
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@ -66,7 +66,7 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) {
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} else {
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, 0);
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}
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#elif CONFIG_IDF_TARGET_ESP32C3|| CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
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#elif CONFIG_IDF_TARGET_ARCH_RISCV
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0);
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#endif
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@ -147,7 +147,7 @@ static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask)
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} else {
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, SYSTEM_CPU_INTR_FROM_CPU_1);
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}
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
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#elif CONFIG_IDF_TARGET_ARCH_RISCV
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WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0);
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#endif
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}
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@ -167,7 +167,7 @@ void IRAM_ATTR esp_crosscore_int_send_gdb_call(int core_id)
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esp_crosscore_int_send(core_id, REASON_GDB_CALL);
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}
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#if !CONFIG_IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2
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#if CONFIG_IDF_TARGET_ARCH_XTENSA
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void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id)
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{
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esp_crosscore_int_send(core_id, REASON_PRINT_BACKTRACE);
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@ -43,7 +43,7 @@
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#define BROWNOUT "BROWN_OUT_RST"
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#define STORE_ERROR "StoreProhibited"
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
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#define DEEPSLEEP "DSLEEP"
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#define LOAD_STORE_ERROR "Store access fault"
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#define RESET "RTC_SW_CPU_RST"
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@ -1,5 +1,7 @@
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menu "Wi-Fi"
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# TODO: Disable WIFI support on ESP32-H2 (WIFI-5796)
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# visible if SOC_WIFI_SUPPORTED
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config ESP_WIFI_ENABLED
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bool
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@ -366,7 +366,7 @@ menu "FreeRTOS"
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config FREERTOS_TICK_SUPPORT_SYSTIMER
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bool
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default y if !FREERTOS_TICK_SUPPORT_CORETIMER
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# ESP32-S3 and ESP32-C3 can use Systimer for FreeRTOS SysTick
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# All targets except ESP32 and ESP32S2 can use Systimer for FreeRTOS SysTick
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# ESP32S2 also has SYSTIMER but it can not be used for the FreeRTOS SysTick because:
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# - It has only one counter, which already in use esp_timer.
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# A counter for SysTick should be stall in debug mode but work esp_timer.
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@ -13,18 +13,7 @@ if(CONFIG_IEEE802154_ENABLED)
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${ieee802154_lib}>
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$<TARGET_FILE:${esp_phy_lib}> libphy.a libbtbb.a $<TARGET_FILE:${esp_phy_lib}>)
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else()
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if(IDF_TARGET STREQUAL "esp32h4")
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if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1)
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target_link_libraries(${COMPONENT_LIB} INTERFACE
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"-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev1")
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endif()
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if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2)
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target_link_libraries(${COMPONENT_LIB} INTERFACE
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"-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev2")
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endif()
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else()
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target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}")
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endif()
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target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}")
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> lib802154.a libphy.a libbtbb.a
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$<TARGET_FILE:${esp_phy_lib}> $<TARGET_FILE:${esp_system_lib}>)
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endif()
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@ -11,12 +11,12 @@ OpenThread can run under the following modes on Espressif chips:
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Standalone node
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+++++++++++++++
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The full OpenThread stack and the application layer runs on the same chip. This mode is available on chips with 15.4 radio such as ESP32-H2.
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The full OpenThread stack and the application layer runs on the same chip. This mode is available on chips with 15.4 radio such as {IDF_TARGET}.
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Radio Co-Processor (RCP)
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++++++++++++++++++++++++
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The chip will be connected to another host running the OpenThread IP stack. It will send and received 15.4 packets on behalf of the host. This mode is available on chips with 15.4 radio such as ESP32-H2. The underlying transport between the chip and the host can be SPI or UART. For sake of latency, we recommend to use SPI as the underlying transport.
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The chip will be connected to another host running the OpenThread IP stack. It will send and received 15.4 packets on behalf of the host. This mode is available on chips with 15.4 radio such as {IDF_TARGET}. The underlying transport between the chip and the host can be SPI or UART. For sake of latency, we recommend to use SPI as the underlying transport.
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OpenThread host
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+++++++++++++++
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@ -201,7 +201,7 @@ The source clock can also limit the PWM frequency. The higher the source clock f
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.. only:: not SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
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1. For {IDF_TARGET_NAME}, all timers share one clock source. In other words, it is impossible to use different clock sources for different timers.
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2. For {IDF_TARGET_NAME}, all timers share one clock source. In other words, it is impossible to use different clock sources for different timers.
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.. _ledc-api-configure-channel:
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@ -200,7 +200,7 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比,实
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.. only:: not SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
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1. {IDF_TARGET_NAME} 的所有定时器共用一个时钟源。因此 {IDF_TARGET_NAME} 不支持给不同的定时器配置不同的时钟源。
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2. {IDF_TARGET_NAME} 的所有定时器共用一个时钟源。因此 {IDF_TARGET_NAME} 不支持给不同的定时器配置不同的时钟源。
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.. _ledc-api-configure-channel:
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@ -26,7 +26,7 @@ please set: `idf.py menuconfig --> Component config --> Example 'GATT CLIENT THR
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### Hardware Required
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* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.)
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* A development board with supported SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.)
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* A USB cable for Power supply and programming
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See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it.
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@ -142,6 +142,7 @@ menu "Example Ethernet Configuration"
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default 14 if IDF_TARGET_ESP32
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default 12 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 6 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 4 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI SCLK.
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@ -151,6 +152,7 @@ menu "Example Ethernet Configuration"
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default 13 if IDF_TARGET_ESP32
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default 11 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 7 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 5 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI MOSI.
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default 12 if IDF_TARGET_ESP32
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default 13 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 2 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 0 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI MISO.
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config EXAMPLE_ETH_SPI_CLOCK_MHZ
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int "SPI clock speed (MHz)"
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range 5 80
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default 12 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 12 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2
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default 36 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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help
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Set the clock speed (MHz) of SPI interface.
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range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX
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default 15 if IDF_TARGET_ESP32
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default 10 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2
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default 1 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI CS0, i.e. Chip Select associated with the first SPI Eth module).
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@ -187,6 +191,7 @@ menu "Example Ethernet Configuration"
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default 7 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 8 if IDF_TARGET_ESP32C3
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default 3 if IDF_TARGET_ESP32C2
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default 11 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI CS1, i.e. Chip Select associated with the second SPI Eth module.
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@ -195,6 +200,7 @@ menu "Example Ethernet Configuration"
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range ENV_GPIO_RANGE_MIN ENV_GPIO_IN_RANGE_MAX
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default 4 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
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default 4 if IDF_TARGET_ESP32C2
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default 9 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by the first SPI Ethernet module interrupt line.
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@ -204,6 +210,7 @@ menu "Example Ethernet Configuration"
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range ENV_GPIO_RANGE_MIN ENV_GPIO_IN_RANGE_MAX
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default 33 if IDF_TARGET_ESP32
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default 5 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2
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default 10 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by the second SPI Ethernet module interrupt line.
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@ -15,6 +15,7 @@ menu "Example Configuration"
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default 14 if IDF_TARGET_ESP32
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default 12 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 6 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 4 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI SCLK.
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@ -24,6 +25,7 @@ menu "Example Configuration"
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default 13 if IDF_TARGET_ESP32
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default 11 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 7 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 5 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI MOSI.
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@ -33,6 +35,7 @@ menu "Example Configuration"
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default 12 if IDF_TARGET_ESP32
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default 13 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
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default 2 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 0 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI MISO.
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@ -41,6 +44,7 @@ menu "Example Configuration"
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range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX
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default 15 if IDF_TARGET_ESP32
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default 10 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2
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default 1 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by SPI CS.
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@ -56,6 +60,7 @@ menu "Example Configuration"
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range ENV_GPIO_RANGE_MIN ENV_GPIO_IN_RANGE_MAX
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default 4 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
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default 4 if IDF_TARGET_ESP32C2
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default 9 if IDF_TARGET_ESP32H2
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help
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Set the GPIO number used by ENC28J60 interrupt.
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@ -26,12 +26,12 @@
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#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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#define I2C_SCL_IO (GPIO_NUM_16)
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#define I2C_SDA_IO (GPIO_NUM_17)
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#elif CONFIG_IDF_TARGET_ESP32C3
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#define I2C_SCL_IO (GPIO_NUM_6)
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#define I2C_SDA_IO (GPIO_NUM_7)
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#elif CONFIG_IDF_TARGET_ESP32H2
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#define I2C_SCL_IO (GPIO_NUM_8)
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#define I2C_SDA_IO (GPIO_NUM_9)
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#else
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#define I2C_SCL_IO (GPIO_NUM_6)
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#define I2C_SDA_IO (GPIO_NUM_7)
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#endif
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/* I2S port and GPIOs */
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@ -87,8 +87,8 @@ static int get_version(int argc, char **argv)
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case CHIP_ESP32C3:
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model = "ESP32-C3";
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break;
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case CHIP_ESP32H4:
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model = "ESP32-H4";
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case CHIP_ESP32H2:
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model = "ESP32-H2";
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break;
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case CHIP_ESP32C2:
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model = "ESP32-C2";
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@ -60,9 +60,11 @@ menu "Example Configuration"
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config EXAMPLE_GPIO_WAKEUP_PIN
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int "Enable wakeup from GPIO"
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default 0
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default 0 if !IDF_TARGET_ESP32H2
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default 7 if IDF_TARGET_ESP32H2
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range 0 7 if IDF_TARGET_ESP32C6
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range 0 5
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range 7 14 if IDF_TARGET_ESP32H2
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range 0 5 if !IDF_TARGET_ESP32C6 && !IDF_TARGET_ESP32H2
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config EXAMPLE_GPIO_WAKEUP_HIGH_LEVEL
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bool "Enable GPIO high-level wakeup"
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@ -5,7 +5,7 @@ menu "Example Configuration"
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config BLINK_GPIO
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int "Blink GPIO number"
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range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX
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default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2
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default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32H2 || IDF_TARGET_ESP32C2
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default 18 if IDF_TARGET_ESP32S2
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default 48 if IDF_TARGET_ESP32S3
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default 5
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@ -12,7 +12,7 @@
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/* Most development boards have "boot" button attached to GPIO0.
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* You can also change this to another pin.
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*/
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 \
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 \
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|| CONFIG_IDF_TARGET_ESP32C6
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#define BOOT_BUTTON_NUM 9
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#else
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@ -32,7 +32,6 @@ USUAL_TO_FORMAL = {
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'esp32c2': 'ESP32-C2',
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'esp32c6': 'ESP32-C6',
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'esp32h2': 'ESP32-H2',
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'esp32h4': 'ESP32-H4',
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'linux': 'Linux',
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}
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@ -44,7 +43,6 @@ FORMAL_TO_USUAL = {
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'ESP32-C2': 'esp32c2',
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'ESP32-C6': 'esp32c6',
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'ESP32-H2': 'esp32h2',
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'ESP32-H4': 'esp32h4',
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'Linux': 'linux',
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}
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