diff --git a/components/app_update/include/esp_ota_ops.h b/components/app_update/include/esp_ota_ops.h index 86f7ceca02..1364b543a8 100644 --- a/components/app_update/include/esp_ota_ops.h +++ b/components/app_update/include/esp_ota_ops.h @@ -334,7 +334,7 @@ typedef enum { /** * @brief Revokes the old signature digest. To be called in the application after the rollback logic. * - * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1). + * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-C6, ESP32-H2 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1). * When key \#N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key \#N-1 & Key \#N. * After successfully booting the OTA app should call this function to revoke Key \#N-1. * diff --git a/components/bootloader_support/include/esp_app_format.h b/components/bootloader_support/include/esp_app_format.h index 242d243cf1..14c3917181 100644 --- a/components/bootloader_support/include/esp_app_format.h +++ b/components/bootloader_support/include/esp_app_format.h @@ -17,6 +17,7 @@ typedef enum { ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */ ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */ ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */ + ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */ ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */ ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */ } __attribute__((packed)) esp_chip_id_t; diff --git a/components/driver/test_apps/spi/master/main/test_spi_bus_lock.c b/components/driver/test_apps/spi/master/main/test_spi_bus_lock.c index ba3f5bfc1c..3a513cc7e4 100644 --- a/components/driver/test_apps/spi/master/main/test_spi_bus_lock.c +++ b/components/driver/test_apps/spi/master/main/test_spi_bus_lock.c @@ -33,7 +33,6 @@ #endif -// H2 and C2 will not support external flash. #define TEST_FLASH_FREQ_MHZ 5 typedef struct { diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 3205775cbd..3006f40b60 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -279,7 +279,7 @@ menu "ESP System Settings" config ESP_CONSOLE_MULTIPLE_UART bool - default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2 + default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 choice ESP_CONSOLE_UART_NUM prompt "UART peripheral to use for console output (0-1)" diff --git a/components/esp_system/crosscore_int.c b/components/esp_system/crosscore_int.c index d9102a16ed..03e0fa650f 100644 --- a/components/esp_system/crosscore_int.c +++ b/components/esp_system/crosscore_int.c @@ -29,7 +29,7 @@ #define REASON_FREQ_SWITCH BIT(1) #define REASON_GDB_CALL BIT(3) -#if !CONFIG_IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 +#if CONFIG_IDF_TARGET_ARCH_XTENSA #define REASON_PRINT_BACKTRACE BIT(2) #define REASON_TWDT_ABORT BIT(4) #endif @@ -66,7 +66,7 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) { } else { WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, 0); } -#elif CONFIG_IDF_TARGET_ESP32C3|| CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ARCH_RISCV WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); #endif @@ -147,7 +147,7 @@ static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) } else { WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, SYSTEM_CPU_INTR_FROM_CPU_1); } -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ARCH_RISCV WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0); #endif } @@ -167,7 +167,7 @@ void IRAM_ATTR esp_crosscore_int_send_gdb_call(int core_id) esp_crosscore_int_send(core_id, REASON_GDB_CALL); } -#if !CONFIG_IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2 +#if CONFIG_IDF_TARGET_ARCH_XTENSA void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id) { esp_crosscore_int_send(core_id, REASON_PRINT_BACKTRACE); diff --git a/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c b/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c index e28134f7c8..f040254069 100644 --- a/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c +++ b/components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c @@ -43,7 +43,7 @@ #define BROWNOUT "BROWN_OUT_RST" #define STORE_ERROR "StoreProhibited" -#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 #define DEEPSLEEP "DSLEEP" #define LOAD_STORE_ERROR "Store access fault" #define RESET "RTC_SW_CPU_RST" diff --git a/components/esp_wifi/Kconfig b/components/esp_wifi/Kconfig index 7e528b4ed0..bc42da9f2d 100644 --- a/components/esp_wifi/Kconfig +++ b/components/esp_wifi/Kconfig @@ -1,5 +1,7 @@ menu "Wi-Fi" + # TODO: Disable WIFI support on ESP32-H2 (WIFI-5796) + # visible if SOC_WIFI_SUPPORTED config ESP_WIFI_ENABLED bool diff --git a/components/freertos/Kconfig b/components/freertos/Kconfig index 632bb4321a..6c915d3d65 100644 --- a/components/freertos/Kconfig +++ b/components/freertos/Kconfig @@ -366,7 +366,7 @@ menu "FreeRTOS" config FREERTOS_TICK_SUPPORT_SYSTIMER bool default y if !FREERTOS_TICK_SUPPORT_CORETIMER - # ESP32-S3 and ESP32-C3 can use Systimer for FreeRTOS SysTick + # All targets except ESP32 and ESP32S2 can use Systimer for FreeRTOS SysTick # ESP32S2 also has SYSTIMER but it can not be used for the FreeRTOS SysTick because: # - It has only one counter, which already in use esp_timer. # A counter for SysTick should be stall in debug mode but work esp_timer. diff --git a/components/ieee802154/CMakeLists.txt b/components/ieee802154/CMakeLists.txt index 4826838b6e..55a1ec7b09 100644 --- a/components/ieee802154/CMakeLists.txt +++ b/components/ieee802154/CMakeLists.txt @@ -13,18 +13,7 @@ if(CONFIG_IEEE802154_ENABLED) target_link_libraries(${COMPONENT_LIB} INTERFACE $ $ libphy.a libbtbb.a $) else() - if(IDF_TARGET STREQUAL "esp32h4") - if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1) - target_link_libraries(${COMPONENT_LIB} INTERFACE - "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev1") - endif() - if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2) - target_link_libraries(${COMPONENT_LIB} INTERFACE - "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev2") - endif() - else() - target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}") - endif() + target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}") target_link_libraries(${COMPONENT_LIB} INTERFACE $ lib802154.a libphy.a libbtbb.a $ $) endif() diff --git a/docs/en/api-guides/openthread.rst b/docs/en/api-guides/openthread.rst index 4b0d5b354c..ceb12fc463 100644 --- a/docs/en/api-guides/openthread.rst +++ b/docs/en/api-guides/openthread.rst @@ -11,12 +11,12 @@ OpenThread can run under the following modes on Espressif chips: Standalone node +++++++++++++++ -The full OpenThread stack and the application layer runs on the same chip. This mode is available on chips with 15.4 radio such as ESP32-H2. +The full OpenThread stack and the application layer runs on the same chip. This mode is available on chips with 15.4 radio such as {IDF_TARGET}. Radio Co-Processor (RCP) ++++++++++++++++++++++++ -The chip will be connected to another host running the OpenThread IP stack. It will send and received 15.4 packets on behalf of the host. This mode is available on chips with 15.4 radio such as ESP32-H2. The underlying transport between the chip and the host can be SPI or UART. For sake of latency, we recommend to use SPI as the underlying transport. +The chip will be connected to another host running the OpenThread IP stack. It will send and received 15.4 packets on behalf of the host. This mode is available on chips with 15.4 radio such as {IDF_TARGET}. The underlying transport between the chip and the host can be SPI or UART. For sake of latency, we recommend to use SPI as the underlying transport. OpenThread host +++++++++++++++ diff --git a/docs/en/api-reference/peripherals/ledc.rst b/docs/en/api-reference/peripherals/ledc.rst index fcfcd9a41f..2671ad2e8c 100644 --- a/docs/en/api-reference/peripherals/ledc.rst +++ b/docs/en/api-reference/peripherals/ledc.rst @@ -201,7 +201,7 @@ The source clock can also limit the PWM frequency. The higher the source clock f .. only:: not SOC_LEDC_HAS_TIMER_SPECIFIC_MUX - 1. For {IDF_TARGET_NAME}, all timers share one clock source. In other words, it is impossible to use different clock sources for different timers. + 2. For {IDF_TARGET_NAME}, all timers share one clock source. In other words, it is impossible to use different clock sources for different timers. .. _ledc-api-configure-channel: diff --git a/docs/zh_CN/api-reference/peripherals/ledc.rst b/docs/zh_CN/api-reference/peripherals/ledc.rst index 471ef612f3..43b602c5d6 100644 --- a/docs/zh_CN/api-reference/peripherals/ledc.rst +++ b/docs/zh_CN/api-reference/peripherals/ledc.rst @@ -200,7 +200,7 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比,实 .. only:: not SOC_LEDC_HAS_TIMER_SPECIFIC_MUX - 1. {IDF_TARGET_NAME} 的所有定时器共用一个时钟源。因此 {IDF_TARGET_NAME} 不支持给不同的定时器配置不同的时钟源。 + 2. {IDF_TARGET_NAME} 的所有定时器共用一个时钟源。因此 {IDF_TARGET_NAME} 不支持给不同的定时器配置不同的时钟源。 .. _ledc-api-configure-channel: diff --git a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md index 287aa57a70..4bd56e2fea 100644 --- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md +++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/README.md @@ -26,7 +26,7 @@ please set: `idf.py menuconfig --> Component config --> Example 'GATT CLIENT THR ### Hardware Required -* A development board with ESP32/ESP32-C3/ESP32-C2/ESP32-H2/ESP32-S3 SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) +* A development board with supported SoC (e.g., ESP32-DevKitC, ESP-WROVER-KIT, etc.) * A USB cable for Power supply and programming See [Development Boards](https://www.espressif.com/en/products/devkits) for more information about it. diff --git a/examples/ethernet/basic/components/ethernet_init/Kconfig.projbuild b/examples/ethernet/basic/components/ethernet_init/Kconfig.projbuild index ce79cb4e23..a3d7b9cf22 100644 --- a/examples/ethernet/basic/components/ethernet_init/Kconfig.projbuild +++ b/examples/ethernet/basic/components/ethernet_init/Kconfig.projbuild @@ -142,6 +142,7 @@ menu "Example Ethernet Configuration" default 14 if IDF_TARGET_ESP32 default 12 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 default 6 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 4 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI SCLK. @@ -151,6 +152,7 @@ menu "Example Ethernet Configuration" default 13 if IDF_TARGET_ESP32 default 11 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 default 7 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 5 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI MOSI. @@ -160,13 +162,14 @@ menu "Example Ethernet Configuration" default 12 if IDF_TARGET_ESP32 default 13 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 default 2 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 0 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI MISO. config EXAMPLE_ETH_SPI_CLOCK_MHZ int "SPI clock speed (MHz)" range 5 80 - default 12 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 12 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32H2 default 36 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 help Set the clock speed (MHz) of SPI interface. @@ -176,6 +179,7 @@ menu "Example Ethernet Configuration" range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX default 15 if IDF_TARGET_ESP32 default 10 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2 + default 1 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI CS0, i.e. Chip Select associated with the first SPI Eth module). @@ -187,6 +191,7 @@ menu "Example Ethernet Configuration" default 7 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 default 8 if IDF_TARGET_ESP32C3 default 3 if IDF_TARGET_ESP32C2 + default 11 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI CS1, i.e. Chip Select associated with the second SPI Eth module. @@ -195,6 +200,7 @@ menu "Example Ethernet Configuration" range ENV_GPIO_RANGE_MIN ENV_GPIO_IN_RANGE_MAX default 4 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 default 4 if IDF_TARGET_ESP32C2 + default 9 if IDF_TARGET_ESP32H2 help Set the GPIO number used by the first SPI Ethernet module interrupt line. @@ -204,6 +210,7 @@ menu "Example Ethernet Configuration" range ENV_GPIO_RANGE_MIN ENV_GPIO_IN_RANGE_MAX default 33 if IDF_TARGET_ESP32 default 5 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2 + default 10 if IDF_TARGET_ESP32H2 help Set the GPIO number used by the second SPI Ethernet module interrupt line. diff --git a/examples/ethernet/enc28j60/main/Kconfig.projbuild b/examples/ethernet/enc28j60/main/Kconfig.projbuild index 60001d4ed1..c33f4b97e7 100644 --- a/examples/ethernet/enc28j60/main/Kconfig.projbuild +++ b/examples/ethernet/enc28j60/main/Kconfig.projbuild @@ -15,6 +15,7 @@ menu "Example Configuration" default 14 if IDF_TARGET_ESP32 default 12 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 default 6 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 4 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI SCLK. @@ -24,6 +25,7 @@ menu "Example Configuration" default 13 if IDF_TARGET_ESP32 default 11 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 default 7 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 5 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI MOSI. @@ -33,6 +35,7 @@ menu "Example Configuration" default 12 if IDF_TARGET_ESP32 default 13 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 default 2 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 0 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI MISO. @@ -41,6 +44,7 @@ menu "Example Configuration" range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX default 15 if IDF_TARGET_ESP32 default 10 if IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2 + default 1 if IDF_TARGET_ESP32H2 help Set the GPIO number used by SPI CS. @@ -56,6 +60,7 @@ menu "Example Configuration" range ENV_GPIO_RANGE_MIN ENV_GPIO_IN_RANGE_MAX default 4 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 default 4 if IDF_TARGET_ESP32C2 + default 9 if IDF_TARGET_ESP32H2 help Set the GPIO number used by ENC28J60 interrupt. diff --git a/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/example_config.h b/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/example_config.h index 73e49bebb4..72835af592 100644 --- a/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/example_config.h +++ b/examples/peripherals/i2s/i2s_codec/i2s_es8311/main/example_config.h @@ -26,12 +26,12 @@ #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #define I2C_SCL_IO (GPIO_NUM_16) #define I2C_SDA_IO (GPIO_NUM_17) -#elif CONFIG_IDF_TARGET_ESP32C3 -#define I2C_SCL_IO (GPIO_NUM_6) -#define I2C_SDA_IO (GPIO_NUM_7) #elif CONFIG_IDF_TARGET_ESP32H2 #define I2C_SCL_IO (GPIO_NUM_8) #define I2C_SDA_IO (GPIO_NUM_9) +#else +#define I2C_SCL_IO (GPIO_NUM_6) +#define I2C_SDA_IO (GPIO_NUM_7) #endif /* I2S port and GPIOs */ diff --git a/examples/system/console/advanced/components/cmd_system/cmd_system.c b/examples/system/console/advanced/components/cmd_system/cmd_system.c index d4e3dfef91..58b94a5970 100644 --- a/examples/system/console/advanced/components/cmd_system/cmd_system.c +++ b/examples/system/console/advanced/components/cmd_system/cmd_system.c @@ -87,8 +87,8 @@ static int get_version(int argc, char **argv) case CHIP_ESP32C3: model = "ESP32-C3"; break; - case CHIP_ESP32H4: - model = "ESP32-H4"; + case CHIP_ESP32H2: + model = "ESP32-H2"; break; case CHIP_ESP32C2: model = "ESP32-C2"; diff --git a/examples/system/deep_sleep/main/Kconfig.projbuild b/examples/system/deep_sleep/main/Kconfig.projbuild index d410ea169c..97793a8209 100644 --- a/examples/system/deep_sleep/main/Kconfig.projbuild +++ b/examples/system/deep_sleep/main/Kconfig.projbuild @@ -60,9 +60,11 @@ menu "Example Configuration" config EXAMPLE_GPIO_WAKEUP_PIN int "Enable wakeup from GPIO" - default 0 + default 0 if !IDF_TARGET_ESP32H2 + default 7 if IDF_TARGET_ESP32H2 range 0 7 if IDF_TARGET_ESP32C6 - range 0 5 + range 7 14 if IDF_TARGET_ESP32H2 + range 0 5 if !IDF_TARGET_ESP32C6 && !IDF_TARGET_ESP32H2 config EXAMPLE_GPIO_WAKEUP_HIGH_LEVEL bool "Enable GPIO high-level wakeup" diff --git a/examples/system/gcov/main/Kconfig.projbuild b/examples/system/gcov/main/Kconfig.projbuild index bd13a5eb16..a5ff55cf83 100644 --- a/examples/system/gcov/main/Kconfig.projbuild +++ b/examples/system/gcov/main/Kconfig.projbuild @@ -5,7 +5,7 @@ menu "Example Configuration" config BLINK_GPIO int "Blink GPIO number" range ENV_GPIO_RANGE_MIN ENV_GPIO_OUT_RANGE_MAX - default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32C2 + default 8 if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32H2 || IDF_TARGET_ESP32C2 default 18 if IDF_TARGET_ESP32S2 default 48 if IDF_TARGET_ESP32S3 default 5 diff --git a/examples/system/light_sleep/main/gpio_wakeup.c b/examples/system/light_sleep/main/gpio_wakeup.c index 1ed997b091..a4e86386de 100644 --- a/examples/system/light_sleep/main/gpio_wakeup.c +++ b/examples/system/light_sleep/main/gpio_wakeup.c @@ -12,7 +12,7 @@ /* Most development boards have "boot" button attached to GPIO0. * You can also change this to another pin. */ -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 \ +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 \ || CONFIG_IDF_TARGET_ESP32C6 #define BOOT_BUTTON_NUM 9 #else diff --git a/tools/ci/check_build_test_rules.py b/tools/ci/check_build_test_rules.py index 7751c3ff24..3823148aa9 100755 --- a/tools/ci/check_build_test_rules.py +++ b/tools/ci/check_build_test_rules.py @@ -32,7 +32,6 @@ USUAL_TO_FORMAL = { 'esp32c2': 'ESP32-C2', 'esp32c6': 'ESP32-C6', 'esp32h2': 'ESP32-H2', - 'esp32h4': 'ESP32-H4', 'linux': 'Linux', } @@ -44,7 +43,6 @@ FORMAL_TO_USUAL = { 'ESP32-C2': 'esp32c2', 'ESP32-C6': 'esp32c6', 'ESP32-H2': 'esp32h2', - 'ESP32-H4': 'esp32h4', 'Linux': 'linux', }