kopia lustrzana https://github.com/espressif/esp-idf
Disable brown-out WDT, fix thread WDT, add panic reason indication to _xt_panic()
Jeroen Domburg
rodzic
ae5c563080
commit
75a11589a1
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@ -140,7 +140,6 @@ config ULP_COPROC_RESERVE_MEM
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default 0
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depends on !ULP_COPROC_ENABLED
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menu "Watchdogs & brown-out detection"
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config INT_WDT
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bool "Interrupt watchdog"
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@ -155,7 +154,7 @@ config INT_WDT_TIMEOUT_MS
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int "Interrupt watchdog timeout (ms)"
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depends on INT_WDT
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default 10
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range INT_WDT_TIMEOUT_MIN 10000
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range 10 10000
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help
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The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
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@ -190,11 +189,15 @@ config TASK_WDT_CHECK_IDLE_TASK
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With this turned on, the task WDT can detect if the idle task is not called within the task
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watchdog timeout period. The idle task not being called usually is a symptom of another
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task hoarding the CPU. It is also a bad thing because FreeRTOS household tasks depend on the
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idle task getting some runtime every now and then.
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idle task getting some runtime every now and then. Take Care: With this disabled, this
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watchdog will trigger if no tasks register themselves within the timeout value.
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#The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
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#silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
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config BROWNOUT_DET
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bool "Hardware brownout detect & reset"
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default y
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depends on NEEDS_ESP32_NEW_SILICON_REV
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help
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The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
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a specific value. If this happens, it will reset the chip in order to prevent unintended
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@ -207,6 +210,8 @@ choice BROWNOUT_DET_LVL_SEL
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help
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The brownout detector will reset the chip when the supply voltage is below this level.
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#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
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#of the brownout threshold levels.
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config BROWNOUT_DET_LVL_SEL_0
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bool "2.1V"
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config BROWNOUT_DET_LVL_SEL_1
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@ -246,7 +251,6 @@ config BROWNOUT_DET_RESETDELAY
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The brownout detector can reset the chip after a certain delay, in order to make sure e.g. a voltage dip has entirely passed
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before trying to restart the chip. You can set the delay here.
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endmenu
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@ -22,10 +22,18 @@
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#include "soc/rtc_cntl_reg.h"
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#if CONFIG_BROWNOUT_DET
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/*
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This file ins included in esp-idf, but the menuconfig option for this is disabled because a silicon bug
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prohibits the brownout detector from functioning correctly on the ESP32.
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*/
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void esp_brownout_init() {
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WRITE_PERI_REG(RTC_CNTL_BROWN_OUT_REG,
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RTC_CNTL_BROWN_OUT_ENA | (CONFIG_BROWNOUT_DET_LVL << RTC_CNTL_DBROWN_OUT_THRES_S) |
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RTC_CNTL_BROWN_OUT_RST_ENA | (((CONFIG_BROWNOUT_DET_RESETDELAY*150)/1000) << RTC_CNTL_BROWN_OUT_RST_WAIT_S) |
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RTC_CNTL_BROWN_OUT_PD_RF_ENA|RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA);
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}
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}
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#endif
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@ -44,7 +44,6 @@ This uses the TIMERG1 WDT.
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#define WDT_INT_NUM 24
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#define WDT_WRITE_KEY 0x50D83AA1
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void int_wdt_init() {
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@ -55,11 +54,15 @@ void int_wdt_init() {
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TIMERG1.wdt_config0.stg0=1; //1st stage timeout: interrupt
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TIMERG1.wdt_config0.stg1=3; //2nd stage timeout: reset system
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TIMERG1.wdt_config1.clk_prescale=80*500; //Prescaler: wdt counts in ticks of 0.5mS
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TIMERG1.wdt_config2=CONFIG_INT_WDT_TIMEOUT_MS*2; //Set timeout before interrupt
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TIMERG1.wdt_config3=CONFIG_INT_WDT_TIMEOUT_MS*4; //Set timeout before reset
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//The timer configs initially are set to 5 seconds, to make sure the CPU can start up. The tick hook sets
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//it to their actual value.
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TIMERG1.wdt_config2=10000;
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TIMERG1.wdt_config3=10000;
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TIMERG1.wdt_config0.en=1;
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TIMERG1.wdt_feed=1;
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TIMERG1.wdt_wprotect=0;
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TIMERG1.int_clr_timers.wdt=1;
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TIMERG1.int_ena.wdt=1;
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ESP_INTR_DISABLE(WDT_INT_NUM);
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intr_matrix_set(xPortGetCoreID(), ETS_TG1_WDT_LEVEL_INTR_SOURCE, WDT_INT_NUM);
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//We do not register a handler for the interrupt because it is interrupt level 4 which
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@ -69,9 +72,10 @@ void int_wdt_init() {
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}
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void vApplicationTickHook(void) {
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TIMERG1.wdt_wprotect=WDT_WRITE_KEY;
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TIMERG1.wdt_config2=CONFIG_INT_WDT_TIMEOUT_MS*2; //Set timeout before interrupt
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TIMERG1.wdt_config3=CONFIG_INT_WDT_TIMEOUT_MS*4; //Set timeout before reset
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TIMERG1.wdt_feed=1;
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TIMERG1.wdt_wprotect=0;
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}
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@ -33,6 +33,7 @@ This uses the TIMERG0 WDT.
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#include <esp_types.h>
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#include "esp_err.h"
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#include "esp_intr.h"
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#include "esp_attr.h"
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#include "soc/timer_group_struct.h"
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#include "esp_log.h"
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@ -42,7 +43,6 @@ This uses the TIMERG0 WDT.
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static const char* TAG = "task_wdt";
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typedef struct wdt_task_t wdt_task_t;
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struct wdt_task_t {
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TaskHandle_t task_handle;
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@ -50,16 +50,35 @@ struct wdt_task_t {
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wdt_task_t *next;
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};
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static wdt_task_t *wdt_task_list=NULL;
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//We use this interrupt number on whatever task calls task_wdt_init.
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#define WDT_INT_NUM 24
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#define WDT_WRITE_KEY 0x50D83AA1
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static void task_wdt_isr(void *arg) {
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static void IRAM_ATTR task_wdt_isr(void *arg) {
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wdt_task_t *wdttask;
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const char *cpu;
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//Feed the watchdog so we do not reset
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TIMERG0.wdt_wprotect=WDT_WRITE_KEY;
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TIMERG0.wdt_feed=1;
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TIMERG0.wdt_wprotect=0;
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//Ack interrupt
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TIMERG0.int_clr_timers.wdt=1;
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//Watchdog got triggered because at least one task did not report in.
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ets_printf("Task watchdog got triggered. The following tasks did not feed the watchdog in time:\n");
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for (wdttask=wdt_task_list; wdttask!=NULL; wdttask=wdttask->next) {
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if (!wdttask->fed_watchdog) {
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cpu=xTaskGetAffinity(wdttask->task_handle)==0?"CPU 0":"CPU 1";
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if (xTaskGetAffinity(wdttask->task_handle)==tskNO_AFFINITY) cpu="CPU 0/1";
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printf(" - %s (%s)\n", pcTaskGetTaskName(wdttask->task_handle), cpu);
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}
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}
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#if CONFIG_TASK_WDT_PANIC
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ets_printf("Aborting.\n");
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abort();
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#endif
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}
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@ -69,7 +88,7 @@ void task_wdt_feed() {
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TaskHandle_t handle=xTaskGetCurrentTaskHandle();
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//Walk the linked list of wdt tasks to find this one, as well as see if we need to feed
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//the real watchdog timer.
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while (wdttask!=NULL) {
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for (wdttask=wdt_task_list; wdttask!=NULL; wdttask=wdttask->next) {
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//See if we are at the current task.
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if (wdttask->task_handle == handle) {
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wdttask->fed_watchdog=true;
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@ -77,8 +96,6 @@ void task_wdt_feed() {
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}
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//If even one task in the list doesn't have the do_feed_wdt var set, we do not feed the watchdog.
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if (!wdttask->fed_watchdog) do_feed_wdt=false;
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//Next entry.
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wdttask=wdttask->next;
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}
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if (!found_task) {
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@ -91,9 +108,8 @@ void task_wdt_feed() {
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if (wdt_task_list == NULL) {
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wdt_task_list=newtask;
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} else {
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wdttask=wdt_task_list;
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while (!(wdttask->next == NULL)) wdttask=wdttask->next;
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wdttask->next=wdttask;
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for (wdttask=wdt_task_list; wdttask->next!=NULL; wdttask=wdttask->next) ;
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wdttask->next=newtask;
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}
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}
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if (do_feed_wdt) {
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@ -101,6 +117,8 @@ void task_wdt_feed() {
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TIMERG0.wdt_wprotect=WDT_WRITE_KEY;
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TIMERG0.wdt_feed=1;
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TIMERG0.wdt_wprotect=0;
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//Reset fed_watchdog status
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for (wdttask=wdt_task_list; wdttask->next!=NULL; wdttask=wdttask->next) wdttask->fed_watchdog=false;
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}
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}
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@ -143,12 +161,13 @@ void task_wdt_init() {
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TIMERG0.wdt_feed=1;
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TIMERG0.wdt_wprotect=0;
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ESP_INTR_DISABLE(ETS_T0_WDT_INUM);
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intr_matrix_set(xPortGetCoreID(), ETS_TG1_WDT_LEVEL_INTR_SOURCE, ETS_T0_WDT_INUM);
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intr_matrix_set(xPortGetCoreID(), ETS_TG0_WDT_LEVEL_INTR_SOURCE, ETS_T0_WDT_INUM);
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xt_set_interrupt_handler(ETS_T0_WDT_INUM, task_wdt_isr, NULL);
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TIMERG0.int_clr_timers.wdt=1;
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TIMERG0.int_ena.wdt=1;
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ESP_INTR_ENABLE(ETS_T0_WDT_INUM);
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}
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#if CONFIG_TASK_WDT_CHECK_IDLE_TASK
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void vApplicationIdleHook(void) {
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task_wdt_feed();
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@ -231,6 +231,7 @@
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_uxTaskGetStackHighWaterMark 1
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#define INCLUDE_pcTaskGetTaskName 1
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#if CONFIG_ENABLE_MEMORY_DEBUG
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#define configENABLE_MEMORY_DEBUG 1
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@ -1,7 +1,20 @@
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#ifndef PANIC_H
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#define PANIC_H
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#define PANIC_RSN_NONE 0
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#define PANIC_RSN_DEBUGEXCEPTION 1
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#define PANIC_RSN_DOUBLEEXCEPTION 2
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#define PANIC_RSN_KERNELEXCEPTION 3
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#define PANIC_RSN_COPROCEXCEPTION 4
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#define PANIC_RSN_INTWDT 5
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#define PANIC_RSN_MAX 5
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#ifndef __ASSEMBLER__
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void setBreakpointIfJtag(void *fn);
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#endif
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#endif
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@ -25,8 +25,13 @@
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#include "soc/io_mux_reg.h"
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#include "soc/dport_reg.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/timer_group_struct.h"
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#include "gdbstub.h"
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#include "panic.h"
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#define WDT_WRITE_KEY 0x50D83AA1
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/*
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Panic handlers; these get called when an unhandled exception occurs or the assembly-level
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@ -130,10 +135,25 @@ static int inOCDMode() {
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}
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void panicHandler(XtExcFrame *frame) {
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int *regs=(int*)frame;
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//Please keep in sync with PANIC_RSN_* defines
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const char *reasons[]={
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"Unknown reason",
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"Unhandled debug exception",
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"Double exception",
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"Unhandled kernel exception",
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"Coprocessor exception",
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"Interrupt wdt timeout"
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};
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const char *reason=reasons[0];
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//The panic reason is stored in the EXCCAUSE register.
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if (regs[20]<=PANIC_RSN_MAX) reason=reasons[regs[20]];
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haltOtherCore();
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panicPutStr("Guru Meditation Error: Core ");
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panicPutDec(xPortGetCoreID());
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panicPutStr(" panic'ed.\r\n");
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panicPutStr(" panic'ed (");
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panicPutStr(reason);
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panicPutStr(")\r\n");
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if (inOCDMode()) {
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asm("break.n 1");
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@ -175,6 +195,33 @@ void xt_unhandled_exception(XtExcFrame *frame) {
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}
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//Disables all but one WDT, and allows enough time on that WDT to do what we need to do.
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static void reconfigureAllWdts() {
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TIMERG0.wdt_wprotect=WDT_WRITE_KEY;
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TIMERG0.wdt_feed=1;
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TIMERG0.wdt_config0.sys_reset_length=7; //3.2uS
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TIMERG0.wdt_config0.cpu_reset_length=7; //3.2uS
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TIMERG0.wdt_config0.stg0=3; //1st stage timeout: reset system
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TIMERG0.wdt_config1.clk_prescale=80*500; //Prescaler: wdt counts in ticks of 0.5mS
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TIMERG0.wdt_config2=2000; //1 second before reset
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TIMERG0.wdt_config0.en=1;
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TIMERG0.wdt_wprotect=0;
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//Disable wdt 1
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TIMERG1.wdt_wprotect=WDT_WRITE_KEY;
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TIMERG1.wdt_config0.en=0;
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TIMERG1.wdt_wprotect=0;
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}
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static void disableAllWdts() {
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TIMERG0.wdt_wprotect=WDT_WRITE_KEY;
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TIMERG0.wdt_config0.en=0;
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TIMERG0.wdt_wprotect=0;
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TIMERG1.wdt_wprotect=WDT_WRITE_KEY;
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TIMERG1.wdt_config0.en=0;
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TIMERG0.wdt_wprotect=0;
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}
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/*
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We arrive here after a panic or unhandled exception, when no OCD is detected. Dump the registers to the
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serial port and either jump to the gdb stub, halt the CPU or reboot.
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@ -187,6 +234,9 @@ void commonErrorHandler(XtExcFrame *frame) {
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"A6 ","A7 ","A8 ","A9 ","A10 ","A11 ","A12 ","A13 ",
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"A14 ","A15 ","SAR ","EXCCAUSE","EXCVADDR","LBEG ","LEND ","LCOUNT "};
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//Feed the watchdogs, so they will give us time to print out debug info
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reconfigureAllWdts();
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panicPutStr("Register dump:\r\n");
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for (x=0; x<24; x+=4) {
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@ -201,6 +251,7 @@ void commonErrorHandler(XtExcFrame *frame) {
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panicPutStr("\r\n");
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}
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#if CONFIG_FREERTOS_PANIC_GDBSTUB
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disableAllWdts();
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panicPutStr("Entering gdb stub now.\r\n");
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gdbstubPanicHandler(frame);
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#elif CONFIG_FREERTOS_PANIC_PRINT_REBOOT || CONFIG_FREERTOS_PANIC_SILENT_REBOOT
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@ -208,6 +259,7 @@ void commonErrorHandler(XtExcFrame *frame) {
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for (x=0; x<100; x++) ets_delay_us(1000);
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software_reset();
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#else
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disableAllWdts();
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panicPutStr("CPU halted.\r\n");
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while(1);
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#endif
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@ -1832,7 +1832,6 @@ UBaseType_t uxTaskGetNumberOfTasks( void )
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/*-----------------------------------------------------------*/
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#if ( INCLUDE_pcTaskGetTaskName == 1 )
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char *pcTaskGetTaskName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
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{
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TCB_t *pxTCB;
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@ -91,6 +91,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*******************************************************************************/
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#include "xtensa_rtos.h"
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#include "panic.h"
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/*
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Define for workaround: pin no-cpu-affinity tasks to a cpu when fpu is used.
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@ -462,6 +463,8 @@ _DebugExceptionVector:
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jx a3
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#else
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wsr a0, EXCSAVE+XCHAL_DEBUGLEVEL /* save original a0 somewhere */
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movi a0,PANIC_RSN_DEBUGEXCEPTION
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wsr a0,EXCCAUSE
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call0 _xt_panic /* does not return */
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rfi XCHAL_DEBUGLEVEL /* make a0 point here not later */
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#endif
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@ -489,6 +492,8 @@ _DoubleExceptionVector:
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#if XCHAL_HAVE_DEBUG
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break 1, 4 /* unhandled double exception */
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#endif
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movi a0,PANIC_RSN_DOUBLEEXCEPTION
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wsr a0,EXCCAUSE
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call0 _xt_panic /* does not return */
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rfde /* make a0 point here not later */
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@ -522,6 +527,8 @@ _xt_kernel_exc:
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#if XCHAL_HAVE_DEBUG
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break 1, 0 /* unhandled kernel exception */
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#endif
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movi a0,PANIC_RSN_KERNELEXCEPTION
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wsr a0,EXCCAUSE
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call0 _xt_panic /* does not return */
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rfe /* make a0 point here not there */
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@ -1024,6 +1031,8 @@ _xt_coproc_exc:
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#if XCHAL_HAVE_DEBUG
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break 1, 1 /* unhandled user exception */
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#endif
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movi a0,PANIC_RSN_COPROCEXCEPTION
|
||||
wsr a0,EXCCAUSE
|
||||
call0 _xt_panic /* not in a thread (invalid) */
|
||||
/* never returns */
|
||||
|
||||
|
|
@ -1611,6 +1620,8 @@ _xt_highint4:
|
|||
off and the CPU should panic. */
|
||||
rsr a0, EXCSAVE_4
|
||||
wsr a0, EXCSAVE_1 /* panic handler reads this register */
|
||||
movi a0,PANIC_RSN_INTWDT
|
||||
wsr a0,EXCCAUSE
|
||||
call0 _xt_panic
|
||||
|
||||
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue