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Merge branch 'bugfix/touch_wait_circle_after_wakeup_from_sleep_on_s3_v4.4' into 'release/v4.4' 

touch: fix the touch sensor wait cycle on s3 (v4.4)

See merge request espressif/esp-idf!17424
pull/9239/head
Jiang Jiang Jian 2022-06-19 22:49:08 +08:00
rodzic 646b52f26e 19faa6ef43
commit 1133b0ef10
3 zmienionych plików z 9 dodań i 1 usunięć
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2
components/esp_hw_support/port/esp32s2/rtc_init.c
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@ -59,7 +59,7 @@ void rtc_init(rtc_config_t cfg)
/* Reset RTC bias to default value (needed if waking up from deep sleep) */
REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_WAK, RTC_CNTL_DBIAS_1V10);
REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_SLP, RTC_CNTL_DBIAS_1V10);
/* Recover default wait cycle for touch or COCPU after wakeup from deep sleep. */
/* Set the wait time to the default value. */
REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT);
if (cfg.clkctl_init) {

2
components/esp_hw_support/port/esp32s3/rtc_init.c
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@ -67,6 +67,8 @@ void rtc_init(rtc_config_t cfg)
/* Reset RTC bias to default value (needed if waking up from deep sleep) */
REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG_SLEEP, RTC_CNTL_DBIAS_1V10);
REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG, RTC_CNTL_DBIAS_1V10);
/* Set the wait time to the default value. */
REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT);
if (cfg.cali_ocode) {
uint32_t blk_ver_major = 0;

6
components/esp_hw_support/port/esp32s3/rtc_sleep.c
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@ -233,6 +233,8 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_DEEP_SLP_REJECT_EN, cfg.deep_slp_reject);
REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_LIGHT_SLP_REJECT_EN, cfg.light_slp_reject);
/* Set wait cycle for touch or COCPU after deep sleep and light sleep. */
REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP);
REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu);
REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING, cfg.xtal_fpu);
@ -284,5 +286,9 @@ static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu)
rtc_sleep_pu_config_t pu_cfg = RTC_SLEEP_PU_CONFIG_ALL(1);
rtc_sleep_pu(pu_cfg);
}
/* Recover default wait cycle for touch or COCPU after wakeup. */
REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT);
return reject;
}