From 19faa6ef4377562fa0f51042fe2f3bfbe6de15bb Mon Sep 17 00:00:00 2001 From: laokaiyao Date: Fri, 15 Oct 2021 10:32:58 +0800 Subject: [PATCH] touch: fix the touch sensor wait cycle on s3 --- components/esp_hw_support/port/esp32s2/rtc_init.c | 2 +- components/esp_hw_support/port/esp32s3/rtc_init.c | 2 ++ components/esp_hw_support/port/esp32s3/rtc_sleep.c | 6 ++++++ 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/components/esp_hw_support/port/esp32s2/rtc_init.c b/components/esp_hw_support/port/esp32s2/rtc_init.c index 7932a89aa0..50c6e7e5eb 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_init.c +++ b/components/esp_hw_support/port/esp32s2/rtc_init.c @@ -59,7 +59,7 @@ void rtc_init(rtc_config_t cfg) /* Reset RTC bias to default value (needed if waking up from deep sleep) */ REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_WAK, RTC_CNTL_DBIAS_1V10); REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_SLP, RTC_CNTL_DBIAS_1V10); - /* Recover default wait cycle for touch or COCPU after wakeup from deep sleep. */ + /* Set the wait time to the default value. */ REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT); if (cfg.clkctl_init) { diff --git a/components/esp_hw_support/port/esp32s3/rtc_init.c b/components/esp_hw_support/port/esp32s3/rtc_init.c index ed44fd7baa..d878d2a980 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_init.c +++ b/components/esp_hw_support/port/esp32s3/rtc_init.c @@ -67,6 +67,8 @@ void rtc_init(rtc_config_t cfg) /* Reset RTC bias to default value (needed if waking up from deep sleep) */ REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG_SLEEP, RTC_CNTL_DBIAS_1V10); REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG, RTC_CNTL_DBIAS_1V10); + /* Set the wait time to the default value. */ + REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT); if (cfg.cali_ocode) { uint32_t blk_ver_major = 0; diff --git a/components/esp_hw_support/port/esp32s3/rtc_sleep.c b/components/esp_hw_support/port/esp32s3/rtc_sleep.c index aa2123ae38..48f3e29fb5 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32s3/rtc_sleep.c @@ -140,6 +140,8 @@ void rtc_sleep_init(rtc_sleep_config_t cfg) REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_DEEP_SLP_REJECT_EN, cfg.deep_slp_reject); REG_SET_FIELD(RTC_CNTL_SLP_REJECT_CONF_REG, RTC_CNTL_LIGHT_SLP_REJECT_EN, cfg.light_slp_reject); + /* Set wait cycle for touch or COCPU after deep sleep and light sleep. */ + REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP); REG_SET_FIELD(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_XTL_FORCE_PU, cfg.xtal_fpu); REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_XTAL_GLOBAL_FORCE_NOGATING, cfg.xtal_fpu); @@ -191,5 +193,9 @@ static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu) rtc_sleep_pu_config_t pu_cfg = RTC_SLEEP_PU_CONFIG_ALL(1); rtc_sleep_pu(pu_cfg); } + + /* Recover default wait cycle for touch or COCPU after wakeup. */ + REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT); + return reject; }