intr_allocator: add abstractions for priority, type and edge-ack interrupt controller functions

pull/6416/head
Felipe Neves 2020-11-11 13:21:49 -03:00 zatwierdzone przez morris
rodzic 810be86f21
commit 09bc1580be
6 zmienionych plików z 188 dodań i 25 usunięć

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@ -551,14 +551,11 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
interrupt_controller_hal_set_int_handler(intr, handler, arg); interrupt_controller_hal_set_int_handler(intr, handler, arg);
#endif #endif
} }
#ifdef __XTENSA__ // TODO ESP32-C3 IDF-2126
if (flags&ESP_INTR_FLAG_EDGE) xthal_set_intclear(1 << intr);
#else
if (flags & ESP_INTR_FLAG_EDGE) { if (flags & ESP_INTR_FLAG_EDGE) {
ESP_INTR_DISABLE(intr); interrupt_controller_hal_edge_int_acknowledge(intr);
esprv_intc_int_set_priority(intr, 0); }
}
#endif
vd->source=source; vd->source=source;
} }
if (flags&ESP_INTR_FLAG_IRAM) { if (flags&ESP_INTR_FLAG_IRAM) {
@ -585,12 +582,12 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre
esp_intr_disable(ret); esp_intr_disable(ret);
} }
#if CONFIG_IDF_TARGET_ESP32C3 //Set the level and type at controller level if needed:
// TODO ESP32-C3 IDF-2126, these need to be set or the new interrupt won't fire, but are currently hard-coded interrupt_controller_hal_set_int_level(intr,
// for priority and level... interrupt_controller_hal_desc_level(intr));
esprv_intc_int_set_priority(intr, 1);
esprv_intc_int_set_type(BIT(intr), INTR_TYPE_LEVEL); interrupt_controller_hal_set_int_type(intr,
#endif interrupt_controller_hal_desc_type(intr));
portEXIT_CRITICAL(&spinlock); portEXIT_CRITICAL(&spinlock);

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@ -100,6 +100,46 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
xt_int_enable_mask(newmask); xt_int_enable_mask(newmask);
} }
/**
* @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
*
* @param intr interrupt number ranged from 0 to 31
*/
static inline void intr_cntrl_ll_edge_int_acknowledge (int intr)
{
xthal_set_intclear(1 << intr);
}
/**
* @brief Sets the interrupt level int the interrupt controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param level priority between 1 (lowest) to 7 (highest)
*/
static inline void intr_cntrl_ll_set_int_level(int intr, int level)
{
/* Not needed currently for xtensa platforms since the level is already set
* in interrupt table
*/
(void)intr;
(void)level;
}
/**
* @brief Set the type of an interrupt in the controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param type interrupt type as edge or level triggered
*/
static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type)
{
/* Not needed currently for xtensa platforms since the type is already set
* in interrupt table
*/
(void)intr;
(void)type;
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@ -116,27 +116,40 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
} }
/** /**
* @brief Set the interrupt type given an interrupt number. * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
* *
* @param interrupt_number number of the interrupt * @param intr interrupt number ranged from 0 to 31
* @param type new type for this interrupt
*/ */
static inline void intr_cntrl_ll_set_type(int interrupt_number, int_type_t type) static inline void intr_cntrl_ll_edge_int_acknowledge (int intr)
{ {
esprv_intc_int_set_type(BIT(interrupt_number), type); intr_cntrl_ll_disable_interrupts(1 << intr);
esprv_intc_int_set_priority(intr, 0);
} }
/** /**
* @brief Set the interrupt level (priority) given an interrupt number. * @brief Sets the interrupt level int the interrupt controller.
* *
* @param interrupt_number number of the interrupt * @param interrupt_number Interrupt number 0 to 31
* @param level new level for this interrupt * @param level priority between 1 (lowest) to 7 (highest)
*/ */
static inline void intr_cntrl_ll_set_level(int interrupt_number, int level) static inline void intr_cntrl_ll_set_int_level(int intr, int level)
{ {
esprv_intc_int_set_priority(interrupt_number, level); esprv_intc_int_set_priority(intr, level);
} }
/**
* @brief Set the type of an interrupt in the controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param type interrupt type as edge or level triggered
*/
static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type)
{
/* Not needed currently for xtensa platforms since the type is already set
* in interrupt table
*/
esprv_intc_int_set_type(BIT(intr), type);
}
#ifdef __cplusplus #ifdef __cplusplus
} }

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@ -100,6 +100,47 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
xt_int_enable_mask(newmask); xt_int_enable_mask(newmask);
} }
/**
* @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
*
* @param intr interrupt number ranged from 0 to 31
*/
static inline void intr_cntrl_ll_edge_int_acknowledge (int intr)
{
xthal_set_intclear(1 << intr);
}
/**
* @brief Sets the interrupt level int the interrupt controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param level priority between 1 (lowest) to 7 (highest)
*/
static inline void intr_cntrl_ll_set_int_level(int intr, int level)
{
/* Not needed currently for xtensa platforms since the level is already set
* in interrupt table
*/
(void)intr;
(void)level;
}
/**
* @brief Set the type of an interrupt in the controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param type interrupt type as edge or level triggered
*/
static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type)
{
/* Not needed currently for xtensa platforms since the type is already set
* in interrupt table
*/
(void)intr;
(void)type;
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@ -100,6 +100,46 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask)
xt_int_enable_mask(newmask); xt_int_enable_mask(newmask);
} }
/**
* @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
*
* @param intr interrupt number ranged from 0 to 31
*/
static inline void intr_cntrl_ll_edge_int_acknowledge (int intr)
{
xthal_set_intclear(1 << intr);
}
/**
* @brief Sets the interrupt level int the interrupt controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param level priority between 1 (lowest) to 7 (highest)
*/
static inline void intr_cntrl_ll_set_int_level(int intr, int level)
{
/* Not needed currently for xtensa platforms since the level is already set
* in interrupt table
*/
(void)intr;
(void)level;
}
/**
* @brief Set the type of an interrupt in the controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param type interrupt type as edge or level triggered
*/
static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type)
{
/* Not needed currently for xtensa platforms since the type is already set
* in interrupt table
*/
(void)intr;
(void)type;
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@ -84,6 +84,17 @@ static inline int_type_t interrupt_controller_hal_get_type(int interrupt_number)
return interrupt_controller_hal_desc_type(interrupt_number); return interrupt_controller_hal_desc_type(interrupt_number);
} }
/**
* @brief Set the type of an interrupt in the controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param type interrupt type as edge or level triggered
*/
static inline void interrupt_controller_hal_set_int_type(int intr, int_type_t type)
{
intr_cntrl_ll_set_int_type(intr, type);
}
/** /**
* @brief Gets the interrupt level given an interrupt number. * @brief Gets the interrupt level given an interrupt number.
* *
@ -95,6 +106,17 @@ static inline int interrupt_controller_hal_get_level(int interrupt_number)
return interrupt_controller_hal_desc_level(interrupt_number); return interrupt_controller_hal_desc_level(interrupt_number);
} }
/**
* @brief Sets the interrupt level int the interrupt controller.
*
* @param interrupt_number Interrupt number 0 to 31
* @param level priority between 1 (lowest) to 7 (highest)
*/
static inline void interrupt_controller_hal_set_int_level(int intr, int level)
{
intr_cntrl_ll_set_int_level(intr, level);
}
/** /**
* @brief Gets the cpu flags given the interrupt number and target cpu. * @brief Gets the cpu flags given the interrupt number and target cpu.
* *
@ -184,6 +206,16 @@ static inline void interrupt_controller_hal_enable_int_mask(uint32_t newmask)
intr_cntrl_ll_enable_int_mask(newmask); intr_cntrl_ll_enable_int_mask(newmask);
} }
/**
* @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
*
* @param intr interrupt number ranged from 0 to 31
*/
static inline void interrupt_controller_hal_edge_int_acknowledge(int intr)
{
intr_cntrl_ll_edge_int_acknowledge(intr);
}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif