diff --git a/components/esp_system/intr_alloc.c b/components/esp_system/intr_alloc.c index 22650cfc25..67f3b6c697 100644 --- a/components/esp_system/intr_alloc.c +++ b/components/esp_system/intr_alloc.c @@ -551,14 +551,11 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre interrupt_controller_hal_set_int_handler(intr, handler, arg); #endif } -#ifdef __XTENSA__ // TODO ESP32-C3 IDF-2126 - if (flags&ESP_INTR_FLAG_EDGE) xthal_set_intclear(1 << intr); -#else + if (flags & ESP_INTR_FLAG_EDGE) { - ESP_INTR_DISABLE(intr); - esprv_intc_int_set_priority(intr, 0); - } -#endif + interrupt_controller_hal_edge_int_acknowledge(intr); + } + vd->source=source; } if (flags&ESP_INTR_FLAG_IRAM) { @@ -585,12 +582,12 @@ esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusre esp_intr_disable(ret); } -#if CONFIG_IDF_TARGET_ESP32C3 - // TODO ESP32-C3 IDF-2126, these need to be set or the new interrupt won't fire, but are currently hard-coded - // for priority and level... - esprv_intc_int_set_priority(intr, 1); - esprv_intc_int_set_type(BIT(intr), INTR_TYPE_LEVEL); -#endif + //Set the level and type at controller level if needed: + interrupt_controller_hal_set_int_level(intr, + interrupt_controller_hal_desc_level(intr)); + + interrupt_controller_hal_set_int_type(intr, + interrupt_controller_hal_desc_type(intr)); portEXIT_CRITICAL(&spinlock); diff --git a/components/hal/esp32/include/hal/interrupt_controller_ll.h b/components/hal/esp32/include/hal/interrupt_controller_ll.h index b61fa47dbc..d59fcc4d29 100644 --- a/components/hal/esp32/include/hal/interrupt_controller_ll.h +++ b/components/hal/esp32/include/hal/interrupt_controller_ll.h @@ -100,6 +100,46 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask) xt_int_enable_mask(newmask); } +/** + * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag + * + * @param intr interrupt number ranged from 0 to 31 + */ +static inline void intr_cntrl_ll_edge_int_acknowledge (int intr) +{ + xthal_set_intclear(1 << intr); +} + +/** + * @brief Sets the interrupt level int the interrupt controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param level priority between 1 (lowest) to 7 (highest) + */ +static inline void intr_cntrl_ll_set_int_level(int intr, int level) +{ + /* Not needed currently for xtensa platforms since the level is already set + * in interrupt table + */ + (void)intr; + (void)level; +} + +/** + * @brief Set the type of an interrupt in the controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param type interrupt type as edge or level triggered + */ +static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type) +{ + /* Not needed currently for xtensa platforms since the type is already set + * in interrupt table + */ + (void)intr; + (void)type; +} + #ifdef __cplusplus } #endif diff --git a/components/hal/esp32c3/include/hal/interrupt_controller_ll.h b/components/hal/esp32c3/include/hal/interrupt_controller_ll.h index 96277e9922..8d0b8cb6d4 100644 --- a/components/hal/esp32c3/include/hal/interrupt_controller_ll.h +++ b/components/hal/esp32c3/include/hal/interrupt_controller_ll.h @@ -116,27 +116,40 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask) } /** - * @brief Set the interrupt type given an interrupt number. - * - * @param interrupt_number number of the interrupt - * @param type new type for this interrupt + * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag + * + * @param intr interrupt number ranged from 0 to 31 */ -static inline void intr_cntrl_ll_set_type(int interrupt_number, int_type_t type) +static inline void intr_cntrl_ll_edge_int_acknowledge (int intr) { - esprv_intc_int_set_type(BIT(interrupt_number), type); + intr_cntrl_ll_disable_interrupts(1 << intr); + esprv_intc_int_set_priority(intr, 0); } /** - * @brief Set the interrupt level (priority) given an interrupt number. - * - * @param interrupt_number number of the interrupt - * @param level new level for this interrupt + * @brief Sets the interrupt level int the interrupt controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param level priority between 1 (lowest) to 7 (highest) */ -static inline void intr_cntrl_ll_set_level(int interrupt_number, int level) +static inline void intr_cntrl_ll_set_int_level(int intr, int level) { - esprv_intc_int_set_priority(interrupt_number, level); + esprv_intc_int_set_priority(intr, level); } +/** + * @brief Set the type of an interrupt in the controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param type interrupt type as edge or level triggered + */ +static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type) +{ + /* Not needed currently for xtensa platforms since the type is already set + * in interrupt table + */ + esprv_intc_int_set_type(BIT(intr), type); +} #ifdef __cplusplus } diff --git a/components/hal/esp32s2/include/hal/interrupt_controller_ll.h b/components/hal/esp32s2/include/hal/interrupt_controller_ll.h index b61fa47dbc..2e07c0ff00 100644 --- a/components/hal/esp32s2/include/hal/interrupt_controller_ll.h +++ b/components/hal/esp32s2/include/hal/interrupt_controller_ll.h @@ -100,6 +100,47 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask) xt_int_enable_mask(newmask); } +/** + * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag + * + * @param intr interrupt number ranged from 0 to 31 + */ +static inline void intr_cntrl_ll_edge_int_acknowledge (int intr) +{ + xthal_set_intclear(1 << intr); +} + +/** + * @brief Sets the interrupt level int the interrupt controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param level priority between 1 (lowest) to 7 (highest) + */ +static inline void intr_cntrl_ll_set_int_level(int intr, int level) +{ + /* Not needed currently for xtensa platforms since the level is already set + * in interrupt table + */ + (void)intr; + (void)level; +} + +/** + * @brief Set the type of an interrupt in the controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param type interrupt type as edge or level triggered + */ +static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type) +{ + /* Not needed currently for xtensa platforms since the type is already set + * in interrupt table + */ + (void)intr; + (void)type; +} + + #ifdef __cplusplus } #endif diff --git a/components/hal/esp32s3/include/hal/interrupt_controller_ll.h b/components/hal/esp32s3/include/hal/interrupt_controller_ll.h index b61fa47dbc..d59fcc4d29 100644 --- a/components/hal/esp32s3/include/hal/interrupt_controller_ll.h +++ b/components/hal/esp32s3/include/hal/interrupt_controller_ll.h @@ -100,6 +100,46 @@ static inline void intr_cntrl_ll_enable_int_mask(uint32_t newmask) xt_int_enable_mask(newmask); } +/** + * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag + * + * @param intr interrupt number ranged from 0 to 31 + */ +static inline void intr_cntrl_ll_edge_int_acknowledge (int intr) +{ + xthal_set_intclear(1 << intr); +} + +/** + * @brief Sets the interrupt level int the interrupt controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param level priority between 1 (lowest) to 7 (highest) + */ +static inline void intr_cntrl_ll_set_int_level(int intr, int level) +{ + /* Not needed currently for xtensa platforms since the level is already set + * in interrupt table + */ + (void)intr; + (void)level; +} + +/** + * @brief Set the type of an interrupt in the controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param type interrupt type as edge or level triggered + */ +static inline void intr_cntrl_ll_set_int_type(int intr, int_type_t type) +{ + /* Not needed currently for xtensa platforms since the type is already set + * in interrupt table + */ + (void)intr; + (void)type; +} + #ifdef __cplusplus } #endif diff --git a/components/hal/include/hal/interrupt_controller_hal.h b/components/hal/include/hal/interrupt_controller_hal.h index c0a6d61822..dd0f615a1f 100644 --- a/components/hal/include/hal/interrupt_controller_hal.h +++ b/components/hal/include/hal/interrupt_controller_hal.h @@ -84,6 +84,17 @@ static inline int_type_t interrupt_controller_hal_get_type(int interrupt_number) return interrupt_controller_hal_desc_type(interrupt_number); } +/** + * @brief Set the type of an interrupt in the controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param type interrupt type as edge or level triggered + */ +static inline void interrupt_controller_hal_set_int_type(int intr, int_type_t type) +{ + intr_cntrl_ll_set_int_type(intr, type); +} + /** * @brief Gets the interrupt level given an interrupt number. * @@ -95,6 +106,17 @@ static inline int interrupt_controller_hal_get_level(int interrupt_number) return interrupt_controller_hal_desc_level(interrupt_number); } +/** + * @brief Sets the interrupt level int the interrupt controller. + * + * @param interrupt_number Interrupt number 0 to 31 + * @param level priority between 1 (lowest) to 7 (highest) + */ +static inline void interrupt_controller_hal_set_int_level(int intr, int level) +{ + intr_cntrl_ll_set_int_level(intr, level); +} + /** * @brief Gets the cpu flags given the interrupt number and target cpu. * @@ -184,6 +206,16 @@ static inline void interrupt_controller_hal_enable_int_mask(uint32_t newmask) intr_cntrl_ll_enable_int_mask(newmask); } +/** + * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag + * + * @param intr interrupt number ranged from 0 to 31 + */ +static inline void interrupt_controller_hal_edge_int_acknowledge(int intr) +{ + intr_cntrl_ll_edge_int_acknowledge(intr); +} + #ifdef __cplusplus } #endif