2021-05-24 00:02:15 +00:00
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/*
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* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2020-02-25 14:19:48 +00:00
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#include <stdlib.h>
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#include <ctype.h>
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2020-07-21 05:07:34 +00:00
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#include "sdkconfig.h"
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#include "esp_types.h"
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2020-02-25 14:19:48 +00:00
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#include "esp_log.h"
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#include "sys/lock.h"
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#include "freertos/FreeRTOS.h"
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#include "hal/adc_types.h"
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2021-12-15 06:15:32 +00:00
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#include "hal/adc_ll.h"
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2020-02-25 14:19:48 +00:00
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extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
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#define ADC_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
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#define ADC_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
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/**
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2021-12-15 06:15:32 +00:00
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* Config monitor of adc digital controller.
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2020-02-25 14:19:48 +00:00
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*
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2021-12-15 06:15:32 +00:00
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* @note The monitor will monitor all the enabled channel data of the each ADC unit at the same time.
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* @param adc_n ADC unit.
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* @param config Refer to ``adc_digi_monitor_t``.
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2020-02-25 14:19:48 +00:00
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*/
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2022-03-08 11:26:04 +00:00
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static void adc_digi_monitor_config(adc_unit_t adc_n, adc_digi_monitor_t *config)
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2020-02-25 14:19:48 +00:00
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{
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2021-12-15 06:15:32 +00:00
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adc_ll_digi_monitor_set_mode(adc_n, config->mode);
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adc_ll_digi_monitor_set_thres(adc_n, config->threshold);
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2020-02-25 14:19:48 +00:00
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}
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/*************************************/
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/* Digital controller filter setting */
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/*************************************/
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esp_err_t adc_digi_filter_reset(adc_digi_filter_idx_t idx)
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{
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ADC_ENTER_CRITICAL();
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if (idx == ADC_DIGI_FILTER_IDX0) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_reset(ADC_UNIT_1);
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2020-02-25 14:19:48 +00:00
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} else if (idx == ADC_DIGI_FILTER_IDX1) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_reset(ADC_UNIT_2);
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2020-02-25 14:19:48 +00:00
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}
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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esp_err_t adc_digi_filter_set_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config)
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{
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ADC_ENTER_CRITICAL();
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if (idx == ADC_DIGI_FILTER_IDX0) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_set_factor(ADC_UNIT_1, config->mode);
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2020-02-25 14:19:48 +00:00
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} else if (idx == ADC_DIGI_FILTER_IDX1) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_set_factor(ADC_UNIT_2, config->mode);
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2020-02-25 14:19:48 +00:00
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}
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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esp_err_t adc_digi_filter_get_config(adc_digi_filter_idx_t idx, adc_digi_filter_t *config)
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{
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ADC_ENTER_CRITICAL();
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if (idx == ADC_DIGI_FILTER_IDX0) {
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config->adc_unit = ADC_UNIT_1;
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config->channel = ADC_CHANNEL_MAX;
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_get_factor(ADC_UNIT_1, &config->mode);
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2020-02-25 14:19:48 +00:00
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} else if (idx == ADC_DIGI_FILTER_IDX1) {
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config->adc_unit = ADC_UNIT_2;
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config->channel = ADC_CHANNEL_MAX;
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_get_factor(ADC_UNIT_2, &config->mode);
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2020-02-25 14:19:48 +00:00
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}
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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esp_err_t adc_digi_filter_enable(adc_digi_filter_idx_t idx, bool enable)
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{
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ADC_ENTER_CRITICAL();
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if (idx == ADC_DIGI_FILTER_IDX0) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_enable(ADC_UNIT_1, enable);
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2020-02-25 14:19:48 +00:00
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} else if (idx == ADC_DIGI_FILTER_IDX1) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_filter_enable(ADC_UNIT_2, enable);
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2020-02-25 14:19:48 +00:00
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}
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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/**
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* @brief Get the filtered data of adc digital controller filter. For debug.
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* The data after each measurement and filtering is updated to the DMA by the digital controller. But it can also be obtained manually through this API.
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*
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* @note For ESP32S2, The filter will filter all the enabled channel data of the each ADC unit at the same time.
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* @param idx Filter index.
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* @return Filtered data. if <0, the read data invalid.
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*/
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int adc_digi_filter_read_data(adc_digi_filter_idx_t idx)
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{
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if (idx == ADC_DIGI_FILTER_IDX0) {
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2022-03-08 11:26:04 +00:00
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return adc_ll_digi_filter_read_data(ADC_UNIT_1);
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2020-02-25 14:19:48 +00:00
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} else if (idx == ADC_DIGI_FILTER_IDX1) {
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2022-03-08 11:26:04 +00:00
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return adc_ll_digi_filter_read_data(ADC_UNIT_2);
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2020-02-25 14:19:48 +00:00
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} else {
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return -1;
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}
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}
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/**************************************/
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/* Digital controller monitor setting */
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/**************************************/
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esp_err_t adc_digi_monitor_set_config(adc_digi_monitor_idx_t idx, adc_digi_monitor_t *config)
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{
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ADC_ENTER_CRITICAL();
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if (idx == ADC_DIGI_MONITOR_IDX0) {
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2022-03-08 11:26:04 +00:00
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adc_digi_monitor_config(ADC_UNIT_1, config);
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2020-02-25 14:19:48 +00:00
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} else if (idx == ADC_DIGI_MONITOR_IDX1) {
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2022-03-08 11:26:04 +00:00
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adc_digi_monitor_config(ADC_UNIT_2, config);
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2020-02-25 14:19:48 +00:00
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}
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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esp_err_t adc_digi_monitor_enable(adc_digi_monitor_idx_t idx, bool enable)
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{
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ADC_ENTER_CRITICAL();
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if (idx == ADC_DIGI_MONITOR_IDX0) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_monitor_enable(ADC_UNIT_1, enable);
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2020-02-25 14:19:48 +00:00
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} else if (idx == ADC_DIGI_MONITOR_IDX1) {
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2022-03-08 11:26:04 +00:00
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adc_ll_digi_monitor_enable(ADC_UNIT_2, enable);
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2020-02-25 14:19:48 +00:00
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}
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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