2020-07-21 09:15:19 +00:00
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menu "Power Management"
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config PM_ENABLE
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bool "Support for power management"
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default n
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help
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If enabled, application is compiled with support for power management.
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This option has run-time overhead (increased interrupt latency,
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longer time to enter idle state), and it also reduces accuracy of
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RTOS ticks and timers used for timekeeping.
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Enable this option if application uses power management APIs.
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config PM_DFS_INIT_AUTO
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bool "Enable dynamic frequency scaling (DFS) at startup"
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depends on PM_ENABLE
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default n
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help
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If enabled, startup code configures dynamic frequency scaling.
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Max CPU frequency is set to DEFAULT_CPU_FREQ_MHZ setting,
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min frequency is set to XTAL frequency.
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If disabled, DFS will not be active until the application
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configures it using esp_pm_configure function.
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2020-07-22 07:23:39 +00:00
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2020-07-21 09:15:19 +00:00
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config PM_USE_RTC_TIMER_REF
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bool "Use RTC timer to prevent time drift (EXPERIMENTAL)"
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2020-10-20 06:09:32 +00:00
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depends on (PM_ENABLE && ESP_TIMER_IMPL_FRC2 && ESP_TIME_FUNCS_USE_RTC_TIMER)
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2020-07-21 09:15:19 +00:00
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default n
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help
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When APB clock frequency changes, high-resolution timer (esp_timer)
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scale and base value need to be adjusted. Each adjustment may cause
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small error, and over time such small errors may cause time drift.
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If this option is enabled, RTC timer will be used as a reference to
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compensate for the drift.
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It is recommended that this option is only used if 32k XTAL is selected
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as RTC clock source.
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config PM_PROFILING
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bool "Enable profiling counters for PM locks"
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depends on PM_ENABLE
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default n
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help
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If enabled, esp_pm_* functions will keep track of the amount of time
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each of the power management locks has been held, and esp_pm_dump_locks
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function will print this information.
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This feature can be used to analyze which locks are preventing the chip
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from going into a lower power state, and see what time the chip spends
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in each power saving mode. This feature does incur some run-time
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overhead, so should typically be disabled in production builds.
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config PM_TRACE
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bool "Enable debug tracing of PM using GPIOs"
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depends on PM_ENABLE
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default n
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help
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If enabled, some GPIOs will be used to signal events such as RTOS ticks,
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frequency switching, entry/exit from idle state. Refer to pm_trace.c
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file for the list of GPIOs.
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This feature is intended to be used when analyzing/debugging behavior
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of power management implementation, and should be kept disabled in
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applications.
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2020-12-23 06:45:36 +00:00
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config PM_SLP_IRAM_OPT
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bool "Put lightsleep related codes in internal RAM"
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depends on FREERTOS_USE_TICKLESS_IDLE
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help
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2020-12-25 12:04:32 +00:00
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If enabled, about 1.8KB of lightsleep related source code would be in IRAM and chip would sleep
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2020-12-23 06:45:36 +00:00
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longer for 760us at most each time.
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2020-12-25 12:04:32 +00:00
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This feature is intended to be used when lower power consumption is needed
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while there is enough place in IRAM to place source code.
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2020-07-21 09:15:19 +00:00
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2020-12-23 06:45:36 +00:00
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config PM_RTOS_IDLE_OPT
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bool "Put RTOS IDLE related codes in internal RAM"
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depends on FREERTOS_USE_TICKLESS_IDLE
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help
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2020-12-25 12:04:32 +00:00
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If enabled, about 260B of RTOS_IDLE related source code would be in IRAM and chip would sleep
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2020-12-23 06:45:36 +00:00
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longer for 40us at most each time.
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2020-12-25 12:04:32 +00:00
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This feature is intended to be used when lower power consumption is needed
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while there is enough place in IRAM to place source code.
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2020-11-12 12:39:55 +00:00
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config PM_SLP_DISABLE_GPIO
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bool "Disable all GPIO when chip at sleep"
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depends on FREERTOS_USE_TICKLESS_IDLE
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help
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This feature is intended to disable all GPIO pins at automantic sleep to get a lower power mode.
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If enabled, chips will disable all GPIO pins at automantic sleep to reduce about 200~300 uA current.
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If you want to specifically use some pins normally as chip wakes when chip sleeps,
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you can call 'gpio_sleep_sel_dis' to disable this feature on those pins.
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You can also keep this feature on and call 'gpio_sleep_set_direction' and 'gpio_sleep_set_pull_mode'
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to have a different GPIO configuration at sleep.
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Waring: If you want to enable this option on ESP32, you should enable `GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL`
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at first, otherwise you will not be able to switch pullup/pulldown mode.
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2021-02-23 02:17:27 +00:00
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config PM_SLP_DEFAULT_PARAMS_OPT
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bool
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default n
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2021-03-10 13:55:49 +00:00
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config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
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bool "Power down CPU in light sleep"
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2021-06-18 09:25:04 +00:00
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depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
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2021-08-20 12:33:33 +00:00
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select PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP if ESP32S3_DATA_CACHE_16KB
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2021-03-10 13:55:49 +00:00
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default y
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help
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2021-06-18 09:25:04 +00:00
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If enabled, the CPU will be powered down in light sleep. On esp32c3 soc, enabling this
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option will consume 1.68 KB of internal RAM and will reduce sleep current consumption
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by about 100 uA. On esp32s3 soc, enabling this option will consume 8.58 KB of internal
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RAM and will reduce sleep current consumption by about 650 uA.
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2021-03-10 13:55:49 +00:00
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2021-08-20 12:33:33 +00:00
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config PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP
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bool "Power down I/D-cache tag memory in light sleep"
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depends on IDF_TARGET_ESP32S3 && PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
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default y
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help
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If enabled, the I/D-cache tag memory will be retained in light sleep. Depending on the the
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cache configuration, if this option is enabled, it will consume up to 9 KB of internal RAM.
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2020-07-21 09:15:19 +00:00
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endmenu # "Power Management"
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