remapping RTE to RAM2

master
Mateusz Lubecki 2024-05-22 22:35:26 +02:00
rodzic df6195cdb9
commit 548c3fd649
4 zmienionych plików z 104 dodań i 18 usunięć

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@ -57,7 +57,7 @@
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/> <listEntry value="4"/>
</listAttribute> </listAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#10;"/> <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;&gt;&#10; &lt;memoryBlockExpression address=&quot;0&quot; label=&quot;rte_wx_wind_qf&quot;/&gt;&#10;&lt;/memoryBlockExpressionList&gt;&#10;"/>
<stringAttribute key="org.eclipse.embedcdt.debug.gdbjtag.core.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals&gt;&#10; &lt;peripheral name=&quot;IWDG&quot;/&gt;&#10; &lt;peripheral name=&quot;DBGMCU&quot;/&gt;&#10; &lt;peripheral name=&quot;RTC&quot;/&gt;&#10;&lt;/peripherals&gt;&#10;"/> <stringAttribute key="org.eclipse.embedcdt.debug.gdbjtag.core.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;peripherals&gt;&#10; &lt;peripheral name=&quot;IWDG&quot;/&gt;&#10; &lt;peripheral name=&quot;DBGMCU&quot;/&gt;&#10; &lt;peripheral name=&quot;RTC&quot;/&gt;&#10;&lt;/peripherals&gt;&#10;"/>
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/> <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
</launchConfiguration> </launchConfiguration>

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@ -199,19 +199,30 @@ typedef struct __attribute__((aligned (4))) config_data_basic_t {
#define CONFIGURATION_SEC_MEDIUM_KISS 4U #define CONFIGURATION_SEC_MEDIUM_KISS 4U
/** /**
* Configuration of how UDS diagnostics are secured access different * Configuration of how UDS diagnostics are secured access different
* mediums. GET_VERSION_AND_ID and SECURITY_ACCESS are never locked * mediums. GET_VERSION_AND_ID and SECURITY_ACCESS are never locked.
* If the service shall not(!!) be locked respective bit should be set to 0.
* By default, when memory is fully erased everything is locked
* *
* READ_DID and READ_MEMORY * Serial Port
* bit 1 - APRSIS * 0 - Read DID
* bit 2 - RF network communication * 1 - Read Memory (log and
* bit 3 - KISS serial port communication * 2 -
* *
* everything else *
* bit 4 - APRSIS * 13 -
* bit 5 - RF network communication *
* bit 6 - KISS serial port communication * APRS Message (Radio network or APRS-IS server)
*
* 16 -
* 17 -
*
* 29 -
*
* Common
* 30 - Unlock all services by default when accessed via APRSMSG_TRANSPORT_ENCRYPTED_HEXSTRING
* 31 -
*/ */
uint8_t uds_diagnostics_security_access; uint32_t uds_diagnostics_security_access;
} config_data_basic_t; } config_data_basic_t;

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@ -153,8 +153,8 @@ SECTIONS
{ {
. = ALIGN(8); . = ALIGN(8);
_sdata = .; /* create a global symbol at data start */ _sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */ EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.data) /* .data sections */
*(.data*) /* .data* sections */ EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.data*) /* .data* sections */
. = ALIGN(8); . = ALIGN(8);
_edata = .; /* define a global symbol at data end */ _edata = .; /* define a global symbol at data end */
@ -168,15 +168,52 @@ SECTIONS
/* This is used by the startup in order to initialize the .bss secion */ /* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */ _sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss; __bss_start__ = _sbss;
*(.bss) EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.bss)
*(.bss*) EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.bss*)
*(COMMON) EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(COMMON)
. = ALIGN(4); . = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */ _ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss; __bss_end__ = _ebss;
} >RAM } >RAM
.rte_bss :
{
_s_rte_bss = .; /* define a global symbol at bss start */
__bss_rte_start__ = _s_rte_bss;
. = ALIGN(4);
KEEP(*rte_wx.o (.bss))
KEEP(*rte_wx.o (.bss*))
KEEP(*rte_wx.o (COMMON))
KEEP(*rte_main.o (.bss))
KEEP(*rte_main.o (.bss*))
KEEP(*rte_main.o (COMMON))
KEEP(*rte_rtu.o (.bss))
KEEP(*rte_rtu.o (.bss*))
KEEP(*rte_rtu.o (COMMON))
. = ALIGN(4);
_e_rte_bss = .; /* define a global symbol at bss start */
__bss_rte_end__ = _e_rte_bss;
} >RAM2
/* used by the startup to initialize data */
_si_rte_data = LOADADDR(.rte_data);
.rte_data :
{
_s_rte_data = .; /* create a global symbol at data start */
. = ALIGN(8);
KEEP(*rte_wx.o (.data))
KEEP(*rte_wx.o (.data*))
KEEP(*rte_main.o (.data))
KEEP(*rte_main.o (.data*))
KEEP(*rte_rtu.o (.data))
KEEP(*rte_rtu.o (.data*))
. = ALIGN(8);
_e_rte_data = .; /* create a global symbol at data start */
} >RAM2 AT> FLASH
/* User_heap_stack section, used to check that there is enough RAM left */ /* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack : ._user_heap_stack :
{ {

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@ -65,7 +65,8 @@ Reset_Handler:
/* Call the clock system initialization function.*/ /* Call the clock system initialization function.*/
bl SystemInit bl SystemInit
/* Copy the data segment initializers from flash to SRAM */ /* Main BSS and DATA section initialization */
// DATA
movs r1, #0 movs r1, #0
b LoopCopyDataInit b LoopCopyDataInit
@ -81,9 +82,10 @@ LoopCopyDataInit:
adds r2, r0, r1 adds r2, r0, r1
cmp r2, r3 cmp r2, r3
bcc CopyDataInit bcc CopyDataInit
// BSS
ldr r2, =_sbss ldr r2, =_sbss
b LoopFillZerobss b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss: FillZerobss:
movs r3, #0 movs r3, #0
str r3, [r2], #4 str r3, [r2], #4
@ -92,6 +94,42 @@ LoopFillZerobss:
ldr r3, = _ebss ldr r3, = _ebss
cmp r2, r3 cmp r2, r3
bcc FillZerobss bcc FillZerobss
/* !!! END !!! Main BSS and DATA section initialization */
/* RAM2 rte BSS and DATA section initialization */
// DATA
movs r1, #0
b LoopCopyDataInitRte
CopyDataInitRte:
ldr r3, =_si_rte_data
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInitRte:
ldr r0, =_s_rte_data
ldr r3, =_e_rte_data
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInitRte
// BSS
ldr r2, =_s_rte_bss
b LoopFillZerobssRte
FillZerobssRte:
movs r3, #0
str r3, [r2], #4
LoopFillZerobssRte:
ldr r3, = _e_rte_bss
cmp r2, r3
bcc FillZerobssRte
/* END!!! RAM2 rte BSS and DATA section initialization */
/* Call static constructors */ /* Call static constructors */
bl __libc_init_array bl __libc_init_array