From 548c3fd649037f06e877c0b76ef296c7cb40d3b0 Mon Sep 17 00:00:00 2001 From: Mateusz Lubecki Date: Wed, 22 May 2024 22:35:26 +0200 Subject: [PATCH] remapping RTE to RAM2 --- .../ParaMETEO-STM32L476RG.launch | 2 +- .../stored_configuration_nvm/config_data.h | 31 ++++++++---- ldscripts/stm32l476/STM32L471RETx_FLASH.ld | 47 +++++++++++++++++-- .../src/cmsis/stm32l4xx/startup_stm32l471xx.S | 42 ++++++++++++++++- 4 files changed, 104 insertions(+), 18 deletions(-) diff --git a/doc/eclipse_debugger_launch/ParaMETEO-STM32L476RG.launch b/doc/eclipse_debugger_launch/ParaMETEO-STM32L476RG.launch index e916c43..d70d421 100644 --- a/doc/eclipse_debugger_launch/ParaMETEO-STM32L476RG.launch +++ b/doc/eclipse_debugger_launch/ParaMETEO-STM32L476RG.launch @@ -57,7 +57,7 @@ - + diff --git a/include/stored_configuration_nvm/config_data.h b/include/stored_configuration_nvm/config_data.h index 597f1f1..25a13fc 100644 --- a/include/stored_configuration_nvm/config_data.h +++ b/include/stored_configuration_nvm/config_data.h @@ -199,19 +199,30 @@ typedef struct __attribute__((aligned (4))) config_data_basic_t { #define CONFIGURATION_SEC_MEDIUM_KISS 4U /** * Configuration of how UDS diagnostics are secured access different - * mediums. GET_VERSION_AND_ID and SECURITY_ACCESS are never locked + * mediums. GET_VERSION_AND_ID and SECURITY_ACCESS are never locked. + * If the service shall not(!!) be locked respective bit should be set to 0. + * By default, when memory is fully erased everything is locked * - * READ_DID and READ_MEMORY - * bit 1 - APRSIS - * bit 2 - RF network communication - * bit 3 - KISS serial port communication + * Serial Port + * 0 - Read DID + * 1 - Read Memory (log and + * 2 - * - * everything else - * bit 4 - APRSIS - * bit 5 - RF network communication - * bit 6 - KISS serial port communication + * + * 13 - + * + * APRS Message (Radio network or APRS-IS server) + * + * 16 - + * 17 - + * + * 29 - + * + * Common + * 30 - Unlock all services by default when accessed via APRSMSG_TRANSPORT_ENCRYPTED_HEXSTRING + * 31 - */ - uint8_t uds_diagnostics_security_access; + uint32_t uds_diagnostics_security_access; } config_data_basic_t; diff --git a/ldscripts/stm32l476/STM32L471RETx_FLASH.ld b/ldscripts/stm32l476/STM32L471RETx_FLASH.ld index d293adc..6741f10 100644 --- a/ldscripts/stm32l476/STM32L471RETx_FLASH.ld +++ b/ldscripts/stm32l476/STM32L471RETx_FLASH.ld @@ -153,8 +153,8 @@ SECTIONS { . = ALIGN(8); _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ + EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.data) /* .data sections */ + EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.data*) /* .data* sections */ . = ALIGN(8); _edata = .; /* define a global symbol at data end */ @@ -168,15 +168,52 @@ SECTIONS /* This is used by the startup in order to initialize the .bss secion */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) + EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.bss) + EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(.bss*) + EXCLUDE_FILE(*rte_wx.o *rte_main.o *rte_rtu.o) *(COMMON) . = ALIGN(4); _ebss = .; /* define a global symbol at bss end */ __bss_end__ = _ebss; } >RAM + + .rte_bss : + { + _s_rte_bss = .; /* define a global symbol at bss start */ + __bss_rte_start__ = _s_rte_bss; + . = ALIGN(4); + KEEP(*rte_wx.o (.bss)) + KEEP(*rte_wx.o (.bss*)) + KEEP(*rte_wx.o (COMMON)) + KEEP(*rte_main.o (.bss)) + KEEP(*rte_main.o (.bss*)) + KEEP(*rte_main.o (COMMON)) + KEEP(*rte_rtu.o (.bss)) + KEEP(*rte_rtu.o (.bss*)) + KEEP(*rte_rtu.o (COMMON)) + . = ALIGN(4); + _e_rte_bss = .; /* define a global symbol at bss start */ + __bss_rte_end__ = _e_rte_bss; + } >RAM2 + + /* used by the startup to initialize data */ + _si_rte_data = LOADADDR(.rte_data); + + .rte_data : + { + _s_rte_data = .; /* create a global symbol at data start */ + . = ALIGN(8); + KEEP(*rte_wx.o (.data)) + KEEP(*rte_wx.o (.data*)) + KEEP(*rte_main.o (.data)) + KEEP(*rte_main.o (.data*)) + KEEP(*rte_rtu.o (.data)) + KEEP(*rte_rtu.o (.data*)) + . = ALIGN(8); + _e_rte_data = .; /* create a global symbol at data start */ + } >RAM2 AT> FLASH + /* User_heap_stack section, used to check that there is enough RAM left */ ._user_heap_stack : { diff --git a/system/src/cmsis/stm32l4xx/startup_stm32l471xx.S b/system/src/cmsis/stm32l4xx/startup_stm32l471xx.S index a647381..7b549db 100644 --- a/system/src/cmsis/stm32l4xx/startup_stm32l471xx.S +++ b/system/src/cmsis/stm32l4xx/startup_stm32l471xx.S @@ -65,7 +65,8 @@ Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit -/* Copy the data segment initializers from flash to SRAM */ +/* Main BSS and DATA section initialization */ +// DATA movs r1, #0 b LoopCopyDataInit @@ -81,9 +82,10 @@ LoopCopyDataInit: adds r2, r0, r1 cmp r2, r3 bcc CopyDataInit + +// BSS ldr r2, =_sbss b LoopFillZerobss -/* Zero fill the bss segment. */ FillZerobss: movs r3, #0 str r3, [r2], #4 @@ -92,6 +94,42 @@ LoopFillZerobss: ldr r3, = _ebss cmp r2, r3 bcc FillZerobss +/* !!! END !!! Main BSS and DATA section initialization */ + + +/* RAM2 rte BSS and DATA section initialization */ + +// DATA + movs r1, #0 + b LoopCopyDataInitRte + +CopyDataInitRte: + ldr r3, =_si_rte_data + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInitRte: + ldr r0, =_s_rte_data + ldr r3, =_e_rte_data + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInitRte + +// BSS + ldr r2, =_s_rte_bss + b LoopFillZerobssRte +FillZerobssRte: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobssRte: + ldr r3, = _e_rte_bss + cmp r2, r3 + bcc FillZerobssRte + +/* END!!! RAM2 rte BSS and DATA section initialization */ + /* Call static constructors */ bl __libc_init_array