kopia lustrzana https://github.com/jgromes/RadioLib
278 wiersze
7.7 KiB
C++
278 wiersze
7.7 KiB
C++
#include "RF69.h"
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RF69::RF69(Module* module) {
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_mod = module;
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}
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uint8_t RF69::begin(float freq) {
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// set module properties
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_mod->init(USE_SPI, INT_0);
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// try to find the RF69 chip
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uint8_t i = 0;
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bool flagFound = false;
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while((i < 10) && !flagFound) {
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uint8_t version = _mod->SPIreadRegister(RF69_REG_VERSION);
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if(version == 0x24) {
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flagFound = true;
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} else {
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#ifdef KITELIB_DEBUG
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Serial.print("RF69 not found! (");
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Serial.print(i + 1);
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Serial.print(" of 10 tries) RF69_REG_VERSION == ");
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char buffHex[5];
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sprintf(buffHex, "0x%02X", version);
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Serial.print(buffHex);
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Serial.println();
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#endif
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delay(1000);
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i++;
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}
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}
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if(!flagFound) {
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DEBUG_PRINTLN_STR("No RF69 found!");
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SPI.end();
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return(ERR_CHIP_NOT_FOUND);
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} else {
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DEBUG_PRINTLN_STR("Found RF69! (match by RF69_REG_VERSION == 0x24)");
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}
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return(config(freq));
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}
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uint8_t RF69::transmit(Packet& pack) {
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// check packet length
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if(pack.length >= 256) {
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return(ERR_PACKET_TOO_LONG);
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}
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// set mode to standby
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setMode(RF69_STANDBY);
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// set DIO pin mapping
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_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PACKET_SENT, 7, 6);
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// clear interrupt flags
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clearIRQFlags();
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// set packet length
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_mod->SPIwriteRegister(RF69_REG_FIFO, pack.length);
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// write packet to FIFO
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_mod->SPIwriteRegisterBurstStr(RF69_REG_FIFO, pack.source, 8);
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_mod->SPIwriteRegisterBurstStr(RF69_REG_FIFO, pack.destination, 8);
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_mod->SPIwriteRegisterBurstStr(RF69_REG_FIFO, pack.data, pack.length - 16);
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// set mode to transmit
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setMode(RF69_TX);
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_mod->SPIsetRegValue(RF69_REG_TEST_PA1, RF69_PA1_20_DBM);
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_mod->SPIsetRegValue(RF69_REG_TEST_PA2, RF69_PA2_20_DBM);
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// wait for transmission end
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while(!_mod->getInt0State());
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// clear interrupt flags
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clearIRQFlags();
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return(ERR_NONE);
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}
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uint8_t RF69::receive(Packet& pack) {
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// set mode to standby
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setMode(RF69_STANDBY);
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// set DIO pin mapping
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_mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_1, RF69_DIO0_PACK_PAYLOAD_READY | RF69_DIO1_PACK_TIMEOUT, 7, 4);
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// clear interrupt flags
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clearIRQFlags();
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// set mode to receive
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setMode(RF69_RX);
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_mod->SPIsetRegValue(RF69_REG_TEST_PA1, RF69_PA1_NORMAL);
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_mod->SPIsetRegValue(RF69_REG_TEST_PA2, RF69_PA2_NORMAL);
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// wait for packet reception or timeout
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while(!_mod->getInt0State()) {
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if(_mod->getInt1State()) {
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clearIRQFlags();
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return(ERR_RX_TIMEOUT);
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}
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}
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// read packet length
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pack.length = _mod->SPIreadRegister(RF69_REG_FIFO);
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// read packet addresses
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_mod->SPIreadRegisterBurstStr(RF69_REG_FIFO, 8, pack.source);
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_mod->SPIreadRegisterBurstStr(RF69_REG_FIFO, 8, pack.destination);
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// read packet data
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delete[] pack.data;
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pack.data = new char[pack.length - 15];
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_mod->SPIreadRegisterBurstStr(RF69_REG_FIFO, pack.length - 16, pack.data);
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pack.data[pack.length - 16] = 0;
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// clear interrupt flags
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clearIRQFlags();
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return(ERR_NONE);
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}
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uint8_t RF69::sleep() {
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return(setMode(RF69_SLEEP));
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}
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uint8_t RF69::standby() {
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return(setMode(RF69_STANDBY));
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}
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uint8_t RF69::config(float freq) {
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uint8_t status = ERR_NONE;
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if(!((freq > 290.0) && (freq < 340.0) ||
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(freq > 431.0) && (freq < 510.0) ||
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(freq > 862.0) && (freq < 1020.0))) {
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return(ERR_INVALID_FREQUENCY);
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}
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//set mode to STANDBY
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status = setMode(RF69_STANDBY);
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if(status != ERR_NONE) {
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return(status);
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}
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//set operation modes
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status = _mod->SPIsetRegValue(RF69_REG_OP_MODE, RF69_SEQUENCER_ON | RF69_LISTEN_OFF, 7, 6);
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if(status != ERR_NONE) {
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return(status);
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}
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//enable over-current protection
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status = _mod->SPIsetRegValue(RF69_REG_OCP, RF69_OCP_ON, 4, 4);
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if(status != ERR_NONE) {
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return(status);
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}
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//set data mode and modulation type
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status = _mod->SPIsetRegValue(RF69_REG_DATA_MODUL, RF69_PACKET_MODE | RF69_FSK, 6, 3);
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status = _mod->SPIsetRegValue(RF69_REG_DATA_MODUL, RF69_NO_SHAPING, 1, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set bit rate (4.8 kbps by default)
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status = _mod->SPIsetRegValue(RF69_REG_BITRATE_MSB, RF69_BITRATE_MSB, 7, 0);
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status = _mod->SPIsetRegValue(RF69_REG_BITRATE_LSB, RF69_BITRATE_LSB, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set allowed frequency deviation (5 kHz by default)
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status = _mod->SPIsetRegValue(RF69_REG_FDEV_MSB, RF69_FDEV_MSB, 5, 0);
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status = _mod->SPIsetRegValue(RF69_REG_FDEV_LSB, RF69_FDEV_LSB, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set carrier frequency
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uint32_t base = 1;
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uint32_t FRF = (freq * (base << 19)) / 32.0;
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status = _mod->SPIsetRegValue(RF69_REG_FRF_MSB, (FRF & 0xFF0000) >> 16, 7, 0);
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status = _mod->SPIsetRegValue(RF69_REG_FRF_MID, (FRF & 0x00FF00) >> 8, 7, 0);
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status = _mod->SPIsetRegValue(RF69_REG_FRF_LSB, FRF & 0x0000FF, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set Rx bandwidth
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status = _mod->SPIsetRegValue(RF69_REG_RX_BW, RF69_DCC_FREQ | RF69_RX_BW_MANT_16 | RF69_RX_BW_EXP, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set RSSI threshold
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status = _mod->SPIsetRegValue(RF69_REG_RSSI_THRESH, RF69_RSSI_THRESHOLD, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//reset FIFO flags
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status = _mod->SPIsetRegValue(RF69_REG_IRQ_FLAGS_2, RF69_IRQ_FIFO_OVERRUN, 4, 4);
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if(status != ERR_NONE) {
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return(status);
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}
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//disable ClkOut on DIO5
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status = _mod->SPIsetRegValue(RF69_REG_DIO_MAPPING_2, RF69_CLK_OUT_OFF, 2, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set synchronization
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status = _mod->SPIsetRegValue(RF69_REG_SYNC_CONFIG, RF69_SYNC_ON | RF69_FIFO_FILL_CONDITION_SYNC | RF69_SYNC_SIZE | RF69_SYNC_TOL, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set sync word
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status = _mod->SPIsetRegValue(RF69_REG_SYNC_VALUE_1, 0x2D, 7, 0);
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status = _mod->SPIsetRegValue(RF69_REG_SYNC_VALUE_2, 100, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set packet configuration and disable encryption
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status = _mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_1, RF69_PACKET_FORMAT_VARIABLE | RF69_DC_FREE_NONE | RF69_CRC_ON | RF69_CRC_AUTOCLEAR_ON | RF69_ADDRESS_FILTERING_OFF, 7, 1);
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status = _mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_2, RF69_INTER_PACKET_RX_DELAY, 7, 4);
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status = _mod->SPIsetRegValue(RF69_REG_PACKET_CONFIG_2, RF69_AUTO_RX_RESTART_ON | RF69_AES_OFF, 1, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set payload length
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status = _mod->SPIsetRegValue(RF69_REG_PAYLOAD_LENGTH, RF69_PAYLOAD_LENGTH, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set FIFO threshold
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status = _mod->SPIsetRegValue(RF69_REG_FIFO_THRESH, RF69_TX_START_CONDITION_FIFO_NOT_EMPTY | RF69_FIFO_THRESHOLD, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set output power
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status = _mod->SPIsetRegValue(RF69_REG_PA_LEVEL, RF69_PA0_ON | RF69_PA1_OFF | RF69_PA2_OFF | RF69_OUTPUT_POWER, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//set Rx timeouts
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status = _mod->SPIsetRegValue(RF69_REG_RX_TIMEOUT_1, RF69_TIMEOUT_RX_START, 7, 0);
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status = _mod->SPIsetRegValue(RF69_REG_RX_TIMEOUT_2, RF69_TIMEOUT_RSSI_THRESH, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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//enable improved fading margin
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status = _mod->SPIsetRegValue(RF69_REG_TEST_DAGC, RF69_CONTINUOUS_DAGC_LOW_BETA_OFF, 7, 0);
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if(status != ERR_NONE) {
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return(status);
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}
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return(ERR_NONE);
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}
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uint8_t RF69::setMode(uint8_t mode) {
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_mod->SPIsetRegValue(RF69_REG_OP_MODE, mode, 4, 2);
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return(ERR_NONE);
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}
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void RF69::clearIRQFlags() {
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_mod->SPIwriteRegister(RF69_REG_IRQ_FLAGS_1, 0b11111111);
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_mod->SPIwriteRegister(RF69_REG_IRQ_FLAGS_2, 0b11111111);
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}
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