mirror
/
RadioLib
kopia lustrzana https://github.com/jgromes/RadioLib
1
0
Forkuj 0
Kod Zgłoszenia Projekty Wydania Wiki Aktywność

[Si443x] Update to 5.0.0

pull/406/head
jgromes 2021-11-14 11:42:52 +01:00
rodzic 1126e64587
commit eb9903f183
10 zmienionych plików z 653 dodań i 647 usunięć
Pokaż statystyki Ściągnij plik aktualizacji Ściągnij plik porównania Expand all files Collapse all files

8
examples/Si443x/Si443x_Receive/Si443x_Receive.ino
Wyświetl plik

@ -37,7 +37,7 @@ void setup() {
// initialize Si4432 with default settings
Serial.print(F("[Si4432] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -59,7 +59,7 @@ void loop() {
int state = radio.receive(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// packet was successfully received
Serial.println(F("success!"));
@ -67,11 +67,11 @@ void loop() {
Serial.print(F("[Si4432] Data:\t\t"));
Serial.println(str);
} else if (state == ERR_RX_TIMEOUT) {
} else if (state == RADIOLIB_ERR_RX_TIMEOUT) {
// timeout occurred while waiting for a packet
Serial.println(F("timeout!"));
} else if (state == ERR_CRC_MISMATCH) {
} else if (state == RADIOLIB_ERR_CRC_MISMATCH) {
// packet was received, but is malformed
Serial.println(F("CRC error!"));

8
examples/Si443x/Si443x_Receive_Interrupt/Si443x_Receive_Interrupt.ino
Wyświetl plik

@ -33,7 +33,7 @@ void setup() {
// initialize Si4432 with default settings
Serial.print(F("[Si4432] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -48,7 +48,7 @@ void setup() {
// start listening for packets
Serial.print(F("[Si4432] Starting to listen ... "));
state = radio.startReceive();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -106,7 +106,7 @@ void loop() {
int state = radio.readData(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// packet was successfully received
Serial.println(F("[Si4432] Received packet!"));
@ -114,7 +114,7 @@ void loop() {
Serial.print(F("[Si4432] Data:\t\t\t"));
Serial.println(str);
} else if (state == ERR_CRC_MISMATCH) {
} else if (state == RADIOLIB_ERR_CRC_MISMATCH) {
// packet was received, but is malformed
Serial.println(F("CRC error!"));

18
examples/Si443x/Si443x_Settings/Si443x_Settings.ino
Wyświetl plik

@ -43,7 +43,7 @@ void setup() {
// initialize Si4432 with default settings
Serial.print(F("[Si4432] Initializing ... "));
int state = radio1.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -60,7 +60,7 @@ void setup() {
// output power: 17 dBm
// preamble length: 32 bits
state = radio2.begin(868.0, 200.0, 60.0, 335.5, 17, 32);
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -72,17 +72,17 @@ void setup() {
// and check if the configuration was changed successfully
// set carrier frequency to 433.5 MHz
if (radio1.setFrequency(433.5) == ERR_INVALID_FREQUENCY) {
if (radio1.setFrequency(433.5) == RADIOLIB_ERR_INVALID_FREQUENCY) {
Serial.println(F("[Si4432] Selected frequency is invalid for this module!"));
while (true);
}
// set bit rate to 100.0 kbps
state = radio1.setBitRate(100.0);
if (state == ERR_INVALID_BIT_RATE) {
if (state == RADIOLIB_ERR_INVALID_BIT_RATE) {
Serial.println(F("[Si4432] Selected bit rate is invalid for this module!"));
while (true);
} else if (state == ERR_INVALID_BIT_RATE_BW_RATIO) {
} else if (state == RADIOLIB_ERR_INVALID_BIT_RATE_BW_RATIO) {
Serial.println(F("[Si4432] Selected bit rate to bandwidth ratio is invalid!"));
Serial.println(F("[Si4432] Increase receiver bandwidth to set this bit rate."));
while (true);
@ -90,19 +90,19 @@ void setup() {
// set receiver bandwidth to 284.8 kHz
state = radio1.setRxBandwidth(284.8);
if (state == ERR_INVALID_RX_BANDWIDTH) {
if (state == RADIOLIB_ERR_INVALID_RX_BANDWIDTH) {
Serial.println(F("[Si4432] Selected receiver bandwidth is invalid for this module!"));
while (true);
}
// set frequency deviation to 10.0 kHz
if (radio1.setFrequencyDeviation(10.0) == ERR_INVALID_FREQUENCY_DEVIATION) {
if (radio1.setFrequencyDeviation(10.0) == RADIOLIB_ERR_INVALID_FREQUENCY_DEVIATION) {
Serial.println(F("[Si4432] Selected frequency deviation is invalid for this module!"));
while (true);
}
// set output power to 2 dBm
if (radio1.setOutputPower(2) == ERR_INVALID_OUTPUT_POWER) {
if (radio1.setOutputPower(2) == RADIOLIB_ERR_INVALID_OUTPUT_POWER) {
Serial.println(F("[Si4432] Selected output power is invalid for this module!"));
while (true);
}
@ -110,7 +110,7 @@ void setup() {
// up to 4 bytes can be set as sync word
// set sync word to 0x01234567
uint8_t syncWord[] = {0x01, 0x23, 0x45, 0x67};
if (radio1.setSyncWord(syncWord, 4) == ERR_INVALID_SYNC_WORD) {
if (radio1.setSyncWord(syncWord, 4) == RADIOLIB_ERR_INVALID_SYNC_WORD) {
Serial.println(F("[Si4432] Selected sync word is invalid for this module!"));
while (true);
}

8
examples/Si443x/Si443x_Transmit/Si443x_Transmit.ino
Wyświetl plik

@ -35,7 +35,7 @@ void setup() {
// initialize Si4432 with default settings
Serial.print(F("[Si4432] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -60,15 +60,15 @@ void loop() {
int state = radio.transmit(byteArr, 8);
*/
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
// the packet was successfully transmitted
Serial.println(F(" success!"));
} else if (state == ERR_PACKET_TOO_LONG) {
} else if (state == RADIOLIB_ERR_PACKET_TOO_LONG) {
// the supplied packet was longer than 256 bytes
Serial.println(F(" too long!"));
} else if (state == ERR_TX_TIMEOUT) {
} else if (state == RADIOLIB_ERR_TX_TIMEOUT) {
// timeout occured while transmitting packet
Serial.println(F(" timeout!"));

6
examples/Si443x/Si443x_Transmit_Interrupt/Si443x_Transmit_Interrupt.ino
Wyświetl plik

@ -30,7 +30,7 @@ Si4432 radio = new Module(10, 2, 9);
//Si4432 radio = RadioShield.ModuleA;
// save transmission state between loops
int transmissionState = ERR_NONE;
int transmissionState = RADIOLIB_ERR_NONE;
void setup() {
Serial.begin(9600);
@ -38,7 +38,7 @@ void setup() {
// initialize Si4432 with default settings
Serial.print(F("[Si4432] Initializing ... "));
int state = radio.begin();
if (state == ERR_NONE) {
if (state == RADIOLIB_ERR_NONE) {
Serial.println(F("success!"));
} else {
Serial.print(F("failed, code "));
@ -95,7 +95,7 @@ void loop() {
// reset flag
transmittedFlag = false;
if (transmissionState == ERR_NONE) {
if (transmissionState == RADIOLIB_ERR_NONE) {
// packet was successfully sent
Serial.println(F("transmission finished!"));

6
src/modules/Si443x/Si4430.cpp
Wyświetl plik

@ -22,17 +22,17 @@ int16_t Si4430::begin(float freq, float br, float freqDev, float rxBw, int8_t po
}
int16_t Si4430::setFrequency(float freq) {
RADIOLIB_CHECK_RANGE(freq, 900.0, 960.0, ERR_INVALID_FREQUENCY);
RADIOLIB_CHECK_RANGE(freq, 900.0, 960.0, RADIOLIB_ERR_INVALID_FREQUENCY);
// set frequency
return(Si443x::setFrequencyRaw(freq));
}
int16_t Si4430::setOutputPower(int8_t power) {
RADIOLIB_CHECK_RANGE(power, -8, 13, ERR_INVALID_OUTPUT_POWER);
RADIOLIB_CHECK_RANGE(power, -8, 13, RADIOLIB_ERR_INVALID_OUTPUT_POWER);
// set output power
return(_mod->SPIsetRegValue(SI443X_REG_TX_POWER, (uint8_t)((power + 8) / 3), 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_TX_POWER, (uint8_t)((power + 8) / 3), 2, 0));
}
#endif

4
src/modules/Si443x/Si4431.cpp
Wyświetl plik

@ -22,10 +22,10 @@ int16_t Si4431::begin(float freq, float br, float freqDev, float rxBw, int8_t po
}
int16_t Si4431::setOutputPower(int8_t power) {
RADIOLIB_CHECK_RANGE(power, -8, 13, ERR_INVALID_OUTPUT_POWER);
RADIOLIB_CHECK_RANGE(power, -8, 13, RADIOLIB_ERR_INVALID_OUTPUT_POWER);
// set output power
return(_mod->SPIsetRegValue(SI443X_REG_TX_POWER, (uint8_t)((power + 8) / 3), 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_TX_POWER, (uint8_t)((power + 8) / 3), 2, 0));
}
#endif

6
src/modules/Si443x/Si4432.cpp
Wyświetl plik

@ -22,17 +22,17 @@ int16_t Si4432::begin(float freq, float br, float freqDev, float rxBw, int8_t po
}
int16_t Si4432::setFrequency(float freq) {
RADIOLIB_CHECK_RANGE(freq, 240.0, 930.0, ERR_INVALID_FREQUENCY);
RADIOLIB_CHECK_RANGE(freq, 240.0, 930.0, RADIOLIB_ERR_INVALID_FREQUENCY);
// set frequency
return(Si443x::setFrequencyRaw(freq));
}
int16_t Si4432::setOutputPower(int8_t power) {
RADIOLIB_CHECK_RANGE(power, -1, 20, ERR_INVALID_OUTPUT_POWER);
RADIOLIB_CHECK_RANGE(power, -1, 20, RADIOLIB_ERR_INVALID_OUTPUT_POWER);
// set output power
return(_mod->SPIsetRegValue(SI443X_REG_TX_POWER, (uint8_t)((power + 1) / 3), 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_TX_POWER, (uint8_t)((power + 1) / 3), 2, 0));
}
#endif

284
src/modules/Si443x/Si443x.cpp
Wyświetl plik

@ -1,28 +1,32 @@
#include "Si443x.h"
#if !defined(RADIOLIB_EXCLUDE_SI443X)
Si443x::Si443x(Module* mod) : PhysicalLayer(SI443X_FREQUENCY_STEP_SIZE, SI443X_MAX_PACKET_LENGTH) {
Si443x::Si443x(Module* mod) : PhysicalLayer(RADIOLIB_SI443X_FREQUENCY_STEP_SIZE, RADIOLIB_SI443X_MAX_PACKET_LENGTH) {
_mod = mod;
}
Module* Si443x::getMod() {
return(_mod);
}
int16_t Si443x::begin(float br, float freqDev, float rxBw, uint8_t preambleLen) {
// set module properties
_mod->init(RADIOLIB_USE_SPI);
Module::pinMode(_mod->getIrq(), INPUT);
Module::pinMode(_mod->getRst(), OUTPUT);
Module::digitalWrite(_mod->getRst(), LOW);
_mod->init();
_mod->pinMode(_mod->getIrq(), INPUT);
_mod->pinMode(_mod->getRst(), OUTPUT);
_mod->digitalWrite(_mod->getRst(), LOW);
// try to find the Si443x chip
if(!Si443x::findChip()) {
RADIOLIB_DEBUG_PRINTLN(F("No Si443x found!"));
_mod->term(RADIOLIB_USE_SPI);
return(ERR_CHIP_NOT_FOUND);
_mod->term();
return(RADIOLIB_ERR_CHIP_NOT_FOUND);
} else {
RADIOLIB_DEBUG_PRINTLN(F("M\tSi443x"));
}
// reset the device
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_SOFTWARE_RESET);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_SOFTWARE_RESET);
// clear POR interrupt
clearIRQFlags();
@ -61,11 +65,11 @@ int16_t Si443x::begin(float br, float freqDev, float rxBw, uint8_t preambleLen)
}
void Si443x::reset() {
Module::pinMode(_mod->getRst(), OUTPUT);
Module::digitalWrite(_mod->getRst(), HIGH);
Module::delay(1);
Module::digitalWrite(_mod->getRst(), LOW);
Module::delay(100);
_mod->pinMode(_mod->getRst(), OUTPUT);
_mod->digitalWrite(_mod->getRst(), HIGH);
_mod->delay(1);
_mod->digitalWrite(_mod->getRst(), LOW);
_mod->delay(100);
}
int16_t Si443x::transmit(uint8_t* data, size_t len, uint8_t addr) {
@ -77,13 +81,13 @@ int16_t Si443x::transmit(uint8_t* data, size_t len, uint8_t addr) {
RADIOLIB_ASSERT(state);
// wait for transmission end or timeout
uint32_t start = Module::micros();
while(Module::digitalRead(_mod->getIrq())) {
Module::yield();
if(Module::micros() - start > timeout) {
uint32_t start = _mod->micros();
while(_mod->digitalRead(_mod->getIrq())) {
_mod->yield();
if(_mod->micros() - start > timeout) {
standby();
clearIRQFlags();
return(ERR_TX_TIMEOUT);
return(RADIOLIB_ERR_TX_TIMEOUT);
}
}
@ -98,19 +102,19 @@ int16_t Si443x::transmit(uint8_t* data, size_t len, uint8_t addr) {
int16_t Si443x::receive(uint8_t* data, size_t len) {
// calculate timeout (500 ms + 400 full 64-byte packets at current bit rate)
uint32_t timeout = 500000 + (1.0/(_br*1000.0))*(SI443X_MAX_PACKET_LENGTH*400.0);
uint32_t timeout = 500000 + (1.0/(_br*1000.0))*(RADIOLIB_SI443X_MAX_PACKET_LENGTH*400.0);
// start reception
int16_t state = startReceive();
RADIOLIB_ASSERT(state);
// wait for packet reception or timeout
uint32_t start = Module::micros();
while(Module::digitalRead(_mod->getIrq())) {
if(Module::micros() - start > timeout) {
uint32_t start = _mod->micros();
while(_mod->digitalRead(_mod->getIrq())) {
if(_mod->micros() - start > timeout) {
standby();
clearIRQFlags();
return(ERR_RX_TIMEOUT);
return(RADIOLIB_ERR_RX_TIMEOUT);
}
}
@ -123,13 +127,13 @@ int16_t Si443x::sleep() {
_mod->setRfSwitchState(LOW, LOW);
// disable wakeup timer interrupt
int16_t state = _mod->SPIsetRegValue(SI443X_REG_INTERRUPT_ENABLE_1, 0x00);
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_INTERRUPT_ENABLE_1, 0x00);
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
RADIOLIB_ASSERT(state);
// enable wakeup timer to set mode to sleep
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_ENABLE_WAKEUP_TIMER);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_ENABLE_WAKEUP_TIMER);
return(state);
}
@ -138,7 +142,7 @@ int16_t Si443x::standby() {
// set RF switch (if present)
_mod->setRfSwitchState(LOW, LOW);
return(_mod->SPIsetRegValue(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_XTAL_ON, 7, 0, 10));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_XTAL_ON, 7, 0, 10));
}
int16_t Si443x::transmitDirect(uint32_t frf) {
@ -152,10 +156,10 @@ int16_t Si443x::transmitDirect(uint32_t frf) {
float newFreq = frf / 6400.0;
// check high/low band
uint8_t bandSelect = SI443X_BAND_SELECT_LOW;
uint8_t bandSelect = RADIOLIB_SI443X_BAND_SELECT_LOW;
uint8_t freqBand = (newFreq / 10) - 24;
if(newFreq >= 480.0) {
bandSelect = SI443X_BAND_SELECT_HIGH;
bandSelect = RADIOLIB_SI443X_BAND_SELECT_HIGH;
freqBand = (newFreq / 20) - 24;
}
@ -163,15 +167,15 @@ int16_t Si443x::transmitDirect(uint32_t frf) {
uint16_t freqCarrier = ((newFreq / (10 * ((bandSelect >> 5) + 1))) - freqBand - 24) * (uint32_t)64000;
// update registers
_mod->SPIwriteRegister(SI443X_REG_FREQUENCY_BAND_SELECT, SI443X_SIDE_BAND_SELECT_LOW | bandSelect | freqBand);
_mod->SPIwriteRegister(SI443X_REG_NOM_CARRIER_FREQUENCY_1, (uint8_t)((freqCarrier & 0xFF00) >> 8));
_mod->SPIwriteRegister(SI443X_REG_NOM_CARRIER_FREQUENCY_0, (uint8_t)(freqCarrier & 0xFF));
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_FREQUENCY_BAND_SELECT, RADIOLIB_SI443X_SIDE_BAND_SELECT_LOW | bandSelect | freqBand);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_NOM_CARRIER_FREQUENCY_1, (uint8_t)((freqCarrier & 0xFF00) >> 8));
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_NOM_CARRIER_FREQUENCY_0, (uint8_t)(freqCarrier & 0xFF));
// start direct transmission
directMode();
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_TX_ON | SI443X_XTAL_ON);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_TX_ON | RADIOLIB_SI443X_XTAL_ON);
return(ERR_NONE);
return(RADIOLIB_ERR_NONE);
}
// activate direct mode
@ -179,7 +183,7 @@ int16_t Si443x::transmitDirect(uint32_t frf) {
RADIOLIB_ASSERT(state);
// start transmitting
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_TX_ON | SI443X_XTAL_ON);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_TX_ON | RADIOLIB_SI443X_XTAL_ON);
return(state);
}
@ -192,29 +196,29 @@ int16_t Si443x::receiveDirect() {
RADIOLIB_ASSERT(state);
// start receiving
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_RX_ON | SI443X_XTAL_ON);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_RX_ON | RADIOLIB_SI443X_XTAL_ON);
return(state);
}
int16_t Si443x::packetMode() {
int16_t state = _mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_2, SI443X_MODULATION_FSK, 1, 0);
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_2, RADIOLIB_SI443X_MODULATION_FSK, 1, 0);
RADIOLIB_ASSERT(state);
return(_mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_2, SI443X_TX_DATA_SOURCE_FIFO, 5, 4));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_2, RADIOLIB_SI443X_TX_DATA_SOURCE_FIFO, 5, 4));
}
void Si443x::setIrqAction(void (*func)(void)) {
Module::attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()), func, FALLING);
_mod->attachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()), func, FALLING);
}
void Si443x::clearIrqAction() {
Module::detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()));
_mod->detachInterrupt(RADIOLIB_DIGITAL_PIN_TO_INTERRUPT(_mod->getIrq()));
}
int16_t Si443x::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
// check packet length
if(len > SI443X_MAX_PACKET_LENGTH) {
return(ERR_PACKET_TOO_LONG);
if(len > RADIOLIB_SI443X_MAX_PACKET_LENGTH) {
return(RADIOLIB_ERR_PACKET_TOO_LONG);
}
// set mode to standby
@ -222,31 +226,31 @@ int16_t Si443x::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
RADIOLIB_ASSERT(state);
// clear Tx FIFO
_mod->SPIsetRegValue(SI443X_REG_OP_FUNC_CONTROL_2, SI443X_TX_FIFO_RESET, 0, 0);
_mod->SPIsetRegValue(SI443X_REG_OP_FUNC_CONTROL_2, SI443X_TX_FIFO_CLEAR, 0, 0);
_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_2, RADIOLIB_SI443X_TX_FIFO_RESET, 0, 0);
_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_2, RADIOLIB_SI443X_TX_FIFO_CLEAR, 0, 0);
// clear interrupt flags
clearIRQFlags();
// set packet length
/// \todo variable packet length
_mod->SPIwriteRegister(SI443X_REG_TRANSMIT_PACKET_LENGTH, len);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_TRANSMIT_PACKET_LENGTH, len);
/// \todo use header as address field?
(void)addr;
// write packet to FIFO
_mod->SPIwriteRegisterBurst(SI443X_REG_FIFO_ACCESS, data, len);
_mod->SPIwriteRegisterBurst(RADIOLIB_SI443X_REG_FIFO_ACCESS, data, len);
// set RF switch (if present)
_mod->setRfSwitchState(LOW, HIGH);
// set interrupt mapping
_mod->SPIwriteRegister(SI443X_REG_INTERRUPT_ENABLE_1, SI443X_PACKET_SENT_ENABLED);
_mod->SPIwriteRegister(SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_INTERRUPT_ENABLE_1, RADIOLIB_SI443X_PACKET_SENT_ENABLED);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
// set mode to transmit
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_TX_ON | SI443X_XTAL_ON);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_TX_ON | RADIOLIB_SI443X_XTAL_ON);
return(state);
}
@ -257,8 +261,8 @@ int16_t Si443x::startReceive() {
RADIOLIB_ASSERT(state);
// clear Rx FIFO
_mod->SPIsetRegValue(SI443X_REG_OP_FUNC_CONTROL_2, SI443X_RX_FIFO_RESET, 1, 1);
_mod->SPIsetRegValue(SI443X_REG_OP_FUNC_CONTROL_2, SI443X_RX_FIFO_CLEAR, 1, 1);
_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_2, RADIOLIB_SI443X_RX_FIFO_RESET, 1, 1);
_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_2, RADIOLIB_SI443X_RX_FIFO_CLEAR, 1, 1);
// clear interrupt flags
clearIRQFlags();
@ -267,11 +271,11 @@ int16_t Si443x::startReceive() {
_mod->setRfSwitchState(HIGH, LOW);
// set interrupt mapping
_mod->SPIwriteRegister(SI443X_REG_INTERRUPT_ENABLE_1, SI443X_VALID_PACKET_RECEIVED_ENABLED | SI443X_CRC_ERROR_ENABLED);
_mod->SPIwriteRegister(SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_INTERRUPT_ENABLE_1, RADIOLIB_SI443X_VALID_PACKET_RECEIVED_ENABLED | RADIOLIB_SI443X_CRC_ERROR_ENABLED);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
// set mode to receive
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_RX_ON | SI443X_XTAL_ON);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_RX_ON | RADIOLIB_SI443X_XTAL_ON);
return(state);
}
@ -282,12 +286,12 @@ int16_t Si443x::readData(uint8_t* data, size_t len) {
// get packet length
size_t length = len;
if(len == SI443X_MAX_PACKET_LENGTH) {
if(len == RADIOLIB_SI443X_MAX_PACKET_LENGTH) {
length = getPacketLength();
}
// read packet data
_mod->SPIreadRegisterBurst(SI443X_REG_FIFO_ACCESS, length, data);
_mod->SPIreadRegisterBurst(RADIOLIB_SI443X_REG_FIFO_ACCESS, length, data);
// clear internal flag so getPacketLength can return the new packet length
_packetLengthQueried = false;
@ -299,18 +303,18 @@ int16_t Si443x::readData(uint8_t* data, size_t len) {
// clear interrupt flags
clearIRQFlags();
return(ERR_NONE);
return(RADIOLIB_ERR_NONE);
}
int16_t Si443x::setBitRate(float br) {
RADIOLIB_CHECK_RANGE(br, 0.123, 256.0, ERR_INVALID_BIT_RATE);
RADIOLIB_CHECK_RANGE(br, 0.123, 256.0, RADIOLIB_ERR_INVALID_BIT_RATE);
// check high data rate
uint8_t dataRateMode = SI443X_LOW_DATA_RATE_MODE;
uint8_t dataRateMode = RADIOLIB_SI443X_LOW_DATA_RATE_MODE;
uint8_t exp = 21;
if(br >= 30.0) {
// bit rate above 30 kbps
dataRateMode = SI443X_HIGH_DATA_RATE_MODE;
dataRateMode = RADIOLIB_SI443X_HIGH_DATA_RATE_MODE;
exp = 16;
}
@ -318,11 +322,11 @@ int16_t Si443x::setBitRate(float br) {
uint16_t txDr = (br * ((uint32_t)1 << exp)) / 1000.0;
// update registers
int16_t state = _mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_1, dataRateMode, 5, 5);
_mod->SPIwriteRegister(SI443X_REG_TX_DATA_RATE_1, (uint8_t)((txDr & 0xFF00) >> 8));
_mod->SPIwriteRegister(SI443X_REG_TX_DATA_RATE_0, (uint8_t)(txDr & 0xFF));
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_1, dataRateMode, 5, 5);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_TX_DATA_RATE_1, (uint8_t)((txDr & 0xFF00) >> 8));
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_TX_DATA_RATE_0, (uint8_t)(txDr & 0xFF));
if(state == ERR_NONE) {
if(state == RADIOLIB_ERR_NONE) {
_br = br;
}
RADIOLIB_ASSERT(state);
@ -340,16 +344,16 @@ int16_t Si443x::setFrequencyDeviation(float freqDev) {
newFreqDev = 0.625;
}
RADIOLIB_CHECK_RANGE(newFreqDev, 0.625, 320.0, ERR_INVALID_FREQUENCY_DEVIATION);
RADIOLIB_CHECK_RANGE(newFreqDev, 0.625, 320.0, RADIOLIB_ERR_INVALID_FREQUENCY_DEVIATION);
// calculate raw frequency deviation value
uint16_t fdev = (uint16_t)(newFreqDev / 0.625);
// update registers
int16_t state = _mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_2, (uint8_t)((fdev & 0x0100) >> 6), 2, 2);
_mod->SPIwriteRegister(SI443X_REG_FREQUENCY_DEVIATION, (uint8_t)(fdev & 0xFF));
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_2, (uint8_t)((fdev & 0x0100) >> 6), 2, 2);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_FREQUENCY_DEVIATION, (uint8_t)(fdev & 0xFF));
if(state == ERR_NONE) {
if(state == RADIOLIB_ERR_NONE) {
_freqDev = newFreqDev;
}
@ -357,12 +361,12 @@ int16_t Si443x::setFrequencyDeviation(float freqDev) {
}
int16_t Si443x::setRxBandwidth(float rxBw) {
RADIOLIB_CHECK_RANGE(rxBw, 2.6, 620.7, ERR_INVALID_RX_BANDWIDTH);
RADIOLIB_CHECK_RANGE(rxBw, 2.6, 620.7, RADIOLIB_ERR_INVALID_RX_BANDWIDTH);
// decide which approximation to use for decimation rate and filter tap calculation
uint8_t bypass = SI443X_BYPASS_DEC_BY_3_OFF;
uint8_t decRate = SI443X_IF_FILTER_DEC_RATE;
uint8_t filterSet = SI443X_IF_FILTER_COEFF_SET;
uint8_t bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_OFF;
uint8_t decRate = RADIOLIB_SI443X_IF_FILTER_DEC_RATE;
uint8_t filterSet = RADIOLIB_SI443X_IF_FILTER_COEFF_SET;
// this is the "well-behaved" section - can be linearly approximated
if((rxBw >= 2.6) && (rxBw <= 4.5)) {
@ -387,74 +391,74 @@ int16_t Si443x::setRxBandwidth(float rxBw) {
// this is the "Lord help thee who tread 'ere" section - no way to approximate this mess
/// \todo float tolerance equality as macro?
} else if(fabs(rxBw - 142.8) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 1;
filterSet = 4;
} else if(fabs(rxBw - 167.8) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 1;
filterSet = 5;
} else if(fabs(rxBw - 181.1) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 1;
filterSet = 6;
} else if(fabs(rxBw - 191.5) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 15;
} else if(fabs(rxBw - 225.1) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 1;
} else if(fabs(rxBw - 248.8) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 2;
} else if(fabs(rxBw - 269.3) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 3;
} else if(fabs(rxBw - 284.8) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 4;
} else if(fabs(rxBw -335.5) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 8;
} else if(fabs(rxBw - 391.8) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 9;
} else if(fabs(rxBw - 420.2) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 10;
} else if(fabs(rxBw - 468.4) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 11;
} else if(fabs(rxBw - 518.8) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 12;
} else if(fabs(rxBw - 577.0) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 13;
} else if(fabs(rxBw - 620.7) <= 0.001) {
bypass = SI443X_BYPASS_DEC_BY_3_ON;
bypass = RADIOLIB_SI443X_BYPASS_DEC_BY_3_ON;
decRate = 0;
filterSet = 14;
} else {
return(ERR_INVALID_RX_BANDWIDTH);
return(RADIOLIB_ERR_INVALID_RX_BANDWIDTH);
}
// shift decimation rate bits
decRate <<= 4;
// update register
int16_t state = _mod->SPIsetRegValue(SI443X_REG_IF_FILTER_BANDWIDTH, bypass | decRate | filterSet);
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_IF_FILTER_BANDWIDTH, bypass | decRate | filterSet);
RADIOLIB_ASSERT(state);
// update clock recovery
@ -464,18 +468,18 @@ int16_t Si443x::setRxBandwidth(float rxBw) {
}
int16_t Si443x::setSyncWord(uint8_t* syncWord, size_t len) {
RADIOLIB_CHECK_RANGE(len, 1, 4, ERR_INVALID_SYNC_WORD);
RADIOLIB_CHECK_RANGE(len, 1, 4, RADIOLIB_ERR_INVALID_SYNC_WORD);
// set mode to standby
int16_t state = standby();
RADIOLIB_ASSERT(state);
// set sync word length
state = _mod->SPIsetRegValue(SI443X_REG_HEADER_CONTROL_2, (uint8_t)(len - 1) << 1, 2, 1);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_HEADER_CONTROL_2, (uint8_t)(len - 1) << 1, 2, 1);
RADIOLIB_ASSERT(state);
// set sync word bytes
_mod->SPIwriteRegisterBurst(SI443X_REG_SYNC_WORD_3, syncWord, len);
_mod->SPIwriteRegisterBurst(RADIOLIB_SI443X_REG_SYNC_WORD_3, syncWord, len);
return(state);
}
@ -483,23 +487,23 @@ int16_t Si443x::setSyncWord(uint8_t* syncWord, size_t len) {
int16_t Si443x::setPreambleLength(uint8_t preambleLen) {
// Si443x configures preamble length in 4-bit nibbles
if(preambleLen % 4 != 0) {
return(ERR_INVALID_PREAMBLE_LENGTH);
return(RADIOLIB_ERR_INVALID_PREAMBLE_LENGTH);
}
// set default preamble length
uint8_t preLenNibbles = preambleLen / 4;
int16_t state = _mod->SPIsetRegValue(SI443X_REG_PREAMBLE_LENGTH, preLenNibbles);
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_PREAMBLE_LENGTH, preLenNibbles);
RADIOLIB_ASSERT(state);
// set default preamble detection threshold to 5/8 of preamble length (in units of 4 bits)
uint8_t preThreshold = 5*preLenNibbles / 8;
return(_mod->SPIsetRegValue(SI443X_REG_PREAMBLE_DET_CONTROL, preThreshold << 3, 7, 3));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_PREAMBLE_DET_CONTROL, preThreshold << 3, 7, 3));
}
size_t Si443x::getPacketLength(bool update) {
/// \todo variable length mode
if(!_packetLengthQueried && update) {
_packetLength = _mod->SPIreadRegister(SI443X_REG_RECEIVED_PACKET_LENGTH);
_packetLength = _mod->SPIreadRegister(RADIOLIB_SI443X_REG_RECEIVED_PACKET_LENGTH);
_packetLengthQueried = true;
}
@ -515,13 +519,13 @@ int16_t Si443x::setEncoding(uint8_t encoding) {
/// \todo - add inverted Manchester?
switch(encoding) {
case RADIOLIB_ENCODING_NRZ:
return(_mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_1, SI443X_MANCHESTER_INVERTED_OFF | SI443X_MANCHESTER_OFF | SI443X_WHITENING_OFF, 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_1, RADIOLIB_SI443X_MANCHESTER_INVERTED_OFF | RADIOLIB_SI443X_MANCHESTER_OFF | RADIOLIB_SI443X_WHITENING_OFF, 2, 0));
case RADIOLIB_ENCODING_MANCHESTER:
return(_mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_1, SI443X_MANCHESTER_INVERTED_OFF | SI443X_MANCHESTER_ON | SI443X_WHITENING_OFF, 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_1, RADIOLIB_SI443X_MANCHESTER_INVERTED_OFF | RADIOLIB_SI443X_MANCHESTER_ON | RADIOLIB_SI443X_WHITENING_OFF, 2, 0));
case RADIOLIB_ENCODING_WHITENING:
return(_mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_1, SI443X_MANCHESTER_INVERTED_OFF | SI443X_MANCHESTER_OFF | SI443X_WHITENING_ON, 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_1, RADIOLIB_SI443X_MANCHESTER_INVERTED_OFF | RADIOLIB_SI443X_MANCHESTER_OFF | RADIOLIB_SI443X_WHITENING_ON, 2, 0));
default:
return(ERR_INVALID_ENCODING);
return(RADIOLIB_ERR_INVALID_ENCODING);
}
}
@ -533,14 +537,14 @@ int16_t Si443x::setDataShaping(uint8_t sh) {
// set data shaping
switch(sh) {
case RADIOLIB_SHAPING_NONE:
return(_mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_1, SI443X_MANCHESTER_INVERTED_OFF | SI443X_MANCHESTER_OFF | SI443X_WHITENING_OFF, 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_1, RADIOLIB_SI443X_MANCHESTER_INVERTED_OFF | RADIOLIB_SI443X_MANCHESTER_OFF | RADIOLIB_SI443X_WHITENING_OFF, 2, 0));
case RADIOLIB_SHAPING_0_3:
case RADIOLIB_SHAPING_0_5:
case RADIOLIB_SHAPING_1_0:
/// \todo implement fiter configuration - docs claim this should be possible, but seems undocumented
return(_mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_1, SI443X_MANCHESTER_INVERTED_OFF | SI443X_MANCHESTER_OFF | SI443X_WHITENING_ON, 2, 0));
return(_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_1, RADIOLIB_SI443X_MANCHESTER_INVERTED_OFF | RADIOLIB_SI443X_MANCHESTER_OFF | RADIOLIB_SI443X_WHITENING_ON, 2, 0));
default:
return(ERR_INVALID_ENCODING);
return(RADIOLIB_ERR_INVALID_ENCODING);
}
}
@ -550,15 +554,15 @@ void Si443x::setRfSwitchPins(RADIOLIB_PIN_TYPE rxEn, RADIOLIB_PIN_TYPE txEn) {
uint8_t Si443x::randomByte() {
// set mode to Rx
_mod->SPIwriteRegister(SI443X_REG_OP_FUNC_CONTROL_1, SI443X_RX_ON | SI443X_XTAL_ON);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_OP_FUNC_CONTROL_1, RADIOLIB_SI443X_RX_ON | RADIOLIB_SI443X_XTAL_ON);
// wait a bit for the RSSI reading to stabilise
Module::delay(10);
_mod->delay(10);
// read RSSI value 8 times, always keep just the least significant bit
uint8_t randByte = 0x00;
for(uint8_t i = 0; i < 8; i++) {
randByte |= ((_mod->SPIreadRegister(SI443X_REG_RSSI) & 0x01) << i);
randByte |= ((_mod->SPIreadRegister(RADIOLIB_SI443X_REG_RSSI) & 0x01) << i);
}
// set mode to standby
@ -568,7 +572,7 @@ uint8_t Si443x::randomByte() {
}
int16_t Si443x::getChipVersion() {
return(_mod->SPIgetRegValue(SI443X_REG_DEVICE_VERSION));
return(_mod->SPIgetRegValue(RADIOLIB_SI443X_REG_DEVICE_VERSION));
}
void Si443x::setDirectAction(void (*func)(void)) {
@ -585,12 +589,12 @@ int16_t Si443x::setFrequencyRaw(float newFreq) {
RADIOLIB_ASSERT(state);
// check high/low band
uint8_t bandSelect = SI443X_BAND_SELECT_LOW;
uint8_t bandSelect = RADIOLIB_SI443X_BAND_SELECT_LOW;
uint8_t freqBand = (newFreq / 10) - 24;
uint8_t afcLimiter = 80;
_freq = newFreq;
if(newFreq >= 480.0) {
bandSelect = SI443X_BAND_SELECT_HIGH;
bandSelect = RADIOLIB_SI443X_BAND_SELECT_HIGH;
freqBand = (newFreq / 20) - 24;
afcLimiter = 40;
}
@ -599,10 +603,10 @@ int16_t Si443x::setFrequencyRaw(float newFreq) {
uint16_t freqCarrier = ((newFreq / (10 * ((bandSelect >> 5) + 1))) - freqBand - 24) * (uint32_t)64000;
// update registers
state = _mod->SPIsetRegValue(SI443X_REG_FREQUENCY_BAND_SELECT, bandSelect | freqBand, 5, 0);
state |= _mod->SPIsetRegValue(SI443X_REG_NOM_CARRIER_FREQUENCY_1, (uint8_t)((freqCarrier & 0xFF00) >> 8));
state |= _mod->SPIsetRegValue(SI443X_REG_NOM_CARRIER_FREQUENCY_0, (uint8_t)(freqCarrier & 0xFF));
state |= _mod->SPIsetRegValue(SI443X_REG_AFC_LIMITER, afcLimiter);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_FREQUENCY_BAND_SELECT, bandSelect | freqBand, 5, 0);
state |= _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_NOM_CARRIER_FREQUENCY_1, (uint8_t)((freqCarrier & 0xFF00) >> 8));
state |= _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_NOM_CARRIER_FREQUENCY_0, (uint8_t)(freqCarrier & 0xFF));
state |= _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_AFC_LIMITER, afcLimiter);
return(state);
}
@ -615,22 +619,22 @@ bool Si443x::findChip() {
reset();
// check version register
uint8_t version = _mod->SPIreadRegister(SI443X_REG_DEVICE_VERSION);
if(version == SI443X_DEVICE_VERSION) {
uint8_t version = _mod->SPIreadRegister(RADIOLIB_SI443X_REG_DEVICE_VERSION);
if(version == RADIOLIB_SI443X_DEVICE_VERSION) {
flagFound = true;
} else {
#ifdef RADIOLIB_DEBUG
#if defined(RADIOLIB_DEBUG)
RADIOLIB_DEBUG_PRINT(F("Si443x not found! ("));
RADIOLIB_DEBUG_PRINT(i + 1);
RADIOLIB_DEBUG_PRINT(F(" of 10 tries) SI443X_REG_DEVICE_VERSION == "));
RADIOLIB_DEBUG_PRINT(F(" of 10 tries) RADIOLIB_SI443X_REG_DEVICE_VERSION == "));
char buffHex[5];
sprintf(buffHex, "0x%02X", version);
RADIOLIB_DEBUG_PRINT(buffHex);
RADIOLIB_DEBUG_PRINT(F(", expected 0x00"));
RADIOLIB_DEBUG_PRINTLN(SI443X_DEVICE_VERSION, HEX);
RADIOLIB_DEBUG_PRINTLN(RADIOLIB_SI443X_DEVICE_VERSION, HEX);
#endif
Module::delay(10);
_mod->delay(10);
i++;
}
}
@ -640,7 +644,7 @@ bool Si443x::findChip() {
void Si443x::clearIRQFlags() {
uint8_t buff[2];
_mod->SPIreadRegisterBurst(SI443X_REG_INTERRUPT_STATUS_1, 2, buff);
_mod->SPIreadRegisterBurst(RADIOLIB_SI443X_REG_INTERRUPT_STATUS_1, 2, buff);
}
int16_t Si443x::config() {
@ -649,22 +653,22 @@ int16_t Si443x::config() {
RADIOLIB_ASSERT(state);
// disable POR and chip ready interrupts
_mod->SPIwriteRegister(SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
_mod->SPIwriteRegister(RADIOLIB_SI443X_REG_INTERRUPT_ENABLE_2, 0x00);
// enable AGC
state = _mod->SPIsetRegValue(SI443X_REG_AGC_OVERRIDE_1, SI443X_AGC_GAIN_INCREASE_ON | SI443X_AGC_ON, 6, 5);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_AGC_OVERRIDE_1, RADIOLIB_SI443X_AGC_GAIN_INCREASE_ON | RADIOLIB_SI443X_AGC_ON, 6, 5);
RADIOLIB_ASSERT(state);
// disable packet header
state = _mod->SPIsetRegValue(SI443X_REG_HEADER_CONTROL_2, SI443X_SYNC_WORD_TIMEOUT_OFF | SI443X_HEADER_LENGTH_HEADER_NONE, 7, 4);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_HEADER_CONTROL_2, RADIOLIB_SI443X_SYNC_WORD_TIMEOUT_OFF | RADIOLIB_SI443X_HEADER_LENGTH_HEADER_NONE, 7, 4);
RADIOLIB_ASSERT(state);
// set antenna switching
_mod->SPIsetRegValue(SI443X_REG_GPIO0_CONFIG, SI443X_GPIOX_TX_STATE_OUT, 4, 0);
_mod->SPIsetRegValue(SI443X_REG_GPIO1_CONFIG, SI443X_GPIOX_RX_STATE_OUT, 4, 0);
_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_GPIO0_CONFIG, RADIOLIB_SI443X_GPIOX_TX_STATE_OUT, 4, 0);
_mod->SPIsetRegValue(RADIOLIB_SI443X_REG_GPIO1_CONFIG, RADIOLIB_SI443X_GPIOX_RX_STATE_OUT, 4, 0);
// disable packet header checking
state = _mod->SPIsetRegValue(SI443X_REG_HEADER_CONTROL_1, SI443X_BROADCAST_ADDR_CHECK_NONE | SI443X_RECEIVED_HEADER_CHECK_NONE);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_HEADER_CONTROL_1, RADIOLIB_SI443X_BROADCAST_ADDR_CHECK_NONE | RADIOLIB_SI443X_RECEIVED_HEADER_CHECK_NONE);
RADIOLIB_ASSERT(state);
return(state);
@ -672,9 +676,9 @@ int16_t Si443x::config() {
int16_t Si443x::updateClockRecovery() {
// get the parameters
uint8_t bypass = _mod->SPIgetRegValue(SI443X_REG_IF_FILTER_BANDWIDTH, 7, 7) >> 7;
uint8_t decRate = _mod->SPIgetRegValue(SI443X_REG_IF_FILTER_BANDWIDTH, 6, 4) >> 4;
uint8_t manch = _mod->SPIgetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_1, 1, 1) >> 1;
uint8_t bypass = _mod->SPIgetRegValue(RADIOLIB_SI443X_REG_IF_FILTER_BANDWIDTH, 7, 7) >> 7;
uint8_t decRate = _mod->SPIgetRegValue(RADIOLIB_SI443X_REG_IF_FILTER_BANDWIDTH, 6, 4) >> 4;
uint8_t manch = _mod->SPIgetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_1, 1, 1) >> 1;
// calculate oversampling ratio, NCO offset and clock recovery gain
int8_t ndecExp = (int8_t)decRate - 3;
@ -707,39 +711,39 @@ int16_t Si443x::updateClockRecovery() {
RADIOLIB_DEBUG_PRINTLN(crGain, HEX);
// update oversampling ratio
int16_t state = _mod->SPIsetRegValue(SI443X_REG_CLOCK_REC_OFFSET_2, (uint8_t)((rxOsr_fixed & 0x0700) >> 3), 7, 5);
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_CLOCK_REC_OFFSET_2, (uint8_t)((rxOsr_fixed & 0x0700) >> 3), 7, 5);
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_CLOCK_REC_OVERSAMP_RATIO, (uint8_t)(rxOsr_fixed & 0x00FF));
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_CLOCK_REC_OVERSAMP_RATIO, (uint8_t)(rxOsr_fixed & 0x00FF));
RADIOLIB_ASSERT(state);
// update NCO offset
state = _mod->SPIsetRegValue(SI443X_REG_CLOCK_REC_OFFSET_2, (uint8_t)((ncoOff & 0x0F0000) >> 16), 3, 0);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_CLOCK_REC_OFFSET_2, (uint8_t)((ncoOff & 0x0F0000) >> 16), 3, 0);
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_CLOCK_REC_OFFSET_1, (uint8_t)((ncoOff & 0x00FF00) >> 8));
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_CLOCK_REC_OFFSET_1, (uint8_t)((ncoOff & 0x00FF00) >> 8));
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_CLOCK_REC_OFFSET_0, (uint8_t)(ncoOff & 0x0000FF));
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_CLOCK_REC_OFFSET_0, (uint8_t)(ncoOff & 0x0000FF));
RADIOLIB_ASSERT(state);
// update clock recovery loop gain
state = _mod->SPIsetRegValue(SI443X_REG_CLOCK_REC_TIMING_LOOP_GAIN_1, (uint8_t)((crGain & 0x0700) >> 8), 2, 0);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_CLOCK_REC_TIMING_LOOP_GAIN_1, (uint8_t)((crGain & 0x0700) >> 8), 2, 0);
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_CLOCK_REC_TIMING_LOOP_GAIN_0, (uint8_t)(crGain & 0x00FF));
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_CLOCK_REC_TIMING_LOOP_GAIN_0, (uint8_t)(crGain & 0x00FF));
RADIOLIB_ASSERT(state);
return(state);
}
int16_t Si443x::directMode() {
int16_t state = _mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_2, SI443X_TX_DATA_SOURCE_GPIO, 5, 4);
int16_t state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_2, RADIOLIB_SI443X_TX_DATA_SOURCE_GPIO, 5, 4);
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_GPIO1_CONFIG, SI443X_GPIOX_TX_RX_DATA_CLK_OUT, 4, 0);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_GPIO1_CONFIG, RADIOLIB_SI443X_GPIOX_TX_RX_DATA_CLK_OUT, 4, 0);
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_GPIO2_CONFIG, SI443X_GPIOX_TX_DATA_IN, 4, 0);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_GPIO2_CONFIG, RADIOLIB_SI443X_GPIOX_TX_DATA_IN, 4, 0);
RADIOLIB_ASSERT(state);
state = _mod->SPIsetRegValue(SI443X_REG_MODULATION_MODE_CONTROL_2, SI443X_MODULATION_FSK, 1, 0);
state = _mod->SPIsetRegValue(RADIOLIB_SI443X_REG_MODULATION_MODE_CONTROL_2, RADIOLIB_SI443X_MODULATION_FSK, 1, 0);
return(state);
}

952
src/modules/Si443x/Si443x.h
Wyświetl plik

Plik diff jest za duży Load Diff